1
LT1764A Series
1764afb
3A, Fast Transient
Response, Low Noise,
LDO Regulators
■
Optimized for Fast Transient Response
■
Output Current: 3A
■
Dropout Voltage: 340mV at 3A
■
Low Noise: 40
µ
V
RMS
(10Hz to 100kHz)
■
1mA Quiescent Current
■
Wide Input Voltage Range: 2.7V to 20V
■
No Protection Diodes Needed
■
Controlled Quiescent Current in Dropout
■
Fixed Output Voltages: 1.5V, 1.8V, 2.5V, 3.3V
■
Adjustable Output from 1.21V to 20V
■
<1µA Quiescent Current in Shutdown
■
Stable with 10µF Output Capacitor*
■
Stable with Ceramic Capacitors*
■
Reverse Battery Protection
■
No Reverse Current
■
Thermal Limiting
The LT
®
1764A is a low dropout regulator optimized for
fast transient response. The device is capable of supplying
3A of output current with a dropout voltage of 340mV.
Operating quiescent current is 1mA, dropping to <1µA in
shutdown. Quiescent current is well controlled; it does not
rise in dropout as it does with many other regulators. In
addition to fast transient response, the LT1764A has very
low output voltage noise which makes the device ideal for
sensitive RF supply applications.
Output voltage range is from 1.21V to 20V. The LT1764A
regulators are stable with output capacitors as low as 10µF.
Internal protection circuitry includes reverse battery pro-
tection, current limiting, thermal limiting and reverse cur-
rent protection. The device is available in fixed output
voltages of 1.5V, 1.8V, 2.5V, 3.3V and as an adjustable
device with a 1.21V reference voltage. The LT1764A regu-
lators are available in 5-lead TO-220 and DD packages, and
16-lead FE packages.
Dropout Voltage
3.3VIN to 2.5VOUT Regulator
■
3.3V to 2.5V Logic Power Supply
■
Post Regulator for Switching Supplies
FEATURES
DESCRIPTIO
U
APPLICATIO S
U
TYPICAL APPLICATIO
U
IN
SHDN
10µF*
*TANTALUM,
CERAMIC OR
ALUMINUM ELECTROLYTIC
1764 TA01
OUT
V
IN
> 3V
SENSE
GND
LT1764A-2.5
2.5V
3A
10µF*
+
+
LOAD CURRENT (A)
0 0.5
DROPOUT VOLTAGE (mV)
1.0 2.01.5 2.5 3.0
1764 TA02
400
350
300
250
200
150
100
50
0
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
*See Applications Information Section.
2
LT1764A Series
1764afb
PARAMETER CONDITIONS MIN TYP MAX UNITS
Minimum Input Voltage I
LOAD
= 0.5A 1.7 V
(Notes 3, 11) I
LOAD
= 1.5A 1.9 V
E Grade: I
LOAD
= 3A ●2.3 2.7 V
MP Grade: I
LOAD
= 3A ●2.3 2.8 V
Regulated Output Voltage LT1764A-1.5 V
IN
= 2.21V, I
LOAD
= 1mA 1.477 1.500 1.523 V
(Note 4) 2.7V < V
IN
< 20V, 1mA < I
LOAD
< 3A ●1.447 1.500 1.545 V
LT1764A-1.8 V
IN
= 2.3V, I
LOAD
= 1mA 1.773 1.800 1.827 V
2.8V < V
IN
< 20V, 1mA < I
LOAD
< 3A ●1.737 1.800 1.854 V
ABSOLUTE MAXIMUM RATINGS
W
WW
U
PACKAGE/ORDER INFORMATION
W
UU
(Note 1)
IN Pin Voltage ........................................................ ±20V
OUT Pin Voltage .................................................... ±20V
Input to Output Differential Voltage (Note 12) ....... ±20V
SENSE Pin Voltage ............................................... ±20V
ADJ Pin Voltage ...................................................... ±7V
SHDN Pin Voltage ................................................. ±20V
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 2)
ELECTRICAL CHARACTERISTICS
Output Short-Circuit Duration ......................... Indefinite
Operating Junction Temperature Range
E Grade............................................. –40°C to 125°C
MP Grade ......................................... – 55°C to 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
LT1764AET
LT1764AET-1.5
LT1764AET-1.8
LT1764AET-2.5
LT1764AET-3.3
ORDER PART NUMBER
LT1764AEQ
LT1764AEQ-1.5
LT1764AEQ-1.8
LT1764AEQ-2.5
LT1764AEQ-3.3
LT1764AMPQ
ORDER PART NUMBER
T
JMAX
= 150°C, θ
JA
= 30°C/ W
*PIN 5 = SENSE FOR LT1764A-1.5/LT1764A-1.8/
LT1764A-2.5/LT1764A-3.3
= ADJ FOR LT1764A
*PIN 5 = SENSE FOR LT1764A-1.5/LT1764A-1.8/
LT1764A-2.5/LT1764A-3.3
= ADJ FOR LT1764A
T
JMAX
= 150°C, θ
JA
= 50°C/ W
Q PACKAGE
5-LEAD PLASTIC DD
TAB IS
GND
FRONT VIEW
SENSE/ADJ*
OUT
GND
IN
SHDN
5
4
3
2
1
T PACKAGE
5-LEAD PLASTIC TO-220
SENSE/
ADJ*
OUT
GND
IN
SHDN
FRONT VIEW
TAB IS
GND
5
4
3
2
1
LT1764AEFE
LT1764AEFE-1.5
LT1764AEFE-1.8
LT1764AEFE-2.5
LT1764AEFE-3.3
ORDER PART NUMBER FE PART MARKING
LT1764AEFE
LT1764AEFE-1.5
LT1764AEFE-1.8
LT1764AEFE-2.5
LT1764AEFE-3.3
FE PACKAGE
16-LEAD PLASTIC TSSOP
PIN 17 IS GND
1
2
3
4
5
6
7
8
TOP VIEW
16
15
14
13
12
11
10
9
GND
NC
OUT
OUT
OUT
SENSE/ADJ*
GND
GND
GND
NC
IN
IN
IN
NC
SHDN
GND
17
T
JMAX
= 150°C, θ
JA
= 38°C/ W
*PIN 6 = SENSE FOR LT1764A-1.5/
LT1764A-1.8/LT1764A-2.5/
LT1764A-3.3
= ADJ FOR LT1764A
3
LT1764A Series
1764afb
LT1764A-2.5 V
IN
= 3V, I
LOAD
= 1mA 2.462 2.500 2.538 V
3.5V < V
IN
< 20V, 1mA < I
LOAD
< 3A ●2.412 2.500 2.575 V
LT1764A-3.3 V
IN
= 3.8V, I
LOAD
= 1mA 3.250 3.300 3.350 V
4.3V < V
IN
< 20V, 1mA < I
LOAD
< 3A ●3.183 3.300 3.400 V
ADJ Pin Voltage LT1764A V
IN
= 2.21V, I
LOAD
= 1mA 1.192 1.210 1.228 V
(Notes 3, 4) E Grade: 2.7V < V
IN
< 20V, 1mA < I
LOAD
< 3A ●1.168 1.210 1.246 V
MP Grade: 2.8V < V
IN
< 20V, 1mA < I
LOAD
< 3A ●1.168 1.210 1.246 V
Line Regulation LT1764A-1.5 ∆V
IN
= 2.21V to 20V, I
LOAD
= 1mA ●2.5 10 mV
LT1764A-1.8 ∆V
IN
= 2.3V to 20V, I
LOAD
= 1mA ●310mV
LT1764A-2.5 ∆V
IN
= 3V to 20V, I
LOAD
= 1mA ●410mV
LT1764A-3.3 ∆V
IN
= 3.8V to 20V, I
LOAD
= 1mA ●4.5 10 mV
LT1764A (Note 3) ∆V
IN
= 2.21V to 20V, I
LOAD
= 1mA ●210mV
Load Regulation LT1764A-1.5 V
IN
= 2.7V, ∆I
LOAD
= 1mA to 3A 3 7 mV
V
IN
= 2.7V, ∆I
LOAD
= 1mA to 3A ●23 mV
LT1764A-1.8 V
IN
= 2.8V, ∆I
LOAD
= 1mA to 3A 4 8 mV
V
IN
= 2.8V, ∆I
LOAD
= 1mA to 3A ●25 mV
LT1764A-2.5 V
IN
= 3.5V, ∆I
LOAD
= 1mA to 3A 4 10 mV
V
IN
= 3.5V, ∆I
LOAD
= 1mA to 3A ●30 mV
LT1764A-3.3 V
IN
= 4.3V, ∆I
LOAD
= 1mA to 3A 4 12 mV
V
IN
= 4.3V, ∆I
LOAD
= 1mA to 3A ●40 mV
LT1764A (Note 3) V
IN
= 2.7V, ∆I
LOAD
= 1mA to 3A 2 5 mV
E Grade: V
IN
= 2.7V, ∆I
LOAD
= 1mA to 3A ●20 mV
MP Grade: V
IN
= 2.8V, ∆I
LOAD
= 1mA to 3A ●20 mV
Dropout Voltage I
LOAD
= 1mA 0.02 0.05 V
V
IN
= V
OUT(NOMINAL)
I
LOAD
= 1mA ●0.10 V
(Notes 5, 6, 11) I
LOAD
= 100mA 0.07 0.13 V
I
LOAD
= 100mA ●0.18 V
I
LOAD
= 500mA 0.14 0.20 V
I
LOAD
= 500mA ●0.27 V
I
LOAD
= 1.5A 0.25 0.33 V
I
LOAD
= 1.5A ●0.40 V
I
LOAD
= 3A 0.34 0.45 V
I
LOAD
= 3A ●0.66 V
GND Pin Current I
LOAD
= 0mA ●1 1.5 mA
V
IN
= V
OUT(NOMINAL)
+ 1V I
LOAD
= 1mA ●1.1 1.6 mA
(Notes 5, 7) I
LOAD
= 100mA ●3.5 5 mA
I
LOAD
= 500mA ●11 18 mA
I
LOAD
= 1.5A ●40 75 mA
I
LOAD
= 3A ●120 200 mA
Output Voltage Noise C
OUT
= 10µF, I
LOAD
= 3A, BW = 10Hz to 100kHz 40 µV
RMS
ADJ Pin Bias Current (Notes 3, 8) 310µA
Shutdown Threshold V
OUT
= Off to On ●0.9 2 V
V
OUT
= On to Off ●0.25 0.75 V
SHDN Pin Current V
SHDN
= 0V 0.01 1 µA
(Note 9) V
SHDN
= 20V 730µA
Quiescent Current in Shutdown V
IN
= 6V, V
SHDN
= 0V 0.01 1 µA
Ripple Rejection V
IN
– V
OUT
= 1.5V (Avg), V
RIPPLE
= 0.5V
P-P
,5563dB
f
RIPPLE
= 120Hz, I
LOAD
= 1.5A
ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 2)
4
LT1764A Series
1764afb
Current Limit V
IN
= 7V, V
OUT
= 0V 4 A
E Grade: LT1764A; LT1764A-1.5; ●3.1 A
V
IN
= 2.7V, ∆V
OUT
= – 0.1V
MP Grade: LT1764A ●3.1 A
V
IN
= 2.8V, ∆V
OUT
= – 0.1V
Input Reverse Leakage Current V
IN
= –20V, V
OUT
= 0V ●1mA
Reverse Output Current (Note 10) LT1764A-1.5 V
OUT
= 1.5V, V
IN
< 1.5V 600 1200 µA
LT1764A-1.8 V
OUT
= 1.8V, V
IN
< 1.8V 600 1200 µA
LT1764A-2.5 V
OUT
= 2.5V, V
IN
< 2.5V 600 1200 µA
LT1764A-3.3 V
OUT
= 3.3V, V
IN
< 3.3V 600 1200 µA
LT1764A (Note 3) V
OUT
= 1.21V, V
IN
< 1.21V 300 600 µA
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT1764A regulators are tested and specified under pulse load
conditions such that T
J
≈ T
A
. The LT1764A (E grade) is 100% tested at
T
A
= 25°C; performance at –40°C and 125°C is assured by design,
characterization and correlation with statistical process controls. The
LT1764A (MP grade) is 100% tested and guaranteed over the –55°C to
125°C temperature range.
Note 3: The LT1764A (adjustable version) is tested and specified for these
conditions with the ADJ pin connected to the OUT pin.
Note 4. Operating conditions are limited by maximum junction temperature.
The regulated output voltage specification will not apply for all possible
combinations of input voltage and output current. When operating at max-
imum input voltage, the output current range must be limited. When operat-
ing at maximum output current, the input voltage range must be limited.
Note 5: To satisfy requirements for minimum input voltage, the LT1764A
(adjustable version) is tested and specified for these conditions with an
external resistor divider (two 4.12k resistors) for an output voltage of
2.42V. The external resistor divider will add a 300µA DC load on the output.
Note 6: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to: V
IN
– V
DROPOUT
.
Note 7: GND pin current is tested with V
IN
= V
OUT(NOMINAL)
+ 1V or V
IN
=
2.7V (E grade) or V
IN
= 2.8V (MP grade), whichever is greater, and a current
source load. The GND pin current will decrease at higher input voltages.
Note 8: ADJ pin bias current flows into the ADJ pin.
Note 9: SHDN pin current flows into the SHDN pin.
Note 10: Reverse output current is tested with the IN pin grounded and the
OUT pin forced to the rated output voltage. This current flows into the OUT
pin and out the GND pin.
Note 11. For the LT1764A, LT1764A-1.5 and LT1764A-1.8 dropout voltage
will be limited by the minimum input voltage specification under some
output voltage/load conditions.
Note 12. All combinations of absolute maximum input voltage and
absolute maximum output voltage cannot be achieved. The absolute
maximum differential from input to output is ±20V. For example, with
V
IN
= 20V, V
OUT
cannot be pulled below ground.
ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 2)
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Typical Dropout Voltage
OUTPUT CURRENT (A)
0
0
DROPOUT VOLTAGE (mV)
100
200
300
400
600
0.5 1.0 1.5 2.0
1764 G01
2.5 3.0
500
T
J
= 125°C
T
J
= 25°C
Guaranteed Dropout Voltage
OUTPUT CURRENT (A)
0
700
600
500
400
300
200
100
01.5 2.5
1764 G02
0.5 1.0 2.0 3.0
GUARANTEED DROPOUT VOLTAGE (mV)
= TEST POINTS
T
J
≤ 125°C
T
J
≤ 25°C
TEMPERATURE (°C)
–50
DROPOUT VOLTAGE (mV)
400
500
600
25 75
1764 G03
300
200
–25 0 50 100 125
100
0
I
L
= 3A
I
L
= 1.5A
I
L
= 0.5A
I
L
= 100mA
I
L
= 1mA
Dropout Voltage
5
LT1764A Series
1764afb
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Quiescent Current LT1764A-1.8 Output Voltage
TEMPERATURE (°C)
–50
0.8
1.0
1.4
25 75
1764 G04
0.6
0.4
–25 0 50 100 125
0.2
0
1.2
QUIESCENT CURRENT (mA)
LT1764A-1.5/1.8/2.5/3.3
LT1764A
V
IN
= 6V
R
L
=
∞
I
L
= 0
V
SHDN
= V
IN
TEMPERATURE (°C)
–50
OUTPUT VOLTAGE (V)
25
1756 G05
–25 0 50
1.84
1.83
1.82
1.81
1.80
1.79
1.78
1.77
1.76 75 100 125
I
L
= 1mA
LT1764A-3.3 Output Voltage LT1764A ADJ Pin Voltage
LT1764A-1.8 Quiescent Current
TEMPERATURE (°C)
–50
OUTPUT VOLTAGE (V)
25
1756 G07
–25 0 50
3.38
3.36
3.34
3.32
3.30
3.28
3.26
3.24
3.22 75 100 125
I
L
= 1mA
TEMPERATURE (°C)
–50
ADJ PIN VOLTAGE (V)
25
1756 G08
–25 0 50
1.230
1.225
1.220
1.215
1.210
1.205
1.200
1.195
1.190 75 100 125
I
L
= 1mA
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (mA)
40
35
30
25
20
15
10
5
0
8
1764 G09
246 107135 9
T
J
= 25°C
R
L
=
∞
V
SHDN
= V
IN
LT1764A-2.5 Quiescent Current
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (mA)
40
35
30
25
20
15
10
5
0
8
1764 G10
246 107135 9
T
J
= 25°C
R
L
=
∞
V
SHDN
= V
IN
TEMPERATURE (°C)
–50
OUTPUT VOLTAGE (V)
1.53
25
1764A G40
1.50
1.48
–25 0 50
1.47
1.46
1.54
1.52
1.51
1.49
75 100 125
I
L
= 1mA
LT1764A-2.5 Output Voltage
TEMPERATURE (°C)
–50
OUTPUT VOLTAGE (V)
25
1756 G06
–25 0 50
2.58
2.56
2.54
2.52
2.50
2.48
2.46
2.44
2.42 75 100 125
I
L
= 1mA
LT1764A-1.5 Output Voltage
LT1764A-1.5 Quiescent Current
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (mA)
40
35
30
25
20
15
10
5
0
8
1764 G41
246 107135 9
T
J
= 25°C
R
L
= ∞
V
SHDN
= V
IN
6
LT1764A Series
1764afb
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LT1764A-1.8 GND Pin Current LT1764A-2.5 GND Pin Current LT1764A-3.3 GND Pin Current
LT1764A GND Pin Current LT1764A-1.8 GND Pin Current
INPUT VOLTAGE (V)
10
GND PIN CURRENT (mA)
20.0
17.5
15.0
12.5
10.0
7.5
5.0
2.5
0
9
1764 G13
3578246 10
T
J
= 25°C
V
SHDN
= V
IN
*FOR V
OUT
= 1.8V
R
L
= 3.6Ω
I
L
= 500mA*
R
L
= 18Ω
I
L
= 100mA*
R
L
= 6Ω
I
L
= 300mA*
INPUT VOLTAGE (V)
10
GND PIN CURRENT (mA)
40
35
30
25
20
15
10
5
0
9
1764 G14
3578246 10
T
J
= 25°C
V
SHDN
= V
IN
*FOR V
OUT
= 2.5V
R
L
= 5Ω
I
L
= 500mA*
R
L
= 25Ω
I
L
= 100mA*
R
L
= 8.33Ω
I
L
= 300mA*
INPUT VOLTAGE (V)
10
GND PIN CURRENT (mA)
80
70
60
50
40
30
20
10
0
9
1764 G15
3578246 10
T
J
= 25°C
V
SHDN
= V
IN
*FOR V
OUT
= 3.3V
R
L
= 6.6Ω
I
L
= 500mA*
R
L
= 33Ω
I
L
= 100mA*
R
L
= 11Ω
I
L
= 300mA*
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
9
12
15
8
1764 G16
6
3
0246
19
35710
R
L
= 2.42Ω
I
L
= 500mA*
R
L
= 12.1Ω
I
L
= 100mA*
R
L
= 4.33Ω
I
L
= 300mA*
T
J
= 25°C
V
SHDN
= V
IN
*FOR V
OUT
= 1.21V
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
90
120
150
8
1764 G17
60
30
0246
19
35710
R
L
= 0.6Ω
I
L
= 3A*
R
L
= 2.57Ω
I
L
= 0.7A*
R
L
= 1.2Ω
I
L
= 1.5A*
T
J
= 25°C
V
SHDN
= V
IN
*FOR V
OUT
= 1.8V
LT1764A-3.3 Quiescent Current LT1764A Quiescent Current
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (mA)
40
35
30
25
20
15
10
5
0
8
1764 G11
246 107135 9
T
J
= 25°C
R
L
=
∞
V
SHDN
= V
IN
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (mA)
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
16
1764 G12
4 8 12 20142 6 10 18
T
J
= 25°C
R
L
= 4.3k
V
SHDN
= V
IN
LT1764A-1.5 GND Pin Current
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
20.0
17.5
15.0
12.5
10.0
7.5
5.0
2.5
0
8
1764 G42
246 107135 9
T
J
= 25°C
V
SHDN
= V
IN
*FOR V
OUT
= 1.5V
R
L
= 3Ω
I
L
= 500mA*
R
L
= 15Ω
I
L
= 100mA*
R
L
= 5Ω
I
L
= 300mA*
LT1764A-1.5 GND Pin Current
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
90
120
150
8
1764A G43
60
30
01234567 9
10
T
J
= 25°C
V
SHDN
= V
IN
*FOR V
OUT
= 1.5V
R
L
= 0.5Ω
I
L
= 3A*
R
L
= 1Ω
I
L
= 1.5A* R
L
= 2.14Ω
I
L
= 0.7A*
7
LT1764A Series
1764afb
TYPICAL PERFOR A CE CHARACTERISTICS
UW
SHDN Pin Threshold
(On-to-Off)
SHDN Pin Input Current SHDN Pin Input Current ADJ Pin Bias Current
TEMPERATURE (°C)
–50
0
SHDN PIN THRESHOLD (V)
0.1
0.3
0.4
0.5
1.0
0.7
050 75
1764 G22
0.2
0.8
0.9
0.6
–25 25 100 125
I
L
= 1mA
SHDN Pin Threshold
(Off-to-On)
TEMPERATURE (°C)
–50
0
SHDN PIN THRESHOLD (V)
0.1
0.3
0.4
0.5
1.0
0.7
050 75
1764 G23
0.2
0.8
0.9
0.6
–25 25 100 125
I
L
= 3A
I
L
= 1mA
SHDN PIN VOLTAGE (V)
0
SHDN PIN INPUT CURRENT (µA)
6
8
10
16
1764 G24
4
2
5
7
9
3
1
04812
218
610 14 20
TEMPERATURE (°C)
–50
0
SHDN PIN INPUT CURRENT (µA)
1
3
4
5
10
7
050 75
1764 G25
2
8
9
6
–25 25 100 125
VSHDN = 20V
TEMPERATURE (°C)
–50
ADJ PIN BIAS CURRENT (µA)
25
1756 G26
–25 0 50
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
075 100 125
LT1764A-2.5 GND Pin Current LT1764A-3.3 GND Pin Current LT1764A GND Pin Current
GND Pin Current vs I
LOAD
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
120
160
200
8
1764 G18
80
40
0246
19
35710
R
L
= 0.83Ω
I
L
= 3A*
R
L
= 3.57Ω
I
L
= 0.7A*
R
L
= 1.66Ω
I
L
= 1.5A*
T
J
= 25°C
V
SHDN
= V
IN
*FOR V
OUT
= 2.5V
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
120
160
200
8
1764 G19
80
40
0246
19
35710
R
L
= 1.1Ω
I
L
= 3A*
R
L
= 2.2Ω
I
L
= 1.5A*
T
J
= 25°C
V
SHDN
= V
IN
*FOR V
OUT
= 3.3V
R
L
= 4.71Ω
I
L
= 0.7A*
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
90
120
150
8
1764 G20
60
30
0246
19
35710
R
L
= 0.4Ω
I
L
= 3A*
R
L
= 0.81Ω
I
L
= 1.5A*
T
J
= 25°C
V
SHDN
= V
IN
*FOR V
OUT
= 1.21V
R
L
= 1.73Ω
I
L
= 0.7A*
OUTPUT CURRENT (A)
0
GND PIN CURRENT (mA)
60
80
100
1.5 2.5
1764 G21
40
20
00.5 1.0 2.0
120
140
160
3.0
V
IN
= V
OUT(NOM)
+ 1V
8
LT1764A Series
1764afb
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Ripple Rejection Ripple Rejection
LT1764A Minimum Input Voltage Load Regulation Output Noise Spectral Density
FREQUENCY (Hz)
20
RIPPLE REJECTION (dB)
30
50
70
80
10 1k 10k 1M
1764 G31
10
100 100k
60
40
0
COUT = 100µF
TANTALUM +
10 × 1µF
CERAMIC
COUT = 10µF
TANTALUM
IL = 1.5A
VIN = VOUT(NOM) + 1V
+ 50mVRMS RIPPLE
TEMPERATURE (°C)
–50 –25
50
RIPPLE REJECTION (dB)
60
75
050 75
1764 G32
55
70
65
25 100 125
I
L
= 1.5A
V
IN
= V
OUT(NOM)
+ 1V
+ 0.5V
P-P
RIPPLE
AT f = 120Hz
TEMPERATURE (°C)
–50
MINIMUM INPUT VOLTAGE (V)
2.0
2.5
3.0
25 75
1764 G33
1.5
1.0
–25 0 50 100 125
0.5
0
I
L
= 3A
I
L
= 1.5A
I
L
= 100mA
I
L
= 500mA
TEMPERATURE (°C)
–50
LOAD REGULATION (mV)
25
1764 G34
–25 0 50
10
5
0
–5
–10
–15
–20
–25
–30 75 100 125
LT1764A
LT1764A-3.3
LT1764A-2.5
LT1764A-1.8
∆I
L
= 1mA TO 3A
V
IN
= 2.7V (LT1764A/LT1764A-1.5)
V
IN
= V
OUT(NOM)
+ 1V
(LT1764A-1.8/-2.5/-3.3)
LT1764A-1.5
FREQUENCY (Hz)
10
0.01
OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)
0.1
1
100 1k 10k 100k
1764 G35
LT1764A-3.3 LT1764A-2.5
LT1764A-1.8
LT1764A-1.5
LT1764A
C
OUT
= 10µF
I
LOAD
= 3A
Current Limit Current Limit Reverse Output Current
Reverse Output Current
INPUT/OUTPUT DIFFERENTIAL (V)
0
CURRENT LIMIT (A)
2
4
6
1
3
5
4 8 12 16
1764 G27
2020 6 10 14 18
T
J
= –50°C
T
J
= 125°C
T
J
= 25°C
TEMPERATURE (°C)
–50
CURRENT LIMIT (A)
4
5
6
25 75
1764 G28
3
2
–25 0 50 100 125
1
0
V
IN
= 7V
V
OUT
= 0V
OUTPUT VOLTAGE (V)
0
REVERSE OUTPUT CURRENT (mA)
3.0
4.0
5.0
8
1764 G29
2.0
1.0
2.5
3.5
4.5
1.5
0.5
0246
19
35710
T
J
= 25°C
V
IN
= 0V
CURRENT FLOWS
INTO OUTPUT PIN
V
OUT
= V
ADJ
(LT1764A)
V
OUT
= V
FB
(LT1764A-1.5/1.8/-2.5/-3.3)
LT1764A
LT1764A-1.8
LT1764A-2.5
LT1764A-3.3
LT1764A-1.5
TEMPERATURE (°C)
–50
0
REVERSE OUTPUT CURRENT (mA)
0.1
0.3
0.4
0.5
1.0
0.7
050 75
1764 G30
0.2
0.8
0.9
0.6
–25 25 100 125
VOUT = 1.21V (LT1764A)
VOUT = 1.5V (LT1764A-1.5)
VOUT = 1.8V (LT1764A-1.8)
VOUT = 2.5V (LT1764A-2.5)
VOUT = 3.3V (LT1764A-3.3)
VIN = 0V
LT1764A-1.5/1.8/-2.5/-3.3
LT1764A
9
LT1764A Series
1764afb
RMS Output Noise vs Load Current
(10Hz to 100kHz)
LT1764A-3.3 10Hz to 100kHz
Output Noise
LT1764A-3.3 Transient Response
LOAD CURRENT (A)
10
OUTPUT NOISE (µV
RMS
)
15
25
35
40
0.0001 0.01 0.1 10
1764 G36
5
0.001 1
30
20
0
LT1764A-3.3
LT1764A-2.5
LT1764A-1.8
LT1764A
C
OUT
= 10µF
LT1764A-1.5
VOUT
100µV/DIV
COUT = 10µF 1ms/DIV 1764A G37
IL = 3A
TIME (µs)
0
OUTPUT VOLTAGE
DEVIATION (V)
LOAD CURRENT (A)
–0.1
0.1
–0.2
0
0.2
16
1764 G38
1.00
0.50
0.75
0.25
0462812 14 18
10 20
V
IN
= 4.3V
C
IN
= 3.3µF TANTALUM
C
OUT
= 10µF TANTALUM
LT1764A-3.3 Transient Response
TIME (µs)
0
OUTPUT VOLTAGE
DEVIATION (V)
LOAD CURRENT (A)
–0.1
0.1
–0.2
0
0.2
16
1764 G39
2
3
1
0462812 14 18
10 20
V
IN
= 4.3V
C
IN
= 33µF
C
OUT
= 100µF TANTALUM
+ 10 × 1µF CERAMIC
TYPICAL PERFOR A CE CHARACTERISTICS
UW
10
LT1764A Series
1764afb
SHDN (Pin 1/1/10): Shutdown. The SHDN pin is used to
put the LT1764A regulators into a low power shutdown
state. The output will be off when the SHDN pin is pulled
low. The SHDN pin can be driven either by 5V logic or
open-collector logic with a pull-up resistor. The pull-up
resistor is required to supply the pull-up current of the
open-collector gate, normally several microamperes, and
the SHDN pin current, typically 7µA. If unused, the SHDN
pin must be connected to V
IN
. The device will be in
the low power shutdown state if the SHDN pin is not
connected.
IN (Pin 2/Pin 2/Pins 12, 13, 14): Input. Power is supplied
to the device through the IN pin. A bypass capacitor is
required on this pin if the device is more than six inches
away from the main input filter capacitor. In general, the
output impedance of a battery rises with frequency, so it
is advisable to include a bypass capacitor in battery-
powered circuits. A bypass capacitor in the range of 1µF to
10µF is sufficient. The LT1764A regulators are designed to
withstand reverse voltages on the IN pin with respect to
ground and the OUT pin. In the case of a reverse input,
which can happen if a battery is plugged in backwards, the
device will act as if there is a diode in series with its input.
There will be no reverse current flow into the regulator and
no reverse voltage will appear at the load. The device will
protect both itself and the load.
NC (Pins 2, 11, 15) TSSOP Only: No Connect.
GND (Pin 3/Pin 3/Pins 1, 7, 8, 9, 16, 17): Ground.
OUT (Pin 4/Pin 4/Pins 3, 4, 5): Output. The output
supplies power to the load. A minimum output capacitor
of 10µF is required to prevent oscillations. Larger output
capacitors will be required for applications with large
transient loads to limit peak voltage transients. See the Figure 1. Kelvin Sense Connection
IN
SHDN
1764 F01
R
P
OUT
V
IN
SENSE
GND
LT1764A
R
P
3
5
4
1
2
+
+LOAD
UU
U
PI FU CTIO S
Applications Information section for more information on
output capacitance and reverse output characteristics.
SENSE (Pin 5/Pin 5/Pin 6): Sense. For fixed voltage
versions of the LT1764A (LT1764A-1.5/LT1764A-1.8/
LT1764A-2.5/LT1764A-3.3), the SENSE pin is the input
to the error amplifier. Optimum regulation will be ob-
tained at the point where the SENSE pin is connected to the
OUT pin of the regulator. In critical applications, small
voltage drops are caused by the resistance (R
P
) of PC
traces between the regulator and the load. These may be
eliminated by connecting the SENSE pin to the output at
the load as shown in Figure 1 (Kelvin Sense Connection).
Note that the voltage drop across the external PC traces
will add to the dropout voltage of the regulator. The SENSE
pin bias current is 600µA at the nominal rated output
voltage. The SENSE pin can be pulled below ground (as in
a dual supply system where the regulator load is returned
to a negative supply) and still allow the device to start
and operate.
ADJ (Pin 5/Pin 5/Pin 6): Adjust. For the adjustable LT1764A,
this is the input to the error amplifier. This pin is internally
clamped to ±7V. It has a bias current of 3µA which flows
into the pin. The ADJ pin voltage is 1.21V referenced to
ground and the output voltage range is 1.21V to 20V.
DD/TO-220/TSSOP
11
LT1764A Series
1764afb
The LT1764A series are 3A low dropout regulators opti-
mized for fast transient response. The devices are capable
of supplying 3A at a dropout voltage of 340mV. The low
operating quiescent current (1mA) drops to less than 1µA
in shutdown. In addition to the low quiescent current, the
LT1764A regulators incorporate several protection fea-
tures which make them ideal for use in battery-powered
systems. The devices are protected against both reverse
input and reverse output voltages. In battery backup
applications where the output can be held up by a backup
battery when the input is pulled to ground, the LT1764A-X
acts like it has a diode in series with its output and prevents
reverse current flow. Additionally, in dual supply applica-
tions where the regulator load is returned to a negative
supply, the output can be pulled below ground by as much
as 20V and still allow the device to start and operate.
Adjustable Operation
The adjustable version of the LT1764A has an output
voltage range of 1.21V to 20V. The output voltage is set by
the ratio of two external resistors as shown in Figure 2. The
device servos the output to maintain the voltage at the ADJ
pin at 1.21V referenced to ground. The current in R1 is
then equal to 1.21V/R1 and the current in R2 is the current
in R1 plus the ADJ pin bias current. The ADJ pin bias
current, 3µA at 25°C, flows through R2 into the ADJ pin.
The output voltage can be calculated using the formula in
Figure 2. The value of R1 should be less than 4.17k to
minimize errors in the output voltage caused by the ADJ
pin bias current. Note that in shutdown the output is turned
off and the divider current will be zero.
The adjustable device is tested and specified with the ADJ
pin tied to the OUT pin for an output voltage of 1.21V.
Specifications for output voltages greater than 1.21V will
be proportional to the ratio of the desired output voltage to
1.21V: V
OUT
/1.21V. For example, load regulation for an
output current change of 1mA to 3A is –3mV typical at
V
OUT
= 1.21V. At V
OUT
= 5V, load regulation is:
(5V/1.21V)(–3mV) = –12.4mV
APPLICATIO S I FOR ATIO
WUUU
Output Capacitors and Stability
The LT1764A regulator is a feedback circuit. Like any
feedback circuit, frequency compensation is needed to
make it stable. For the LT1764A, the frequency compensa-
tion is both internal and external—the output capacitor.
The size of the output capacitor, the type of the output
capacitor, and the ESR of the particular output capacitor all
affect the stability.
In addition to stability, the output capacitor also affects the
high frequency transient response. The regulator loop has
a finite band width. For high frequency transient loads,
recovery from a transient is a combination of the output
capacitor and the bandwidth of the regulator. The
LT1764A was designed to be easy to use and accept a
wide variety of output capacitors. However, the frequency
compensation is affected by the output capacitor and
optimum frequency stability may require some ESR, espe-
cially with ceramic capacitors.
For ease of use, low ESR polytantalum capacitors (POSCAP)
are a good choice for both the transient response and
stability of the regulator. These capacitors have intrinsic
ESR that improves the stability. Ceramic capacitors have
extremely low ESR, and while they are a good choice in
many cases, placing a small series resistance element will
sometimes achieve optimum stability and minimize ring-
ing. In all cases, a minimum of 10µF is required while the
maximum ESR allowable is 3Ω.
The place where ESR is most helpful with ceramics is low
output voltage. At low output voltages, below 2.5V, some
ESR helps the stability when ceramic output capacitors
are used. Also, some ESR allows a smaller capacitor
value to be used. When small signal ringing occurs with
ceramics due to insufficient ESR, adding ESR or increas-
Figure 2. Adjustable Operation
IN
1764 F02
R2
OUT
VIN
VOUT
ADJ
GND
LT1764A
R1
+
VV
R
RIR
VV
IA
OUT ADJ
ADJ
ADJ
=+
⎛
⎝
⎜⎞
⎠
⎟+
()()
=
=°
121 1 2
12
121
3
.
.
µ AT 25 C
OUTPUT RANGE = 1.21V TO 20V
12
LT1764A Series
1764afb
ing the capacitor value improves the stability and reduces
the ringing. Table 1 gives some recommended values of
ESR to minimize ringing caused by fast, hard current
transitions.
Table 1. Capacitor Minimum ESR
V
OUT
10
µ
F22
µ
F47
µ
F 100
µ
F
1.2V 10mΩ5mΩ3mΩ0mΩ
1.5V 7mΩ5mΩ3mΩ0mΩ
1.8V 5mΩ5mΩ3mΩ0mΩ
2.5V 0mΩ0mΩ0mΩ0mΩ
3.3V 0mΩ0mΩ0mΩ0mΩ
≥ 5V 0mΩ0mΩ0mΩ0mΩ
Figures 3 through 8 show the effect of ESR on the transient
response of the regulator. These scope photos show the
transient response for the LT1764A at three different
output voltages with various capacitors and various val-
ues of ESR. The output load conditions are the same for all
traces. In all cases there is a DC load of 1A. The load steps
up to 2A at the first transition and steps back to 1A at the
second transition.
At the worst case point of 1.2V
OUT
with 10µF C
OUT
(Figure 3), a minimum amount of ESR is required. While
5mΩ is enough to eliminate most of the ringing, a value
closer to 20mΩ provides a more optimum response. At
2.5V output with 10µF C
OUT
(Figure 4) the output rings
at the transitions with 0Ω ESR but still settles to within
10mV in 20µs after the 1A load step. Once again a small
value of ESR will provide a more optimum response.
At 5V
OUT
with 10µF C
OUT
(Figure 5) the response is well
damped with 0Ω ESR.
With a C
OUT
of 100µF at 0Ω ESR and an output of 1.2V
(Figure 6), the output rings although the amplitude is only
10mV
p-p
. With C
OUT
of 100µF it takes only 5mΩ to 20mΩ
of ESR to provide good damping at 1.2V output. Perfor-
mance at 2.5V and 5V output with 100µF C
OUT
shows sim-
ilar characteristics to the 10µF case (see Figures 7-8).
At
2.5V
OUT
5mΩ to 20mΩ can improve transient response.
At 5V
OUT
the response is well damped with 0Ω ESR.
Capacitor types with inherently higher ESR can be com-
bined with 0mΩ ESR ceramic capacitors to achieve both
good high frequency bypassing and fast settling time.
Figure 9 illustrates the improvement in transient response
that can be seen when a parallel combination of ceramic
and POSCAP capacitors are used. The output voltage is at
the worst case value of 1.2V. Trace A, is with a 10µF
ceramic output capacitor and shows significant ringing
with a peak amplitude of 25mV. For Trace B, a 22µF/45mΩ
POSCAP is added in parallel with the 10µF ceramic. The
output is well damped and settles to within 10mV in less
than 5µs.
For Trace C, a 100µF/35mΩ POSCAP is connected in
parallel with the 10µF ceramic capacitor. In this case the
peak output deviation is less than 20mV and the output
settles in about 5µs. For improved transient response the
value of the bulk capacitor (tantalum or aluminum electro-
lytic) should be greater than twice the value of the ceramic
capacitor.
Tantalum and Polytantalum Capacitors
There is a variety of tantalum capacitor types available,
with a wide range of ESR specifications. Older types have
ESR specifications in the hundreds of mΩ to several
Ohms. Some newer types of polytantalum with multi-
electrodes have maximum ESR specifications as low as
5mΩ. In general the lower the ESR specification, the larger
the size and the higher the price. Polytantalum capacitors
have better surge capability than older types and generally
lower ESR. Some types such as the Sanyo TPE and TPB
series have ESR specifications in the 20mΩ to 50mΩ
range, which provide near optimum transient response.
Aluminum Electrolytic Capacitors
Aluminum electrolytic capacitors can also be used with the
LT1764. These capacitors can also be used in conjunction
with ceramic capacitors. These tend to be the cheapest
and lowest performance type of capacitors. Care must be
used in selecting these capacitors as some types can have
ESR which can easily exceed the 3Ω maximum value.
APPLICATIO S I FOR ATIO
WUUU
13
LT1764A Series
1764afb
VOUT = 1.2V
IOUT = 1A WITH
1A PULSE
COUT = 10µF CERAMIC
0
5
10
20
50
RESR (mΩ)
Figure 3
1764A F03
20µs/DIV
50mV/DIV
VOUT = 5V
IOUT = 1A WITH
1A PULSE
COUT = 10µF CERAMIC
Figure 5
0
5
10
20
RESR (mΩ)
1764A F05
20µs/DIV
50mV/DIV
VOUT = 2.5V
ILOAD = 1A WITH
1A PULSE
COUT = 100µF CERAMIC
Figure 7
RESR (mΩ)
0
5
10
20
1764A F07
20µs/DIV
20mV/DIV
VOUT = 2.5V
IOUT = 1A WITH
1A PULSE
COUT = 10µF CERAMIC
Figure 4
0
5
10
20
50
RESR (mΩ)
1764A F04
20µs/DIV
50mV/DIV
VOUT = 1.2V
IOUT = 1A WITH
1A PULSE
COUT = 100µF CERAMIC
Figure 6
RESR (mΩ)
0
5
10
20
1764A F06
20µs/DIV
20mV/DIV
VOUT = 5V
ILOAD = 1A WITH
1A PULSE
COUT = 100µF CERAMIC
Figure 8
RESR (mΩ)
0
5
10
20
1764A F08
20µs/DIV
20mV/DIV
VOUT = 1.2V
IOUT = 1A WITH 1A PULSE
COUT =
A = 10µF CERAMIC
B = 10µF CERAMIC IN PARALLEL WITH 22µF/
45mΩ POLY
C = 10µF CERAMIC IN PARALLEL WITH 100µF/
35mΩ POLY
Figure 9
RESR (mΩ)
A
B
C
1764A F09
20µs/DIV
20mV/DIV
14
LT1764A Series
1764afb
APPLICATIONS INFORMATION
WUUU
Ceramic Capacitors
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior over
temperature and applied voltage. The most common
dielectrics used are Z5U, Y5V, X5R and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitances
in a small package, but exhibit strong voltage and tem-
perature coefficients as shown in Figures 3 and 4. When
used with a 5V regulator, a 10µF Y5V capacitor can exhibit
an effective value as low as 1µF to 2µF over the operating
temperature range. The X5R and X7R dielectrics result in
more stable characteristics and are more suitable for use
as the output capacitor. The X7R type has better stability
across temperature, while the X5R is less expensive and
is available in higher values.
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or micro-
phone works. For a ceramic capacitor the stress can be
induced by vibrations in the system or thermal transients.
“FREE” Resistance with PC Traces
The resistance values shown in Table 1 can easily be made
using a small section of PC trace in series with the output
capacitor. The wide range of noncritical ESR makes it easy
to use PC trace. The trace width should be sized to handle
the RMS ripple current associated with the load. The
output capacitor only sources or sinks current for a few
microseconds during fast output current transitions. There
TEMPERATURE (°C)
–50
40
20
0
–20
–40
–60
–80
–100
25 75
1764 F11
–25 0 50 100 125
Y5V
CHANGE IN VALUE (%)
X5R
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
Figure 3. Ceramic Capacitor DC Bias Characteristics
DC BIAS VOLTAGE (V)
CHANGE IN VALUE (%)
1764 F10
20
0
–20
–40
–60
–80
–100 04810
26 12 14
X5R
Y5V
16
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
Figure 4. Ceramic Capacitor Temperature Characteristics
Table 2. PC Trace Resistors
10mΩ20mΩ30mΩ
0.5oz C
U
Width 0.011
"
(0.28mm) 0.011
"
(0.28mm) 0.011
"
(0.28mm)
Length 0.102
"
(2.6mm) 0.204
"
(5.2mm) 0.307
"
(7.8mm)
1.0oz C
U
Width 0.006
"
(0.15mm) 0.006
"
(0.15mm) 0.006
"
(0.15mm)
Length 0.110
"
(2.8mm) 0.220
"
(5.6mm) 0.330
"
(8.4mm)
2.0oz C
U
Width 0.006
"
(0.15mm) 0.006
"
(0.15mm) 0.006
"
(0.15mm)
Length 0.224
"
(5.7mm) 0.450
"
(11.4mm) 0.670
"
(17mm)
15
LT1764A Series
1764afb
is no DC current in the output capacitor. Worst case ripple
current will occur if the output load is a high frequency
(>100kHz) square wave with a high peak value and fast
edges (< 1µs). Measured RMS value for this case is 0.5
times the peak-to-peak current change. Slower edges or
lower frequency will significantly reduce the RMS ripple
current in the capacitor.
This resistor should be made using one of the inner
layers of the PC board which are well defined. The resis-
tivity is determined primarily by the sheet resistance of the
copper laminate with no additional plating steps. Table 2
gives some sizes for 0.75A RMS current for various
copper thicknesses. More detailed information regarding
resistors made from PC traces can be found in Application
Note 69, Appendix A.
Overload Recovery
Like many IC power regulators, the LT1764A-X has safe
operating area protection. The safe area protection de-
creases the current limit as input-to-output voltage in-
creases and keeps the power transistor inside a safe
operating region for all values of input-to-output voltage.
The protection is designed to provide some output current
at all values of input-to-output voltage up to the device
breakdown.
When power is first turned on, as the input voltage rises,
the output follows the input, allowing the regulator to start
up into very heavy loads. During the start-up, as the input
voltage is rising, the input-to-output voltage differential is
small, allowing the regulator to supply large output cur-
rents. With a high input voltage, a problem can occur
wherein removal of an output short will not allow the
output voltage to recover. Other regulators, such as the
LT1085, also exhibit this phenomenon, so it is not unique
to the LT1764A series.
The problem occurs with a heavy output load when the
input voltage is high and the output voltage is low. Com-
mon situations are immediately after the removal of a
short circuit or when the SHDN pin is pulled high after the
input voltage has already been turned on. The load line
for such a load may intersect the output current curve at
two points. If this happens, there are two stable output
operating points for the regulator. With this double
APPLICATIONS INFORMATION
WUUU
intersection, the input power supply may need to be
cycled down to zero and brought up again to make the
output recover.
Output Voltage Noise
The LT1764A regulators have been designed to provide
low output voltage noise over the 10Hz to 100kHz band-
width while operating at full load. Output voltage noise is
typically 50nV√Hz over this frequency bandwidth for the
LT1764A (adjustable version). For higher output voltages
(generated by using a resistor divider), the output voltage
noise will be gained up accordingly. This results in RMS
noise over the 10Hz to 100kHz bandwidth of 15µV
RMS
for
the LT1764A increasing to 37µV
RMS
for the LT1764A-3.3.
Higher values of output voltage noise may be measured
when care is not exercised with regards to circuit layout
and testing. Crosstalk from nearby traces can induce
unwanted noise onto the output of the LT1764A-X. Power
supply ripple rejection must also be considered; the
LT1764A regulators do not have unlimited power supply
rejection and will pass a small portion of the input noise
through to the output.
Thermal Considerations
The power handling capability of the device is limited
by the maximum rated junction temperature (125°C).
The power dissipated by the device is made up of two
components:
1. Output current multiplied by the input/output voltage
differential: (I
OUT
)(V
IN
– V
OUT
), and
2. GND pin current multiplied by the input voltage:
(I
GND
)(V
IN
).
The GND pin current can be found using the GND Pin
Current curves in the Typical Performance Characteris-
tics. Power dissipation will be equal to the sum of the two
components listed above.
The LT1764A series regulators have internal thermal lim-
iting designed to protect the device during overload con-
ditions. For continuous normal conditions, the maximum
junction temperature rating of 125°C must not be
exceeded. It is important to give careful consideration to
16
LT1764A Series
1764afb
all sources of thermal resistance from junction to ambient.
Additional heat sources mounted nearby must also be
considered.
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Surface mount heatsinks and plated
through-holes can also be used to spread the heat gener-
ated by power devices.
The following table lists thermal resistance for several dif-
ferent board sizes and copper areas. All measurements were
taken in still air on 1/16" FR-4 board with one ounce copper.
Table 3. Q Package, 5-Lead DD
COPPER AREA THERMAL RESISTANCE
TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
2500mm
2
2500mm
2
2500mm
2
23°C/W
1000mm
2
2500mm
2
2500mm
2
25°C/W
125mm
2
2500mm
2
2500mm
2
33°C/W
*Device is mounted on topside.
T Package, 5-Lead TO-220
Thermal Resistance (Junction-to-Case) = 2.5°C/W
Calculating Junction Temperature
Example: Given an output voltage of 3.3V, an input voltage
range of 4V to 6V, an output current range of 0mA to
500mA and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be?
The power dissipated by the device will be equal to:
I
OUT(MAX)
(V
IN(MAX)
– V
OUT
) + I
GND
(V
IN(MAX)
)
where,
I
OUT(MAX)
= 500mA
V
IN(MAX)
= 6V
I
GND
at (I
OUT
= 500mA, V
IN
= 6V) = 10mA
So,
P = 500mA(6V – 3.3V) + 10mA(6V) = 1.41W
Using a DD package, the thermal resistance will be in the
range of 23°C/W to 33°C/W depending on the copper
area. So the junction temperature rise above ambient will
be approximately equal to:
1.41W(28°C/W) = 39.5°C
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
T
JMAX
= 50°C + 39.5°C = 89.5°C
Protection Features
The LT1764A regulators incorporate several protection
features which make them ideal for use in battery-powered
circuits. In addition to the normal protection features
associated with monolithic regulators, such as current
limiting and thermal limiting, the devices are protected
against reverse input voltages, reverse output voltages
and reverse voltages from output to input.
Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal opera-
tion, the junction temperature should not exceed 125°C.
The input of the device will withstand reverse voltages
of 20V. Current flow into the device will be limited to
less than 1mA and no negative voltage will appear at the
output. The device will protect both itself and the load.
This provides protection against batteries which can be
plugged in backward.
The output of the LT1764A-X can be pulled below ground
without damaging the device. If the input is left open circuit
or grounded, the output can be pulled below ground by
20V. For fixed voltage versions, the output will act like a
large resistor, typically 5k or higher, limiting current flow
to typically less than 600µA. For adjustable versions, the
output will act like an open circuit; no current will flow out
of the pin. If the input is powered by a voltage source, the
output will source the short-circuit current of the device
and will protect itself by thermal limiting. In this case,
grounding the SHDN pin will turn off the device and stop
the output from sourcing the short-circuit current.
The ADJ pin of the adjustable device can be pulled above
or below ground by as much as 7V without damaging the
device. If the input is left open circuit or grounded, the ADJ
pin will act like an open circuit when pulled below ground
and like a large resistor (typically 5k) in series with a diode
when pulled above ground.
APPLICATIONS INFORMATION
WUUU
17
LT1764A Series
1764afb
OUTPUT VOLTAGE (V)
012345678910
REVERSE OUTPUT CURRENT (mA)
1764 F12
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
LT1764A-2.5
LT1764A-3.3
LT1764A-1.8
LT1764A
T
J
= 25°C
V
IN
= OV
CURRENT FLOWS INTO
OUTPUT PIN
V
OUT
= V
ADJ
(LT1764A)
V
OUT
= V
FB
(LT1764A-1.5
LT1764A-1.8, LT1764A-2.5,
LT1764A-3.3)
LT1764A-1.5
In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp
voltage if the output is pulled high, the ADJ pin input
current must be limited to less than 5mA. For example, a
resistor divider is used to provide a regulated 1.5V output
from the 1.21V reference when the output is forced to 20V.
The top resistor of the resistor divider must be chosen to
limit the current into the ADJ pin to less than 5mA when the
ADJ pin is at 7V. The 13V difference between OUT and ADJ
pins divided by the 5mA maximum current into the ADJ pin
yields a minimum top resistor value of 2.6k.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled to
ground, pulled to some intermediate voltage, or is left
open circuit. Current flow back into the output will follow
the curve shown in Figure 5.
When the IN pin of the LT1764A-X is forced below the OUT
pin or the OUT pin is pulled above the IN pin, input current Figure 5. Reverse Output Current
will typically drop to less than 2µA. This can happen if the
input of the device is connected to a discharged (low
voltage) battery and the output is held up by either a
backup battery or a second regulator circuit. The state of
the SHDN pin will have no effect on the reverse output
current when the output is pulled above the input.
APPLICATIONS INFORMATION
WUUU
TYPICAL APPLICATIO S
U
–
+
A1
LT1006
–
+
C1B
1/2 LT1018
–
+
C1A
1/2 LT1018
LT1004
1.2V
1764 TA03
1µF
1N4148
1N4148
10k
10k
750Ω
750Ω
2.4k
22µF
1N4002
TO
ALL “V+”
POINTS
200k
34k*
12.1k*
0.1µF
V+
V+
V+
V+
10k
V+
0.033µF
+
10000µF
+
22µF
VOUT
3.3V
3A
+
1N4002 1N4002
1k
10V AC
AT 115VIN
1N4148
L1
500µH
90V AC
TO 140V AC
10V AC
AT 115VIN
LT1764A-3.3
GND
IN
SHDN
OUT
FB
L1: COILTRONICS CTX500-2-52
L2: STANCOR P-8560
*1% FILM RESISTOR
NTE5437
L2
NTE5437
“SYNC”
SCR Preregulator Provides Efficiency Over Line Variations
18
LT1764A Series
1764afb
Q Package
5-Lead Plastic DD Pak
(Reference LTC DWG # 05-08-1461)
Q(DD5) 1098
0.028 – 0.038
(0.711 – 0.965)
0.143 +0.012
–0.020
()
3.632 +0.305
–0.508
0.067
(1.70)
BSC
0.013 – 0.023
(0.330 – 0.584)
0.095 – 0.115
(2.413 – 2.921)
0.004 +0.008
–0.004
()
0.102 +0.203
–0.102
0.050 ± 0.012
(1.270 ± 0.305)
0.059
(1.499)
TYP
0.045 – 0.055
(1.143 – 1.397)
0.165 – 0.180
(4.191 – 4.572)
0.330 – 0.370
(8.382 – 9.398)
0.060
(1.524)
TYP
0.390 – 0.415
(9.906 – 10.541)
15° TYP
0.300
(7.620)
0.075
(1.905)
0.183
(4.648)
0.060
(1.524)
0.060
(1.524)
0.256
(6.502)
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK
TYPICAL APPLICATIO S
U
Adjustable Current Source
LT1764A-1.8
GND
IN
SHDN
R8
100k
OUT
FB
+
R7
470Ω
4
8
1764 TA04
C2
3.3µF
C3
1µF
R1
1k
R3
2k
C1
10µF
V
IN
> 2.7V LT1004-1.2
R5
0.01Ω
R2
40.2k
R4
2.2k
2
3
1
R6
2.2k
–
+
LOAD
1/2 LT1366
ADJUST R1 FOR 0A TO 3A
CONSTANT CURRENT
PACKAGE DESCRIPTION
U
19
LT1764A Series
1764afb
PACKAGE DESCRIPTION
U
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
T Package
5-Lead Plastic TO-220 (Standard)
(Reference LTC DWG # 05-08-1421)
T5 (TO-220) 0399
0.028 – 0.038
(0.711 – 0.965)
0.067
(1.70)
0.135 – 0.165
(3.429 – 4.191)
0.700 – 0.728
(17.78 – 18.491)
0.045 – 0.055
(1.143 – 1.397)
0.095 – 0.115
(2.413 – 2.921)
0.013 – 0.023
(0.330 – 0.584)
0.620
(15.75)
TYP
0.155 – 0.195*
(3.937 – 4.953)
0.152 – 0.202
(3.861 – 5.131)
0.260 – 0.320
(6.60 – 8.13)
0.165 – 0.180
(4.191 – 4.572)
0.147 – 0.155
(3.734 – 3.937)
DIA
0.390 – 0.415
(9.906 – 10.541)
0.330 – 0.370
(8.382 – 9.398)
0.460 – 0.500
(11.684 – 12.700)
0.570 – 0.620
(14.478 – 15.748)
0.230 – 0.270
(5.842 – 6.858)
BSC
SEATING PLANE
* MEASURED AT THE SEATING PLANE
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation BB
FE16 (BB) TSSOP 0204
0.09 – 0.20
(.0035 – .0079)
0° – 8°
0.25
REF
0.50 – 0.75
(.020 – .030)
4.30 – 4.50*
(.169 – .177)
134
5678
10 9
4.90 – 5.10*
(.193 – .201)
16 1514 13 12 11
1.10
(.0433)
MAX
0.05 – 0.15
(.002 – .006)
0.65
(.0256)
BSC
2.94
(.116)
0.195 – 0.30
(.0077 – .0118)
TYP
2
RECOMMENDED SOLDER PAD LAYOUT
0.45 ±0.05
0.65 BSC
4.50 ±0.10
6.60 ±0.10
1.05 ±0.10
2.94
(.116)
3.58
(.141)
3.58
(.141)
MILLIMETERS
(INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
SEE NOTE 4
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
6.40
(.252)
BSC
20
LT1764A Series
1764afb
LT 0706 REV B • PRINTED IN USA
© LINEAR TECHNOLOGY CORPORATION 2002
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
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TYPICAL APPLICATIO
U
Paralleling of Regulators for Higher Output Current
LT1764A-3.3
GND
IN
SHDN
OUT
FB
LT1764A
GND
IN R6
6.65k
C2
22µF
3.3V
6A
SHDN
OUT
ADJ
SHDN
–
+
R7
4.12k
R5
1k
C3
0.01µF
3
R4
2.2k
R2
0.01Ω
R3
2.2k
2
1
8
1764 TA05
4
+
C1
100µF
+
1/2 LT1366
R1
0.01Ω
VIN > 3.7V
