19-0487; Rev 1; 6/97 MA AALIV 5-Pin Microprocessor Supervisory Circuits General Description The MAX823/MAX824/MAX825* microprocessor (UP) supervisory circuits combine reset output, watchdog, and manual-reset input functions in a 5-pin SOT23-5 package. They significantly improve system reliability and accuracy compared to separate ICs or discrete components. The MAX823/MAX824/MAX825 are specifically designed to ignore fast transients on Vcc. Five preprogrammed reset threshold voltages are available, designated by the following package suffixes: L = 4.63V,M = 4.38V, T = 3.08V, S = 2.98V, and R = 2.63V. All three devices have an active-low reset output, which is guaranteed to be in the correct state for Voc down to 1V. The MAX824/MAX825 also have an active-high reset output. The following Se/ector Guide explains the functions offered in this series of parts. Applications Battery-Powered Computers and Controllers Embedded Controllers Intelligent Instruments Automotive Systems Critical UP Monitoring Portable/Battery-Powered Equipment Selector Guide FUNCTION MAX823 | MAX824 | MAX825 Active-Low Reset v v Vv Active-High Reset v v Watchdog Input v v Manual-Reset Input v v Typical Operating Circuit appears at end of data sheet. Marking Information appears ai and of daia sheet. Features + Precision Monitoring of +3V, +3.3V, and 45V Power Supplies # Operating Current: 10HA (MAX823L/M) 3pA (MAX825T/S/R) Fully Specified Over Temperature 140ms Min Power-On Reset Guaranteed RESET Valid to Vcc = 1V Power-Supply Transient Immunity *-e- Watchdog Timer with 1.6sec Timeout (MAX823/MAX824) Manual-Reset Input (MAX823/MAX825) + No External Components * Ordering Information PARTt TEMP. RANGE PIN-PACKAGE MAX823_EUK -40C to +85 C 5 SOT23-5 MAX824 EUK -40C to +85C 5 SOT23-5 MAX825 EUK -40C to +85C 5 SOT23-5 t insert the desired suffix letter (from the table below) into the blank to complete the part number. RESET THRESHOLD (V) 4.63 4.38 3.08 2.93 2.63 SUFFIX BD) wo) A} =| Pin Configurations TOP VIEW reser [1 | 5| Vee RESET | 1 MAXIAA eno [2 | MAXE23 GND | 2 man [3 | 4] Wo RESET | 3 $0T23-5 SAAXLM Peser [1 | eno [2 | reser [3 | 5 Voc AA AXL/A MAX624 MAXG25 Bi: S0T23-5 SOT23-5 *Paients Pending MAXIMA Maxim Iniegrated Producis 1 For free samples & the latest literature: hitp://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 408-737-7600 ext. 3468. GSCEXVW/bcB8XVW/ECEXVNMAX823/MAX824/MAX825 5-Pin Microprocessor Supervisory Circuits ABSOLUTE MAXIMUM RATINGS VGC eee cec cece ceceeeee cee cee cece ee eeeeseeaeesaecaeeeetaeeeeeteeeaeeeanes -0.3V to +6.0V Operating Temperature Range All Other Pins... cceccccceeeeteeesceeneenteets -0.3V to (Voc + 0.3V) Cd | Input Current, All Pins Except RESET and RESET.............. 20mA Storage Temperature Range Output Current, RESET, RESET 00... eee 20mA Lead Temperature (soldering, 10sec) Rate of Ris@, VOC oo... ccecccecceeeeeneeteeeseceeeeeeeeeeneeneettes 100V/us Continuous Power Dissipation (Ta = +70) S0T23-5 (derate 7.1mMW/C above +70C)...0. 571mW Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond these indicated in the operational sections of the specifications is not implied. Exposure te absolute maximum rating conditions for extended periods may afiect device reliability. ELECTRICAL CHARACTERISTICS (Voc = +4.75V to +5.5V for MAX82_L, Voc = +4.5V to +5.5V for MAX82_M, Voc = +3.15V to +3.6V for MAX82_T, Voc = +3V to +3.6V for MAX82_S, Voc = +2.7V to +3.6V for MAX82_R, Ta = TIN to Tmax, unless otherwise noted. Typical values are at Ta = +25C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX | UNITS . Ta = 0 to +70 1.0 5.5 Operating Voltage Range Voc T, = -40C to 485% 12 Vv _ MAX823L/M, 10 24 WDI and MR MAX824L/M Supply Current ISUPPLY unconnected lemon 5 12 LA ___ MAX825L/M 45 12 R unconnected MAXB257/S/3 3 3 Ta = +25 4.56 4.63 4.70 MAxB2_L Ta = 40 to +85 450 475 MAXa2 M Ta = +25 4.31 4.38 445 ~ Ta = 40 to +85 4.25 4.50 Reset Threshold Vast | MAX82_T TAs +250 Soe 808 8 V ~ Ta = 40 to +85 3.00 3.15 MAXa2 S Ta = +25 2.89 2.93 2.96 ~ Ta = 40 to +85 2.85 3.00 MAX82 A Ta = +25C 2.59 2.63 2.66 ~ Ta = 40 to +85 2.55 2.70 . MAX82_L/M 10 Reset Threshold Hysteresis MAX82 TSA 5 mV est enol Temperature 40 ppm/C . . MAX82_ L/M 140 200 280 Reset Timeout Period tRP ms MAX82_T/S/R 140 200 280 MAAXIAA5-Pin Microprocessor Supervisory Circuits ELECTRICAL CHARACTERISTICS (continued) (Voc = +4.75 to +5.5V for MAX82_L, Voc = +4.5V to +5.5V for MAX82_ M, Voc = +3.15V to +3.6V for MAX82_T, Vco = +3V to +3.6V for MAX82_8, Voc = +2.7V to +3.6V for MAX82_R, Ta = TmIN to Tmax, unless otherwise noted. Typical values are at Ta = +25.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX | UNITS MAxX82_L/M, Voc = Vast max, 7 IsouRCE = 120yA Voc - 1.5 Vou MAX82_T/S'R, Vi VI cc = VAST max , ; 0.8V. ISOURCE = 30pA oe MAX82_L/M, Voc = Vrst min, 0.4 ee ISINK = 3.2mA RESET Output Voltage - Vv MAX82_T/SR, Vcc = VAST min, 0.3 ISINK = 1.2mMA VOL Ta = 0C to +70, Veo = 1V, 0.3 Voc falling, Isin = 50uA , Ta = -40T to +85, Ver = 1.2V, 03 Voc falling, VBatt = OV, Isink = 100LA . RESET Output Short-Circuit ISOURCE MAX82_L/M, RESET = OV, Veo = 5.5V 800 WA Current (Note 2) MAX82_T/S/R, RESET = OV, Voc = 3.6V 400 Vou Voc > 1.8V, lsournce = 150nA 0.8Vec MAX824L/M, MAX825L/M, 04 RESET Quip ut Voltage v Voc = Vast max, Isink = 3.2mA Vv OL MAX824T/S/R, MAX825T/GR, 03 Vcc = Vast max, Isink = 1.2mA Vcc to RESET Delay VRsT - Voc = 100mV 20 ps WATCHDOG INPUT (MAX823/MAX824) Watchdog Timeout Period two 1.12 1.60 2.40 sec WDI Pulse Width two! VIL = 0.4V, ViH = 0.8Vce 50 ns Vv 0.3V WDI Input Threshold (Note 3) I | Vee = 5V cel ey ViIH 0.7Voc WDI = Vcc, ti 120 160 WDI Input Current (Note 4) ce, me averag LA WDI = OV, time average -20 -15 MANUAL-RESET INPUT (MAX823/MAX825) _ VIL 0.3Voc MR | Threshold V nput Thresho Vin 0.7Vcc MR Pulse Width 1.0 us MR Noise Immunity (pulse width 400 ns with no reset) MR to Reset Delay 500 ns MR Pull-Up Resistance (internal) 35 52 75 kQ Note 1: Over-temperature limits are guaranteed by design and not production tested. Note 2: The RESET short-circuit current is the maximum pull-up current when RESET is driven low by a pP bidirectional reset pin. Note 3: WDI is internally serviced within the watchdog period if WDI is left unconnected. Note 4: The WDI input current is specified as the average input current when the WDI input is driven high or low. The WDI input is designed to drive a three-stated-output device with a 10WA maximum leakage current and a maximum capacitive load of 200pF. This output device must be able to source and sink at least 200A when active. MA AXIMA 3 GSCEXVW/bcB8XVW/ECEXVNMAX823/MAX824/MAX825 5-Pin Microprocessor Supervisory Circuits Typical Operating Characteristics (MAX823L, Voc = +5V, TA = +25'C, unless otherwise noted.) Veco SUPPLY CURRENT RESET TIMECUT PERIOD RESET COMPARATOR PROPAGATION DELAY vs. TEMPERATURE vs. TEMPERATURE vs. TEMPERATURE 125 5 250 3 30 5 12.0 i 240 : Voc FALLING i 15 = 230 = zg 25 5 B40 6 220 = a Po 5B ral <= 20 | H 105 tH 210 iw va kb 2 m~ > 10.0 > #00 6 is h., o fr = N\ 7 95 = 190 3 a F a 10 5 9.0 In 180 % fa o as c 170 . 8.0 180 75 150 0 40 -20 0 # 40 60 80 100 40 20 oO #0 40 80 80 100 -40 -20 2 40 480 80 100 TEMPERATURE (C) TEM PERATURE (C: TEM PERATURE (C) WATCHDOG TIM ECUT PERIOD NORMALIZED RESET THRESHOLD MAXIMUM Veco TRANSIENT DURATION vs. TEMPERATURE VOLTAGE vs. TEMPERATURE vs. RESET THRESHOLD CVERDRIVE 2.0 3 1.06 s 180 3 g 19 ; = 4 & & 2 O10 z _ 140 i aq 18 3 g 3 i = 120 eT em S s00 E18 = Pd a) to c a +5 ay 1.00 a 80 Zo a 40 RESET OCU 3 +3 my 0.98 a ABOVE CURVE 5 = = 40 z 1 & 0.98 - = 44 8 20 1.0 0.94 0 -40 -20 0 20 40 60 80 100 -40 -20 60 270 40 88 80 100 0 20 40 8) 86 100120 148180180 208 TEM PERATURE (C) TEM PERATURE (C) RESET THRESHOLD OVERDAIVE (mV), Vast - Veco 4 MAAXLAA5-Pin Microprocessor Supervisory Circuits Pin Description PIN NAME FUNCTION MAX823 | MAX824 | MAX825 Active-Low Reset Output. Pulses low for 200ms when triggered, and remains 1 1 1 RESET low whenever Vcc is below the reset threshold or when MA is a logic low. It remains low for 200ms after one of the following occurs: Voc rises above the reset threshold, the watchdog triggers a reset, or MR goes low to high. 2 2 2 GND Ground. OV reference fer all signals. Manual-Reset Input. A logic low on MR asserts reset. Reset remains asserted as 4 _ 4 Mn long as MR is held low and for 200ms after MR returns high. The active-low input has an internal 52k pull-up resistor. It can be driven from a CMOS logic line or shorted to ground with a switch. Leave open or connect to Vcc if unused. 3 3 RESET Active-High Reset Output. Inverse of RESET. Watchdog Input. If WDI remains either high or low for longer than the watch- dog timeout pericd, the internal watchdog timer runs out and a reset is trig- 4 4 _ WDI gered. The internal watchdog timer clears whenever reset is asserted, or whenever WDI sees a rising or falling edge. If WDI is left unconnected or is connected to a three-stated buffer output, the watchdog feature is disabled. 5 5 5 Veo Supply Voltage vec MA AXLTM MAX823 MAX824 MAX825 RESET RESET GENERATOR RESET Z (MAX824/MAXB825 ONLY) MR + (MAXB23/MAX825 ONLY) WATCHDOG Wo * TRANSITION ware DOG (MAX823/MAX824 DETECTOR ONLY) GND RE Figure 1. Functional Diagram MA AXIMA GSCEXVW/bcB8XVW/ECEXVNMAX823/MAX824/MAX825 5-Pin Microprocessor Supervisory Circuits Detailed Description RESET Output A microprocessors (P's) reset input starts the UP in a known state. The MAX823/MAX824/MAX825 UP super- visory circuits assert a reset to prevent code-execution errors during power-up, power-down, and brownout conditions. RESET is guaranteed to be a logic low for Vcc down to 1V. Once Vcc exceeds the reset thresh- old, an internal timer keeps RESET low for the specified reset timeout period (trp); after this interval, RESET returns high (Figure 2). If a brownout condition occurs (Vcc dips below the reset threshold), RESET goes low. Each time RESET is asserted it stays low for the reset timeout period. Any time Vcc goes below the reset threshold the internal timer restarts. RESET both sources and sinks current. RESET on the MAX824/MAX825 is the inverse of RESET. Manual-Reset input (MAX823/MAX825) Many P-based products require manual-reset capabili- ty, allowing the operator, a test technician, or external logic circuitry to initiate a reset. On the MAX823/ MAX825, a logic low on MR asserts reset. Reset remains asserted while MR is low, and for tap (200ms nominal) after it returns high. MR has an internal 52k pull-up resistor, so it can be left open if not used. This input can be driven with CMOS-logic levels or with open-drain/ collector outputs. Connect a normally open momentary switch from MR to GND to create a manual-reset_func- tion; external debounce circuitry is not required. If MR is driven from long cables or the device is used in a noisy environment, connect a 0.1WF capacitor from MR to GND to provide additional noise immunity. Watchdog Input (MAX823/MAX824) In the MAX823/MAX824, the watchdog circuit monitors the HP's activity. If the UP does not toggle the watchdag input (WDI) within two (1.6sec}, reset asserts. The inter- nal 1.6sec timer is cleared by either a reset pulse or by toggling WDI, which detects pulses as short as 50ns. While reset is asserted, the timer remains cleared and does not count. As soon as reset is released, the timer starts counting (Figure 3). Disable the watchdog function by leaving WDI uncon- nected or by three-stating the driver connected to WDI. The watchdog input is internally driven low during the first 7/8 of the watchdog timeout period and high for the last 1/8 of the watchdog timeout period. When WDI is left unconnected, this internal driver clears the 1.6sec timer every 1.4sec. When WDI is three-stated or uncon- nected, the maximum allowable leakage current is 10uA and the maximum allowable load capacitance is 200pF. Applications Information Watchdog Input Current The MAX823/MAX824 WDI inputs are internally driven through a buffer and series resistor from the watchdog counter (Figure 1). When WDI is left unconnected, the watchdog timer is serviced within the watchdog timeout period by a low-high-low pulse from the counter chain. For minimum watchdog input current (minimum overall power consumption), leave WDI low for the majority of the watchdog timeout pericd, pulsing it low-high-low once within the first 7/8 of the watchdog timeout period to reset the watchdog timer. If WDI is externally driven high for the majority of the timeout period, up to 160A can flow into WDI. I Vcc ! I | tRST q I I 1 1 I i a eae tein] fate i 1d | RESET ON THE MAX824/M.AX825 IS THE INVERSE OF RESET. Figure 2. Reset Timing Diagram 6 Figure 3. MAX823/MAX824 Watchdog Timing Relationship MAAXIAA5-Pin Microprocessor Supervisory Circuits interfacing to pPs with Bidirectional Reset Pins The RESET output maximum pull-up current is 800A for L/M versions (400UA for T/S/R versions). This allows LPs with bidirectional resets, such as the 68HC11, to force RESET low when the MAX823/MAX824/MAX825 are pulling RESET high (Figure 4). Negative-Going Vcc Transients These supervisors are relatively immune to short- duration, negative-going Vcc transients (glitches), which usually do not require the entire system to shut down. Resets are issued to the uP during power-up, power- down, and brownout conditions. The Typical Operating Characteristics show a graph of the MAX823Ls Maximum Vcc Transient Duration vs. Reset Threshold Overdrive, for which reset pulses are not generated. The graph was produced using nega- tive-going Vcc pulses, starting at 5V and ending below the reset threshold by the magnitude indicated (reset threshold overdrive). The graph shows the maximum pulse width that a negative-going Vcc transient can typically have without triggering a reset pulse. As the amplitude of the transient increases (i.e., goes farther below the reset threshold), the maximum allowable pulse width decreases. Typically, a Vcc transient that goes 100mV below the reset threshold and lasts for 15us or less will not trigger a reset pulse. An optional 0.1uF bypass capacitor mounted close to Vcc provides additional transient immunity. Watchdog Software Considerations (MAX823/MAX824) One way to help the watchdog timer monitor software execution more closely is to set and reset the watchdog input at different points in the program, rather than pulsing the watchdog input high-low-high or low-high- low. This technique avoids a stuck loop, in which the watchdog timer would continue to be reset inside the loop, keeping the watchdog from timing out. Figure 5 shows an example of a flow diagram where the driving the watchdog input is set high at the begin- ning of the program, set low at the beginning cf every subroutine or loop, then set high again when the pro- gram returns to the beginning. If the program should hang in any subroutine, the problem would quickly be corrected, since the I/O is continually set low and the watchdog timer is allowed to time out, causing a reset or interrupt to be issued. As described in the Watchdog Input Current section, this scheme results in higher time average WDI input current than does leaving WDI low for the majority of the timeout period and periodically pulsing it low-high-low. Vec JALAXILAA Vec MAX823 MAX824 v MAX825 Igqurce MAX = 800,14 L, M a 400A T, SR PRESET rr a ae GENERATOR RESET pP = ND GND as + START SET WDI HIGH PROGRAM CODE SUBROUTINEOR PROGRAM LOOP SET WDI LOW Can) Figure 4. Interfacing to pPs with Bidirectional Resets MA AXIMA Figure 5. Waichdog Flow Diagram GSCEXVW/bcB8XVW/ECEXVNMAX823/MAX824/MAX825 5-Pin Microprocessor Supervisory Circuits Typical Operating Circuit Chip Information TRANSISTOR COUNT: 607 Vee Voc i 7 Package Information ce RESET #) RESET MAAXIAN MARKING INFORMATION (TOP) MAX823 uP XXX 7 WDI Fai- I/O AAAL =MAX823L AAAJ =MAX823M spate AAAK = MAX823T AAAL = MAX8235 "L GND AAAM = MAX823R AAAO = MAX824M AAAP = MAX824T AAAQ = MAX824S AAAR = MAX824R AAAS = MAX825L AAAT = MAX825M AAAU = MAX825T AAAV = MAX825S AAAW = MAX825R = Tr AAAN = MAX824L IH SOTSLEPS TF t 4 bon] O15 _ th Ho ! Sy, sii il | L 125 i -b -4 Eg | Lad PEF | 7 n ! at WOTE: E 2. ALL DIMEMCIOMS ARE IM MILLIMETER. | v2, FOOT LEHWGTH MEASUPED aT INTERCEPT POINT BETWEEN TATUM Ao: LEAD IUPFACE, ae 3, PACrAGE OUTLINE EacLuTIve OF MOLD FLATH & METAL BUPP. | ne . _ | 4 4, PACK AGE OUTLINE INCLUSIVE OF SOLDEFP PLATING, at MAXIM PPCPPIETHR (INFORMATION TITLE: PACHAGE OUTLINE, SOT23, 3b AFEROVAL TOCUMENT CONTFOL WO FEV 21-0057 B L 1 Maxim cannot assume responsibility for use of any circuiiry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuilry and specifications without notice at any lime. 8 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-377-7600 @ 1997 Maxim Integrated Products Printed USA MADOAA is a registered trademark of Maxim Integrated Products.