International Rectifier IRF634S HEXFET Power MOSFET PD-9.1005 Surface Mount Available in Tape & Reel D _ Dynamic dv/dt Rating Vpss = 250V Repetitive Avalanche Rated Fast Switching Rpsvon) = 0.450 . G Ease of Paralleling Simple Drive Requirements $ Ip =8.1A Description Third Generation HEXFETs from International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SMD-220 is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The SMD-220 is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. SMD-220 Absolute Maximum Ratings Parameter Max. Units Ip @ Te = 25C Continuous Drain Current, Vas @ 10 V 8.4 Ip @ Te = 100C | Continuous Drain Current, Vas @ 10 V 5.1 A Ibm Pulsed Drain Current 32 Pp @ Tc =25C | Power Dissipation 74 Ww Pp @ Ta=25C_| Power Dissipation (PCB Mount)** 3.1 Linear Derating Factor 0.59 WPC Linear Derating Factor (PCB Mount)** 0.025 Ves Gate-to-Source Voltage +20 Vv Eas Single Pulse Avalanche Energy @ 300 mJ lar Avalanche Current 8.1 A Ear Repetitive Avalanche Energy 7.4 md dv/at Peak Diode Recovery dv/dt 48 Vins Ty, Tste Junction and Storage Temperature Range -55 to +150 : C Soldering Temperature, for 10 seconds 300 (1.6mm from case) Thermal Resistance Parameter Min. Typ. Max. Units Rosc Junction-to-Case = _ 1.7 Raa Junction-to-Ambient (PCB mount)** = _ 40 Cw Roa Junction-to-Ambient - = 62 ** When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994.IRF634S Electrical Characteristics @ Ty = 25C (unless otherwise specified) Parameter Min. | Typ. | Max. | Units Test Conditions VieRypss Drain-to-Source Breakdown Voltage 250 | _ V__ | Vas=0V, Ip= 250A AVerypss/ATy| Breakdown Voltage Temp. Coefficient | 0.37 | | VC | Reference to 25C, Ip= imA Rosven) Static Drain-to-Source On-Resistance - | 045 | Q | Ves=10V, ID=5.1A Vesith) Gate Threshold Voltage 2.0 4.0 Vs | Vos=Ves, lp= 250A Os Forward Transconductance 1.6 = = S| Vps=50V, Ip=5.1A loss Drain-to-Source Leakage Current =f} 2) uy Vos=250V, Ves=0V _ _ 250 Vps=200V, Vas=0V, Ty=125C lass Gate-to-Source Forward Leakage = 100 nA Ves=20V Gate-to-Source Reverse Leakage _ | -100 Ves=-20V Qa Total Gate Charge = _ 4 [p=5.6A Qos Gate-to-Source Charge | | 65 | nC | Vps=200V Qoa Gate-to-Drain ("Miller") Charge _ 22 Vas=10V See Fig. 6 and 13 @ tdton) Turn-On Delay Time _ 9.6 _ Vop=125V tr Rise Time = 21 _ ng | o=8-64 ta(ott) Turn-Off Delay Time - 42 _ Re=12Q tr Fall Time _ 19 = Rp=22Q See Figure 10 Lo Internal Drain Inductance ~ 4.5 _ Ban (oem) nH | from package (= | Ls Internal Source Inductance | 75) and center of die contact 8 Ciss Input Capacitance | 770 | Ves=0V Coss Output Capacitance | 1909; PF | Vps= 25V Crsg Reverse Transfer Capacitance _ 52 _ f=1.0MHz See Figure 5 Source-Drain Ratings and Characteristics Parameter Min. | Typ. | Max. | Units Test Conditions Is Continuous Source Current _ _ a4 MOSFET symbol 5 (Body Diode) , A showing the ism Pulsed Source Current _ _ 32 integral reverse g (Body Diode) p-n junction diode. s Vsp Diode Forward Voltage _ _ 2.0 Vs} Ty=25C, Is=8.1A, Vas=OV tre Reverse Recovery Time | 220 | 440 | ns_ | Ty=25C, Ir=5.6A Qn Reverse Recovery Charge _ 1.2 | 24 | pC |di/dt-100A/us @ ton Forward Turn-On Time Intrinsic turn-on time is neglegible (turn-on is dominated by Ls+Lp) h Notes: , : @ Repetitive rating; pulse width limited by Isps8.1A, di/dt<120A/us, Vop<V(BR)Dss, max. junction temperature (See Figure 11) Tys150C Vpp=50V, starting Ty=25C, L=7.3mH Pulse width s 300 ps; duty cycle <2%. Re@=25Q, las=8.1A (See Figure 12)IRF634S E & = < < gS go 5 5 Oo Oo & = S 109 'g a Oo ae) 4.5V 2 20us PULSE WIDTH 20us WIDTH To = 25C Te = 150C i cee Vps, Drain-to-Source Voltage (volts) Vps, Drain-to-Source Voltage (volts) Fig 1. Typical Output Characteristics, Fig 2. Typical Output Characteristics, Tc=25C Tc=150C 3.0 Do oO cS B 2.5 ' @ g 10 8 < _ 2.0 o ZN = 26 1-5 6 OE s 2S g < J to a g 6 a S 0.8 y 50v g - Ds = sort 20us PULSE WIDTH c Veg = 1 oe ee 0.0 20 40 if 4 4 Ves, Gate-to-Source Voltage (volts) . Ty, Junction Temperature (C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. TemperatureIRF634S 1750 1400 ~~ 1050 Capacitance (pF 350 Cos + Cog Cas Coq Cas + Vps, Drain-to-Source Voltage (volts) Fig 5. Typical Capacitance Vs. 404 10 Isp, Reverse Drain Current (Amps) oe tort *. Drain-to-Source Voltage Vgg = OV 0, 1.0 Vgp, Source-to-Drain Voltage (volts) Fig 7. Typical Source-Drain Diode Forward Voltage 1.2 20 te FOR TEST CIACUIT SEE FI 13 Vas, Gate-to-Source Voltage (volts) | 410 Qg, Total Gate Charge (nC) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage OPERATION IN THIS AREA LIMITED Y Fos (ON) Ip, Drain Current (Amps) Tot Tyg=1 SINGLE - 4 2 5 49 2 5 492 2 5 493 Vps, Drain-to-Source Voltage (volts) Fig 8. Maximum Safe Operating AreaIRF634S Ro Vps D.U.T. k = 1Vop > YPto0Vv = Pulse Width < 1s <= Duty Factor < 0.1% + e . as . TAs 2 Fig 10a. Switching Time Test Circuit = oO S Vv qi DS a 90% 3 10% 25 50 75 100 425 4150 Vas Tc, Case Temperature (C) td(on) tr tavott) 4 Fig 9. Maximum Drain Current Vs. Fig 10b. Switching Time Waveforms Case Temperature Thermal Response (Zajc) ol | (THERMAL RESPONSE) feel NOTES: 4. DUTY FACTOR, D=t1/t2 2. PEAK Tj*Ppm X Ztnjc * Te SINGLE PULSE 10-5 104 103 10? 0.4 4 10 t;, Rectangular Pulse Duration (seconds) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-CaseIRF634S Vary tp to obtain Vos > required las 700 600 > S, 500 > o iH 400 * oD Fig 12a. Unclamped Inductive Test Circuit 3 300 oa 2 oa & 200 a Q < 100 Ww Vos 25 50 75 100 125 150 Starting Ty, Junction Temperature(C) lag we Fig 12c. Maximum Avalanche Energy Fig 12b. Unclamped Inductive Waveforms Vs. Drain Current Current Regulator Ves ama tf. Charge + Ie * Ip Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit h Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit Appendix B: Package Outline Mechanical Drawing Appendix C: Part Marking information International Appendix D: Tape & Reel Information Rectifier