11/17/03
Page 1 of 17
© 2003 Fairchild Semiconductor Corporation
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL: FOD070L FOD270L
DUAL CHANNEL: FOD073L
DESCRIPTION
The FOD070L, FOD270L and FOD073L optocouplers consist of an AlGaAs
LED optically coupled to a high gain split darlington photodetector. These
devices are specified to operate at a 3.3V supply voltage.
The split darlington configuration separating the input photodiode and the first
stage gain from the output transistor permits lower output saturation voltage
and higher speed operation than possible with conventional darlington
phototransistor optocoupler. In the dual channel device FOD073L, an inte-
grated emitter – base resistor provides superior stability over temperature.
The combination of a very low input current of 0.5 mA and a high current
transfer ratio of 2000% makes this family particularly useful for input interface
to MOS, CMOS, LSTTL and EIA RS232C, while output compatibility is
ensured to LVCMOS as well as high fan-out LVTTL requirements.
An internal noise shield provides exceptional common mode rejection of
10 kV/µs.
FEATURES
•Low power consumption
•Low input current - 0.5 mA
•Available in single channel 8-pin DIP (FOD270L), 8-pin SOIC (FOD070L)
and dual channel 8-pin SOIC
• High CTR-2000%
• High CMR-10 kV/µs
• Guaranteed performance over temperature 0°C to 70°C
•U.L. recognized (File # E90700)
•LVTTL/LVCMOS Compatible output
APPLICATIONS
• Digital logic ground isolation – LVTTL/LVCMOS
•Telephone ring detector
• EIA-RS-232C line receiver
• High common mode noise line receiver
• µP bus isolation
• Current loop receiver
TRUTH TABLE
LED V
O
ON LOW
OFF HIGH
8
8
1
8
1
1
1
2
3
4 5
6
7
8
+
_
VF
VCC
VB
VO
GND
FOD070L / FOD270L
N/C
N/C
1
2
3
4 5
6
7
8
+
_
VF1
VCC
V01
V02
GND
FOD073L
VF2
_
+
11/17/03
Page 2 of 17
© 2003 Fairchild Semiconductor Corporation
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL: FOD070L FOD270L
DUAL CHANNEL: FOD073L
**All typicals at T
A
= 25°C
ABSOLUTE MAXIMUM RATINGS
(No derating required up to 85°C)
Parameter Symbol Value Units
Storage Temperature T
STG
-40 to +125 °C
Operating Temperature T
OPR
-40 to +85 °C
Lead Solder Temperature (Wave solder only. See reflow profile for surface
mount devices) T
SOL
260 for 10 sec °C
EMITTER
DC/Average Forward Input Current Each Channel I
F
(avg) 20 mA
Peak Forward Input Current (50% duty cycle, 1 ms P.W.) Each Channel I
F
(pk) 40 mA
Peak Transient Input Current - (
≤
1 µs P.W., 300 pps) Each Channel I
F
(trans) 1.0 A
Reverse Input Voltage Each Channel V
R
5V
Input Power Dissipation Each Channel P
D
35 mW
DETECTOR
Average Output Current Each Channel I
O
(avg) 60 mA
Emitter-Base Reverse Voltage (FOD070L, FOD270L) Each Channel V
EB
0.5 V
Supply Voltage, Output Voltage Each Channel V
CC
,
V
O
-0.5 to 7 V
Output power dissipation Each Channel P
D
100 mW
ELECTRICAL CHARACTERISTICS
(T
A
= 0 to 70°C Unless otherwise specified)
INDIVIDUAL COMPONENT CHARACTERISTICS
Parameter Test Conditions Symbol Device Min Typ** Max Unit
EMITTER
T
A
=25°C V
F
All 1.35 1.7 V
Input Forward Voltage Each Channel (I
F
= 1.6 mA) 1.75
Input Reverse Breakdown
Voltage
(T
A
=25°C, I
R
= 10 µA) BV
R
All 5.0 V
Each Channel
DETECTOR
Logic high output current (I
F
= 0 mA, V
O
= V
CC
= 3.3 V) I
OH
FOD070L
FOD270L 0.05 25 µA
Each Channel FOD073L
Logic Low Supply
Current
I
F
= 1.6 mA, V
O
= Open, V
CC
= 3.3V
I
CCL
FOD070L
FOD270L 0.5 1.5
mA
FOD073L 0.8 3
I
F1
= I
F2
= 1.6mA
V
O1
= V
O2
= Open, V
CC
= 3.3 V
Logic High Supply
Current
I
F
= 0 mA, V
O
= Open, V
CC
= 3.3V
I
CCH
FOD070L
FOD270L 0.01 1
µA
FOD073L 0.01 2
I
F1
= I
F2
= 0mA
V
O1
= V
O2
= Open, V
CC
= 3.3 V
11/17/03
Page 3 of 17
© 2003 Fairchild Semiconductor Corporation
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL: FOD070L FOD270L
DUAL CHANNEL: FOD073L
**All typicals at T
A
= 25°C
** All typicals at TA = 25°C
TRANSFER CHARACTERISTICS
(T
A
= 0 to 70°C Unless otherwise specified)
Parameter Test Conditions Symbol Device Min Typ** Max Unit
COUPLED
Current transfer ratio
(Notes 1,2)
(I
F
= 0.5 mA, V
O
= 0.4 V, V
CC
= 3.3V) CTR ALL 400 5000 %
Logic low output voltage
output voltage
(Note 2)
(I
F
= 1.6 mA, I
O
= 8 mA, V
CC
= 3.3V)
V
OL
ALL 0.07 0.3
V
(I
F
= 5 mA, I
O
= 15 mA, V
CC
= 3.3V) ALL 0.07 0.4
SWITCHING CHARACTERISTICS
(T
A
= 0 to 70°C unless otherwise specified., V
CC
= 3.3 V)
Parameter Test Conditions Symbol Device Min Typ** Max Unit
Propagation delay
time to logic low (R
L
= 4.7 k
Ω
, I
F
= 0.5 mA)
(Note 2) (Fig. 17) T
PHL
FOD070L
FOD270L 330 µs
FOD073L 5
Propagation delay
time to logic high (R
L
= 4.7 k
Ω
, I
F
= 0.5 mA)
(Note 2) (Fig. 17) T
PLH
FOD070L
FOD270L 50 90 µs
FOD073L 25
Common mode transient
immunity at logic high
(I
F
= 0 mA, |V
CM
| = 10 V
P-P
)
T
A
= 25°C (R
L
= 2.2 k
Ω
) (Note 3) (Fig. 18) |CM
H
| ALL 1,000 10,000 V/µs
Common mode transient
immunity at logic low
(I
F
= 1.6 mA, |V
CM
| = 10 V
P-P
,
R
L
= 2.2 k
Ω
)
T
A
= 25°C (Note 3) (Fig. 18)
|CM
L
| ALL 1,000 10,000 V/µs
11/17/03
Page 4 of 17
© 2003 Fairchild Semiconductor Corporation
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL: FOD070L FOD270L
DUAL CHANNEL: FOD073L
** All typicals at T
A
= 25°C
1. Current Transfer Ratio is defined as a ratio of output collector current, I
O
, to the forward LED input current, I
F
, times 100%.
2. Pin 7 open. (FOD070L and FOD270L only)
3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dV
CM
/dt on the leading edge of the
common mode pulse signal, V
CM
, to assure that the output will remain in a logic high state (i.e., V
O
>2.0 V). Common mode
transient immunity in logic low level is the maximum tolerable (negative) dV
CM
/dt on the trailing edge of the common mode
pulse signal, V
CM
, to assure that the output will remain in a logic low state (i.e., VO<0.8 V).
4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together.
5. For dual channel devices, CI-O is measured by shorting pins 1 and 2 or pins 3 and 4 together and pins 5 through 8 shorted
together.
6. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
ISOLATION CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified)
Characteristics Test Conditions Symbol Device Min Typ** Max Unit
Input-output
insulation leakage current
(Relative humidity = 45%)
(TA = 25°C, t = 5 s)
(VI-O = 3000 VDC)
(Note 4)
II-O ALL 1.0 µA
Withstand insulation
test voltage
(RH ≤ 50%, TA = 25°C)
(Note 4) ( t = 1 min.) VISO
FOD070L
FOD073L 2500 VRMS
FOD270L 5000
Resistance (input to output) (Note 4) (VI-O = 500 VDC) RI-O ALL 1012 Ω
Capacitance (input to output) (Note 4,5) (f = 1 MHz) CI-O ALL 0.7 pF
Input-Input
Insulation leakage current (RH ≤ 45%, VI-I = 500 VDC (Note 6) II-I FOD073L 0.005 µA
Input-Input Resistance (VI-I = 500 VDC) (Note 6) RI-I FOD073L 1011 Ω
Input-Input Capacitance (f = 1 MHz) (Note 6) CI-I FOD073L 0.03 pF
NOTES
11/17/03
Page 5 of 17
© 2003 Fairchild Semiconductor Corporation
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL: FOD070L FOD270L
DUAL CHANNEL: FOD073L
TYPICAL PERFORMANCE CURVES
Fig. 1 Input Forward Current vs Forward Voltage
Fig. 2 Current Transfer Ratio vs. Input Forward Current
(FOD270L only)
VF - FORWARD VOLTAGE (V)
1.11.00.9 1.2 1.3 1.4 1.5 1.6 1.7
I
F
- FORWARD CURRENT (mA)
0.001
0.01
0.1
1
10
100
IF - FORWARD CURRENT (mA)
1100.1
CTR - CURRENT TRANSFER RATIO (%)
0
500
1000
1500
2000
2500
3000
3500
4000
4500
VO - OUTPUT VOLTAGE (V)
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
0
20
40
60
80
100
120
140
Fig. 6 DC Transfer Characterstics (FOD073L only)
IO - OUTPUT CURRENT (mA)
TA = 85°C
TA = 70°C
TA = 25°C
TA = -40°C
TA = 0°C
4mA
3.5mA
2.5mA
0.5mA
3mA
2mA
1mA
TA = 25°C
VCC = 3.3V
IF = 5mA
IF = 4.5mA
1.5mA
Fig. 5 DC Transfer Charactersitics (FOD070L, FOD270L)
VO - OUTPUT VOLTAGE (V)
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
IO - OUTPUT CURRENT (mA)
0
20
40
60
80
100
120
140
160
TA = 25°C
VCC = 3.3V IF = 5mA
IF = 4.5mA
4mA
3.5mA
2.5mA
1.5mA
0.5mA
3mA
2mA
1mA
VO = 0.4V
VCC = 3.3V
TA = 25°C
TA = 85°C
TA = 70°C
TA = 25°C
TA = 0°C
TA = -40°C
Fig. 3 Current Transfer Ratio vs. Input Forward Current
(FOD070L only)
Fig. 4 Current Transfer Ratio vs. Input Forward Current
(FOD073L only)
IF - FORWARD CURRENT (mA)
1100.1
CTR - CURRENT TRANSFER RATIO (%)
0
500
1000
1500
2000
2500
3000
3500
4000
4500
IF - FORWARD CURRENT (mA)
1100.1
CTR - CURRENT TRANSFER RATIO (%)
0
500
1000
1500
2000
2500
3000
3500
VO = 0.4V
VCC = 3.3V
TA = 25°C
TA = 85°C
TA = 70°C
TA = 25°C
TA = 0°C
TA = -40°C
VO = 0.4V
VCC = 3.3V
TA = 25°C
TA = 85°C
TA = 70°C
TA = 25°C
TA = 0°C
TA = -40°C
11/17/03
Page 6 of 17
© 2003 Fairchild Semiconductor Corporation
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL: FOD070L FOD270L
DUAL CHANNEL: FOD073L
TYPICAL PERFORMANCE CURVES
Fig. 7 Supply Current vs Input Forward Current Fig. 8 Output Current vs Input Forward Current
(FOD270L only)
(FOD270L, FOD070L, FOD073L)
IF - Input Forward Current (mA)
0.1 1 10
ICC - (Per Channel) - Supply Current (mA)
0.01
0.1
1
10
IF - Input Forward Current (mA)
0.1 1 10
IO - Output Current (mA)
1
10
100
Fig. 9 Output Current vs Input Forward Current
(FOD070L only)
Fig. 11 Propagation Delay vs.
Input Forward Current (FOD070L only)
Fig. 12 Propagation Delay vs.
Ambient Temperature (FOD073L only)
Fig. 10 Output Current vs Input Forward Current
(FOD073L only)
IF - Forward Current (mA)
IF - Input Forward Current (mA)
0.1 1 10
IO - Output Current (mA)
1
10
100
012345678910
TA - Ambient Temperature (°C)
-40 -20 0 20 40 60 80 100
tPHL - Propagation Delay To Logic Low (µs)
tP - Propagation Delay (µs)
tPLH - Propagation Delay To Logic High (µs)
0
4
3
2
1
5
44
52
50
48
46
54
IF - Forward Current (mA)
0.1 1 10
IO - Output Current (mA)
0.1
10
1
100
TA = 25°C
VCC = 3.3V
FOD270L
or FOD070L FOD073L
VO = 0.4V
VCC = 3.3V
TA = 25°C
TA = 85°CTA = -40°C
TA = 0°C
TA = 25°C
TA = 70°C
VO = 0.4V
VCC = 3.3V
TA = 25°C
TA = -40°C
TA = 70°C, 85°C
TA = 0°C
TA = 25°C
tPLH
tPLH
tPHL tPHL
0
40
30
20
10
50
60
70
VO = 0.4V
VCC = 3.3V
TA = 25°C
TA = -40°C
TA = 70°C, 85°C
TA = 0°C
TA = 25°C
TA = 25°C
VCC = 3.3V
RL = 4.7kΩ
1/f = 100µs
Duty Cycle = 10%
VCC = 3.3V
IF = 0.5mA
RL = 4.7kΩ
1/f = 100µs
Duty Cycle = 10%
11/17/03
Page 7 of 17
© 2003 Fairchild Semiconductor Corporation
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL: FOD070L FOD270L
DUAL CHANNEL: FOD073L
TYPICAL PERFORMANCE CURVES
Fig. 13 Propagation Delay vs.
Ambient Temperature (FOD070L, FOD270L)
Fig. 14 Propagation Delay To Logic Low vs Pulse Period
(FOD073L, FOD070L, FOD270L)
TA - Ambient Temperature (°C) T - Pulse Period (ms)
-40 0.01 0.1 1 10-20 0 20 40 60 80 100
t
PHL
- Propagation Delay to Logic Low (µs)
t
PLH
- Propagation Delay to Logic High (µs)
tPLH
tPLH
tPLH
tPHL
tPHL tPHL
0
8
6
4
2
10
12
14
t
PHL
- Propagation Delay to Logic Low (µs)
1
10
100
0
80
60
40
20
100
120
140
Fig. 15 Propagation Delay vs.
Input Forward Current (FOD270L only)
Fig. 16 Propagation Delay vs.
Input Forward Current (FOD073L only)
IF - Input Forward Current (mA) IF - Input Forward Current (mA)
012345 678910
t
PHL
- Propagation Delay to Logic Low (µs)
t
PLH
- Propagation Delay to Logic High (µs)
0
2
1
3
4
5
42
50
48
46
44
52
012345 678910
t
PHL
- Propagation Delay to Logic Low (µs)
t
PLH
- Propagation Delay to Logic High (µs)
0
4
2
6
8
12
10
16
24
22
20
18
26
28
VCC = 3.3V
IF = 0.5mA
RL = 4.7kΩ
1/f = 200µs
Duty Cycle = 10%
TA = 25°C
VCC = 3.3V
I = 0.5mA
RL = 4.7kΩ
Duty Cycle = 50µs
FOD070L,
FOD270L
FOD073L
TA = 25°C
VCC = 3.3V
RL = 4.7kΩ
1/f = 100µs
Duty Cycle = 10%
TA = 25°C
VCC = 3.3V
RL = 4.7kΩ
1/f = 100µs
Duty Cycle = 10%
11/17/03
Page 8 of 17
© 2003 Fairchild Semiconductor Corporation
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL: FOD070L FOD270L
DUAL CHANNEL: FOD073L
Fi
g
. 17 Switchin
g
T
i
m
e
T
est Circuit
T
T
PLH
OL
O
O
3
.
3
V
50%
F
I
50%
T
PHL
T
4
5
N
o
i
se
1
2
3
S
hiel
d
8
7
6
O
V
CC
V
01
V
02
G
N
D
V
F1
-
+
F2
V
F
I
+
F
I
M
O
NIT
OR
L
R
0
.1
µ
F
P
u
l
se
G
enerato
r
tr =
5
n
s
Z = 50
O
V
3
I Monitor
F
4
tr =
5
n
s
G
enerato
r
P
u
l
se
Z = 50
O
V
F
V
V
I
F
2
1
V
O
V
V
O
6
5
G
N
D
7
8
O
B
B
L
R
CC
C
+
3
.
3
V
+
3
.
3
V
0
.1
µ
F
C = 15 pF*
L
Test
C
ircuit for F
O
D
0
7
3L
Test Circuit for FOD070L
,
FOD270
L
*Includes Probe and Fixture Ca
p
acitanc
e
m
R
Rm
S
hiel
d
N
o
i
se
-
C = 15 pF*
11/17/03
Page 9 of 17
© 2003 Fairchild Semiconductor Corporation
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL: FOD070L FOD270L
DUAL CHANNEL: FOD073L
Fig. 18 Common Mode Immunity Test Circuit
Test Circuit for FOD073LTest Circuit for FOD070L and FOD270L
Pulse Gen
CM
V
V
FF
B
A
+-
+3.3 V
O
V
-
IF
3
4
F
V
2
1Shield
Noise
6O
5GND
7
8
V
B
V
CC
V
L
R
Switch at A : I = 0 mA
F
Switch at B : I = 1.6 mA
F
tr
VO
O
V
OL
V
3.3 V
0 V 10% 10%
90%
CM
V 10 V
GND
+
-
F2V
VF1
-
+3.3 V
CCV
L
V02
V
R
01 VO
V
CM
A
B
Pulse Gen
F
I
+-
+
0.1 µF
f
t
FF
V
90%
1
3
4
2
Shield
Noise
8
6
5
7
0.1 µF
11/17/03
Page 10 of 17
© 2003 Fairchild Semiconductor Corporation
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL: FOD070L FOD270L
DUAL CHANNEL: FOD073L
Package Dimensions (Through Hole)
0.200 (5.08)
0.140 (3.55)
0.100 (2.54) TYP
0.022 (0.56)
0.016 (0.41)
0.020 (0.51) MIN
0.390 (9.91)
0.370 (9.40)
0.270 (6.86)
0.250 (6.35)
3
0.070 (1.78)
0.045 (1.14)
241
56 78
0.300 (7.62)
TYP
0.154 (3.90)
0.120 (3.05)
0.016 (0.40)
0.008 (0.20)
15° MAX
PIN 1
ID.
SEATING PLANE
Package Dimensions (Surface Mount)
Lead Coplanarity : 0.004 (0.10) MAX
0.270 (6.86)
0.250 (6.35)
0.390 (9.91)
0.370 (9.40)
0.022 (0.56)
0.016 (0.41)
0.100 (2.54)
TYP
0.020 (0.51)
MIN
0.070 (1.78)
0.045 (1.14)
0.300 (7.62)
TYP
0.405 (10.30)
MIN
0.315 (8.00)
MIN
0.045 [1.14]
32 14
5678
0.016 (0.41)
0.008 (0.20)
PIN 1
ID.
Package Dimensions (0.4"Lead Spacing)
0.200 (5.08)
0.140 (3.55)
0.100 (2.54) TYP
0.022 (0.56)
0.016 (0.41)
0.004 (0.10) MIN
0.390 (9.91)
0.370 (9.40)
0.270 (6.86)
0.250 (6.35)
3
0.070 (1.78)
0.045 (1.14)
241
56 78
0.400 (10.16)
TYP
0.154 (3.90)
0.120 (3.05)
0.016 (0.40)
0.008 (0.20)
0° to 15°
PIN 1
ID.
SEATING PLANE
Recommend Pad Layout for
Surface Mount Leadform
0.070 (1.78)
0.060 (1.52)
0.030 (0.76)
0.100 (2.54)
0.295 (7.49)
0.415 (10.54)
NOTE
All dimensions are in inches (millimeters)
8-Pin DIP
11/17/03
Page 11 of 17
© 2003 Fairchild Semiconductor Corporation
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL: FOD070L FOD270L
DUAL CHANNEL: FOD073L
SOIC 8
Package Dimensions (Surface Mount)
Lead Coplanarity : 0.004 (0.10) MAX
0.202 (5.13)
0.182 (4.63)
0.021 (0.53)
0.011 (0.28) 0.050 (1.27)
TYP
0.164 (4.16)
0.144 (3.66)
0.244 (6.19)
0.224 (5.69)
0.143 (3.63)
0.123 (3.13)
0.008 (0.20)
0.003 (0.08)
0.010 (0.25)
0.006 (0.16)
SEATING PLANE
Recommend Pad Layout
0.024 (0.61)
0.050 (1.27)
0.155 (3.94)
0.275 (6.99)
0.060 (1.52)
11/17/03
Page 12 of 17
© 2003 Fairchild Semiconductor Corporation
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL: FOD070L FOD270L
DUAL CHANNEL: FOD073L
ORDERING INFORMATION
MARKING INFORMATION (FOD070L, FOD073L)
Option Order Entry Identifier Description
S FOD270LS Surface Mount Lead Bend (DIP Package Only)
SD FOD270LSD Surface Mount; Tape and reel (DIP Package Only)
(1000 units per reel)
SV Pending approval Surface Mount; VDE 0884 (DIP Package Only)
SDV Pending approval Surface Mount; Tape and reel (DIP Package Only); VDE 0884
(1000 units per reel)
T FOD270LT 0.4" lead spacing (DIP Package Only)
TV Pending approval 0.4" lead spacing, VDE 0884 (DIP Package Only)
R1 FOD070LR1 Tape and reel (500 units per reel) (SOIC 8 Package only)
R1V Pending approval VDE, Tape and reel (500 units per reel) (SOIC 8 Package only)
R2 FOD070LR2 Tape and reel (2500 units per reel) (SOIC 8 Package only)
R2V Pending approval VDE 0884, Tape and reel (2500 units per reel) (SOIC 8 Package only)
VPending approval VDE 0884
12
6
43 5
Definitions
1Fairchild logo
2Device number
3VDE mark (Note: Only appears on parts ordered with VDE
option – See order entry table)
4 One digit year code, e.g., ‘3’
5Two digit work week ranging from ‘01’ to ‘53’
6 Assembly package code
70L
SYYXV
11/17/03
Page 13 of 17
© 2003 Fairchild Semiconductor Corporation
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL: FOD070L FOD270L
DUAL CHANNEL: FOD073L
MARKING INFORMATION (FOD270L)
1
2
6
43 5
270L
BYYXXV
Definitions
1Fairchild logo
2Device number
3VDE mark (Note: Only appears on parts ordered with VDE
option – See order entry table)
4Two digit year code, e.g., ‘03’
5Two digit work week ranging from ‘01’ to ‘53’
6 Assembly package code
11/17/03
Page 14 of 17
© 2003 Fairchild Semiconductor Corporation
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL: FOD070L FOD270L
DUAL CHANNEL: FOD073L
Carrier Tape Specifications (FOD070L and FOD073L)
4.0 ± 0.10
Ø1.5 MIN
User Direction of Feed
2.0 ± 0.05
1.75 ± 0.10
5.5 ± 0.05
12.0 ± 0.3
8.0 ± 0.10
0.30 MAX
8.3 ± 0.10
3.50 ± 0.20
0.1 MAX 6.40 ± 0.20
5.20 ± 0.20
Ø1.5 ± 0.1/-0
11/17/03
Page 15 of 17
© 2003 Fairchild Semiconductor Corporation
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL: FOD070L FOD270L
DUAL CHANNEL: FOD073L
Carrier Tape Specifications (FOD270L)
Description Symbol Dimension in mm
Tape Width W 16.0 ± 0.3
Tape Thickness t 0.30 ± 0.05
Sprocket Hole Pitch P04.0 ± 0.1
Sprocket Hole Diameter D01.55 ± 0.05
Sprocket Hole Location E 1.75 ± 0.10
Pocket Location F 7.5 ± 0.1
P24.0 ± 0.1
Pocket Pitch P 12.0 ± 0.1
Pocket Dimensions
A010.30 ±0.20
B010.30 ±0.20
K04.90 ±0.20
Cover Tape Width W11.6 ± 0.1
Cover Tape Thickness d 0.1 max
Max. Component Rotation or Tilt 10°
Min. Bending Radius R 30
d
0
P
t
2
D0
1
1
W
User Direction of Feed
0
K
B0
A0W
E
D
F
P
P
11/17/03
Page 16 of 17
© 2003 Fairchild Semiconductor Corporation
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL: FOD070L FOD270L
DUAL CHANNEL: FOD073L
Reflow Profile (FOD070L and FOD073L)
Reflow Profile (FOD270L)
Ramp up = 2–10°C/sec
• Peak reflow temperature: 245°C (package surface temperature)
• Time of temperature higher than 183°C for 120–180 seconds
• One time soldering reflow is recommended
230°C, 10–30 s
Time (Minute)
0
300
250
200
150
100
50
0
0.5 1 1.5 2 2.5 3 3.5 4 4.5
Te mperature ( °C)
Time above 183°C, 120–180 sec
245°C peak
• Peak reflow temperature 260° C (package surface temperature)
• Time of temperature higher than 245°C 40 seconds or less
• Number of reflows Three
300
250
200
Temperature (°C)
150
100
50
50 100 150 200 250
Time (s)
10 s
40 s
260°
245°
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO
ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME
ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
11/17/03
Page 17 of 17
© 2003 Fairchild Semiconductor Corporation
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL: FOD070L FOD270L
DUAL CHANNEL: FOD073L