2
Application Information
Optimum Feedback Resistor
Although a current feedback amplifier’s bandwidth depen-
dency on closed loop gain isn’t as se v ere as that of a voltage
feedback amplifier, there can be an appreciable decrease in
bandwidth at higher gains. This decrease may be minimized
by taking advantage of the current feedback amplifier’s
unique relationship between bandwidth and RF. All current
feedback amplifiers require a feedback resistor, even for
unity gain applications, and RF, in conjunction with the inter-
nal compensation capacitor, sets the dominant pole of the
frequency response. Thus, the amplifier’s bandwidth is
inversely propor tional to RF. The HS-1245RH design is opti-
mized for a 560Ω R
F
at a gain of +2. Decreasing RF
decreases stability, resulting in excessive peaking and over-
shoot (Note: Capacitive feedback will cause the same prob-
lems due to the feedback impedance decrease at higher
frequencies). At higher gains the amplifier is more stable, so
RF can be decreased in a trade-off of stability for bandwidth.
The table below lists recommended RF values for various
gains, and the expected bandwidth. For good channel-to-
channel gain matching, it is recommended that all resistors
(termination as well as gain setting) be ±1% tolerance or bet-
ter. Note that a ser ies input resistor, on +IN, is required for a
gain of +1, to reduce gain peaking and increase stability.
Non-inverting Input Source Impedance
F or best operation, the D.C . source impedance looking out of
the non-inverting input should be ≥50Ω. This is especially
important in inverting gain configurations where the non-
inverting input would normally be connected directly to GND.
Optional GND Pin for TTL Compatibility
The HS-1245RH derives an internal GND reference for the
digital circuitr y as long as the power supplies are symmetri-
cal about GND. The GND reference is used to ensure the
TTL compatibility of the DISABLE inputs. With symmetrical
supplies the GND pin (Pin 12) may be floated, or connected
directly to GND. If asymmetrical supplies (e.g. +10V, 0V) are
utilized, and TTL compatibility is desired, the GND pin must
be connected to GND.
PC Board Layout
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The
use of low inductance components such as chip resis-
tors and chip capacitors is strongly recommended,
while a solid ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
(0.1µF) chip capacitor works well in most cases.
Terminated microstrip signal lines are recommended at the
input and output of the device. Capacitance directly on the
output must be minimized, or isolated as discussed in the
next section.
Care must also be taken to minimize the capacitance to
ground seen by the amplifier’s inverting input (-IN). The
larger this capacitance, the worse the gain peaking, resulting
in pulse overshoot and possible instability. To this end, it is
recommended that the ground plane be removed under
traces connected to -IN, and connections to -IN should be
kept as short as possible.
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly ter-
minated transmission line will degrade the amplifier’s phase
margin resulting in frequency response peaking and possi-
ble oscillations . In most cases , the oscillation can be a voided
by placing a resistor (RS) in series with the output prior to
the capacitance.
Figure 1 details star ting points for the selection of this resis-
tor . The points on the curve indicate the R S and CL combina-
tions for the optimum bandwidth, stability, and settling time,
but experimental fine tuning is recommended. Picking a
point abov e or to the right of the curve yields an overdamped
response, while points below or left of the curve indicate
areas of underdamped performance.
RS and CLform a low pass network at the output, thus
limiting system bandwidth well below the amplifier band-
width of 290MHz (for AV = +1). By decreasing RS as CLin-
creases (as illustrated in the curves), the maximum
bandwidth is obtained without sacrificing stability. Even
so, bandwidth does decrease as you move to the right
along the cur ve. For example, at AV = +1, RS = 62Ω, CL =
40pF, the overall bandwidth is limited to 180MHz, and
bandwidth drops to 70MHz at AV = +1, RS = 8Ω, CL =
400pF.
GAIN
(ACL)R
F
(Ω)BANDWIDTH
(MHz)
-1 510 230
+1 560 (+RS = 560Ω)290
+2 560 530
0 100 200 300 400
0
10
20
30
40
50
LOAD CAPACITANCE (pF)
SERIES OUTPUT RESISTANCE (Ω)
AV = +1
AV = +2
150 250 35050
FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs
LOAD CAPACITANCE
HS-1245RH