1. Features * Full Trusted Computing Group (TCG) Trusted Platform Module (TPM) Version 1.2 * * * * * * * * * * * * * Compatibility Compliant with TCG PC Client Specific TPM Interface Specification Version 1.2 Single-chip Turnkey Solution Hardware Asymmetric Crypto Engine 2048-bit RSA(R) Sign in 500 ms AVR(R) RISC Microprocessor Internal EEPROM Storage for RSA Keys 33 MHz LPC (Low Pin Count) Bus for Easy PC Interface Secure Hardware and Firmware Design and Chip Layout True Random Number Generator (RNG) - FIPS 140-2 Compliant NV Storage space for 1280 bytes of user defined data 3.3V Supply Voltage 28-lead TSSOP Package or 40-lead QFN Package 0-70C Temperature Range Trusted Platform Module AT97SC3203 2. Description The AT97SC3203 is a fully integrated security module designed to be integrated into personal computers and other embedded systems. It implements version 1.2 of the Trusted Computing Group (TCG) specification for Trusted Platform Modules(TPM). The TPM includes a cryptographic accelerator capable of computing a 2048-bit RSA signature in 500 ms and a 1024-bit RSA signature in 100 ms. Performance of the SHA-1 accelerator is 50 s per 64-byte block. In most cases, TCG key generation operations will be completed using a proprietary mechanism in less than 1 msec. The chip communicates with the PC through the LPC interface. The TPM supports SIRQ (for interrupts) and CLKRUN to permit clock stopping for power savings in mobile computers. Figure 2-1. LPC Interface Summary Note: See the full datasheet for detailed design information. Pin Configurations Pin Name Description VCC 3.3V Supply Voltage SB3V Standby 3.3V Supply Voltage VBAT 2.5V - 4.0V Battery Input GND Ground LRESET# PCI Reset Input Active Low LAD0 LPC Command, Address, Data Line Input/Output LAD1 LPC Command, Address, Data Line Input/Output LAD2 LPC Command, Address, Data Line Input/Output LAD3 LPC Command, Address, Data Line Input/Output 5116DS-TPM-1/08 Note: This is a summary document. A complete document is available under NDA. For more information, please contact your local Atmel sales office. Figure 2-1. Pin Configurations Pin Name Description LCLK 33 MHz PCI Clock Input LFRAME# LPC Frame Input CLKRUN# PCI Clock Run Input/Output LPCPD# LPC Power Down Input SERIQ Serialized Interrupt Request Input/Output Xtall/32K in 32.768 kHz Crystal Input Xtal0 32.768 kHz Crystal Output GPIO6 General Purpose Input/Output TestI Test Input (disabled) TestBI Test Input (disabled) ATest Atmel Test Pin NC No Connect NBO Not Bonded Out 40-pin QFN 6.0 mm x 6.0 mm Body 0.50 mm Pitch 26 LAD0 SB3V 5 GPIO6 6 NC 7 TestI 8 25 GND 24 VCC 23 LAD1 22 LFRAME# 21 LCLK TestBI 9 VCC 10 20 LAD2 GND 11 VBAT 12 18 GND XtalI/32K in 13 XtalO 14 2 27 SERIRQ 19 VCC 17 LAD3 16 LRESET# 15 CLKRUN# ATest GND SB3V GPIO6 NC TestI TestBI VCC GND VBAT 40 39 38 37 36 35 34 33 32 31 ATest 3 GND 4 1 2 3 4 5 6 7 8 9 10 30 29 28 27 26 25 24 23 22 21 LAD0 GND VCC LAD1 LFRAME# LCLK LAD2 VCC GND LAD3 11 12 13 14 15 16 17 18 19 20 28 LPCPD# NBO XTALI/32K in XTALO NBO NBO NBO NBO NBO CLKRUN# LRESET# ATest 1 ATest 2 ATest ATest LPCPD# SERIRQ NBO NBO NBO NBO NBO NBO 28-pin TSSOP 6.1 mm x 9.7 mm Body 0.65 mm Pitch AT97SC3203 5116DS-TPM-1/08 AT97SC3203 Figure 2-2. AT97SC3203 Block Diagram ROM Program EEPROM Program 33 MHz LPC Interface AVR 8-bit RISC CPU SRAM EEPROM Data GPIO6 GPIO RNG VBAT 32.768 kHz CRYPTO Engine RTC (Optional) Timer Physical Security Circuitry 2. Description (continued) The TPM includes a hardware random number generator, including a FIPS-approved Pseudo Random Number Generator, that is used for key generation and TCG protocol functions. The RNG is also available to the system to generate random numbers that may be needed during normal operation. The chip uses a dynamic internal memory management scheme to store multiple RSA keys. Other than the standard TCG commands (TPM_FlushSpecific, TPM_Loadkey2), no system intervention is required to manage this internal key cache. The TPM is offered to OEM and ODM manufacturers as a turnkey solution, including the firmware integrated on the chip. In addition, Atmel provides the necessary device driver software for integration into certain operating systems, along with BIOS drivers. Atmel will also provide manufacturing support software for use by OEMs and ODMs during initialization and verification of the TPM during board assembly. Full documentation for TCG primitives can be found in the TCG TPM Main Specification, Parts 1 - 3, on the TCG Web site located at https://www.trustedcomputinggroup.org/. TPM features specific to PC Client platforms are specified in the "TCG PC Client Specific TPM Interface Specification, Version 1.2", also available on the TCG web site. Implementation guidance for 32bit PC platforms is outlined in the "TCG PC Client Specific Implementation Specification for Conventional BIOS for TCG Version 1.2", also available on the TCG web site. 3 5116DS-TPM-1/08 3. Ordering Information Table 3-1. Ordering Information Ordering Code (1) Package Operation Range AT97SC3203 28A3 (28-pin TSSOP) Lead-free, RoHS Commercial (0C to 70C) AT97SC3203(1) 40ML1 (40-pin QFN) Lead-free, RoHS Commercial (0C to 70C) Note: 4 1. Please see the AT97SC3203 datasheet addendum for the complete catalog number ordering code. AT97SC3203 5116DS-TPM-1/08 AT97SC3203 4. Package Drawing 28A3 - TSSOP b L L1 E E1 e End View Top View COMMON DIMENSIONS (Unit of Measure = mm) D A A2 SYMBOL D MIN 9.60 E Side View MAX NOTE 9.70 9.80 2, 5 3, 5 8.10 BSC E1 6.00 6.10 6.20 A - - 1.20 A2 0.80 1.00 1.05 b 0.19 - 0.30 e L L1 Notes: NOM 4 0.65 BSC 0.45 0.60 0.75 1.00 REF 1. This drawing is for general information only. Please refer to JEDEC Drawing MO-153, Variation DB for additional information. 2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed 0.15 mm (0.006 in) per side. 3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25 mm (0.010 in) per side. 4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07 mm. 5. Dimension D and E1 to be determined at Datum Plane H. 1/8/02 R 2325 Orchard Parkway San Jose, CA 95131 TITLE 28A3, 28-lead, 6.1 x 9.7 mm Body, 0.65 pitch, Thin Shrink Small Outline Package (TSSOP) DRAWING NO. 28A3 REV. A 5 5116DS-TPM-1/08 40ML1 - QFN A A1 D N A2 A3 1 Pin 1 Indicator 2 3 E Top View L 0 Side View COMMON DIMENSIONS (Unit of Measure = mm) D2 SYMBOL E2 3 2 b 1 N e PIN1 ID Bottom View Notes: MIN NOM D 6.00 BSC E 6.00 BSC MAX D2 3.95 4.10 4.25 E2 3.95 4.10 4.25 A - 0.85 0.90 A1 0.0 0.01 0.05 A2 - 0.65 0.70 A3 L 0.20 REF 0.30 e b NOTE 0.40 0.50 0.50 BSC 0.18 0.23 0.30 2 1. This drawing is for general information only. Refer to JEDEC Drawing MO-220, Variation WJJD-2, for proper dimensions, tolerances, datums, etc. 2. Dimension b applies to metallized terminal and is measured between 0.15 mm and 0.30 mm from the terminal tip. If the terminal has the optional radius on the other end of the terminal, the dimension should not be measured in that radius area. 9/27/07 R 6 TITLE 2325 Orchard Parkway 40ML1, 40-lead 6.0 x 6.0 mm Body, 0.50 mm Pitch, Molded Quad San Jose, CA 95131 Flat No Lead Package (QFN) Punched DRAWING NO. 40ML1 REV. C AT97SC3203 5116DS-TPM-1/08 AT97SC3203 Revision History Doc. Rev. Date Comments 5116DS 1/2008 Implemented revision history. 7 5116DS-TPM-1/08 Headquarters International Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Atmel Europe Le Krebs 8, Rue Jean-Pierre Timbaud BP 309 78054 Saint-Quentin-enYvelines Cedex France Tel: (33) 1-30-60-70-00 Fax: (33) 1-30-60-71-11 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Technical Support pcsecurity@atmel.com Sales Contact www.atmel.com/contacts Product Contact Web Site www.atmel.com Literature Requests www.atmel.com/literature Disclaimer: The information in this document is provided in connection with Atmel products. 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