SSM3K333R
2014-03-01
1
TOSHIBA Field-Effect Transistor Silicon N-Channel MOS Type (U-MOS VII-H)
SSM3K333R
○ Power Management Switch Applications
○ High-Speed Switching Applications
• 4.5V drive
• Low ON-resistance: RDS(ON) = 42 mΩ (max) (@VGS = 4.5 V)
: RDS(ON) = 28 mΩ (max) (@VGS = 10 V)
Absolute Maximum Ratings (Ta = 25°C)
Characteristic Symbol Rating Unit
Drain-source voltage VDSS 30 V
Gate-source voltage VGSS ±20 V
DC ID (Note1) 6
Drain current
Pulse IDP (Note1) 12
A
PD (Note 2) 1
Power dissipation
t = 10s 2
W
Channel temperature Tch 150 °C
Storage temperature range Tstg −55 to 150 °C
Note: Using continuously under heavy loads (e.g. the application of high
temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the
reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are
within the absolute maximum ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: The channel temperature should not exceed 150°C during use.
Note 2: Mounted on a FR4 board.
(25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 645 mm2)
Marking Equivalent Circuit
(top view)
Unit: mm
JEDEC ―
JEITA ―
TOSHIBA 2-3Z1A
Weight: 11 mg (typ.)
1. Gate
2. Source
3. Drain
SOT-23F
0.17
+0.08
-0.07
2.9±0.2
0.95 0.95
0.42
+0.08
-0.05
1.8±0.1
2.4±0.1
12
3
A
0.05 M
A
+0.08
-0.05
0.8
KFK
1 2
3
1 2
3
Start of commercial production
2010-10
SSM3K333R
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Electrical Characteristics (Ta = 25°C)
Characteristic Symbol Test Conditions Min Typ. Max Unit
V (BR) DSS ID = 10 mA, VGS = 0 V 30 ⎯ ⎯
Drain-source breakdown voltage
V (BR) DSX ID = 10 mA, VGS = −20 V 15 ⎯ ⎯
V
Drain cut-off current IDSS V
DS = 30 V, VGS = 0 V ⎯ ⎯ 1 μA
Gate leakage current IGSS V
GS = ± 20 V, VDS = 0 V ⎯ ⎯ ±0.1 μA
Gate threshold voltage Vth V
DS = 10 V, ID = 0.1 mA 1.3 ⎯ 2.5 V
Forward transfer admittance ⏐Yfs⏐ V
DS = 10 V, ID = 5 A (Note 3) 12 24 ⎯ S
ID = 3.0 A, VGS = 4.5 V (Note 3) ⎯ 25.7 42
Drain–source ON-resistance RDS (ON)
ID = 5.0 A, VGS = 10 V (Note 3) ⎯ 18.7 28
mΩ
Input capacitance Ciss ⎯ 436 ⎯
Output capacitance Coss ⎯ 77 ⎯
Reverse transfer capacitance Crss
VDS = 15V, VGS = 0 V, f = 1 MHz
⎯ 28 ⎯
pF
Total gate charge Qg ⎯ 3.4 ⎯
Gate-source charge Qgs1 ⎯ 1.8 ⎯
Gate-drain charge Qgd
VDD = 15V, ID = 6.0 A
VGS = 4.5V ⎯ 1.0 ⎯
nC
Turn-on time ton ⎯ 12 ⎯
Switching time
Turn-off time toff
VDD = 15 V, ID = 3.0 A,
VGS = 0 to 4.5 V, RG = 10 Ω ⎯ 9 ⎯
ns
Drain-source forward voltage VDSF I
D = -6.0 A, VGS = 0 V (Note 3)
⎯ -0.85 -1.2 V
Note 3: Pulse test
Switching Time Test Circuit
Usage Considerations
Let Vth be the voltage applied between gate and source that causes the drain current (ID) to below (0.1 mA for the
SSM3K333R). Then, for normal switching operation, VGS(on) must be higher than Vth, and VGS(off) must be lower than
Vth. This relationship can be expressed as: VGS(off) < Vth < VGS(on).
Take this into consideration when using the device.
Handling Precaution
When handling individual devices that are not yet mounted on a circuit board, make sure that the environment is
protected against electrostatic discharge. Operators should wear antistatic clothing, and containers and other objects that
come into direct contact with devices should be made of antistatic materials.
Thermal resistance Rth (ch-a) and Power dissipation PD vary depending on board material, board area, board thickness
and pad area. When using this device, please take heat dissipation into consideration.
4.5V
(b) VIN
(c) VOUT
0 V 10%
90%
ton t
off
VDD
VDS (ON) tr t
f
90%
10%
(a) Test Circuit
VDD = 15 V
RG = 10 Ω
Duty ≤ 1%
VIN: tr, tf < 5 ns
Common Source
Ta = 25°C
0
4.5 V IN OUT
VDD
10 μs
RG
SSM3K333R
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Ambient temperature Ta (°C)
Vth – Ta
Gate threshold voltage Vth (V)
2.5
0
−50 0150
1.0
50 100
Common Source
VDS = 10V
ID = 0.1 mA
Drain–source ON-resistance
RDS (ON) (mΩ)
0
Gate–source voltage VGS (V)
0
50
100
RDS (ON) – VGS
10 20
25 °C
Ta = 100 °C
− 25 °C
Ambient temperature Ta (°C)
RDS (ON) – Ta
Drain–source ON-resistance
RDS (ON) (mΩ)
0
−50 0 50 150
100
100
50
ID = 5.0 A / VGS = 10 V
3.0 A / 4.5 V
Drain–source voltage VDS (V)
ID – VDS
Drain current ID (A)
0
0
0.4 0.6 1.0
2
0.8
0.2
4
12
6
8
10 V
4.5 V
10
Gate–source voltage VGS (V)
ID – VGS
Drain current ID (A)
Drain current ID (A)
RDS (ON) – ID
Drain–source ON-resistance
RDS (ON) (mΩ)
0 2 12
6
0
50
100
48
VGS = 10 V
4.5 V
10
Common Source
Ta = 25 °C
Pulse test
ID =3.0A
Common Source
Pulse test
Common Source
Ta = 25°C
Pulse test
Common Source
Pulse test
VGS = 4.0 V
1.5
2.0
0.5
100
1.0
0.1
1
0.001
0.01
0.0001
4.0
2.0
10
Ta = 100 °C
− 25 °C
25 °C
Common Source
VDS = 10 V
Pulse test
3.0
SSM3K333R
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Total Gate Charge Qg (nC)
Dynamic Input Characteristic
Gate–source voltage VGS (V)
0
0 4 6
4
8
10
10
6
2
Common Source
ID = 6.0A
Ta = 25°C
VDD=24 V
VDD=15 V
Drain–source voltage VDS (V)
C – VDS
Capacitance C (pF)
10
0.1 1 10 100
100
1000
300
30 Common Source
Ta = 25 °C
f = 1 MHz
VGS = 0 V
Ciss
Coss
Crss
Drain reverse current IDR (A)
Drain–source voltage VDS (V)
IDR – VDS
100
0
1
10
0.01
0.1
0.001
-0.2 -0.6
-0.4 -1.2 -0.8
Common Source
VGS = 0 V
Pulse test
G
D
S
IDR
100 °C
−25 °C
25 °C
-1.0
Drain current ID (A)
Switching time t (ns)
t – ID
1
0.01
100
0.1
1000
1 100
10
10
Common Source
VDD = 15 V
VGS = 0 to 4.5 V
Ta = 25 °C
RG = 10 Ω
toff
tf
ton
t
r
Pulse width tw (s)
Rth – tw
Transient thermal impedance Rth (°C/W )
0.001 10000.01 0.1 1 100
10
100
1000
1
10
Single pulse
a. Mounted on FR4 board
(25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 645 mm2)
b. Mounted on FR4 board
(25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 0.72 mm2×3)
b
a
Ambient temperature Ta (°C)
PD – Ta
Power dissipation PD (mW)
1600
0
400
120 100 140
800
160 80 60 40 20 0 -20 -40
a
1200
a: Mounted on FR4 board
(25.4mm × 25.4mm × 1.6 mm , Cu Pad : 645 mm2)
b: Mounted on FR4 board
(25.4mm × 25.4mm × 1.6 mm , Cu Pad : 0.72 mm2 ×3)
b
8
2
SSM3K333R
2014-03-01
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