For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
General Description
The MAX1798/MAX1798A/MAX1799/MAX1799A system
power supplies are designed specifically for CDMA cel-
lular/PCS handsets. Each device contains five low-
dropout linear regulators (LDOs), a 140ms (min) reset
timer, a serial interface, push-on/push-off control logic,
and two general-purpose open-drain outputs. Only the
serial interface is different between the MAX1798/
MAX1798A/MAX1799/MAX1799A: the MAX1798/
MAX1798A feature an SPI™-compatible serial interface,
and the MAX1799/MAX1799A feature an I2C-compati-
ble interface. The “A” parts have a -13% reset thresh-
old, the non-A parts have a 9.5% threshold. The “A”
parts have a 175 delay on a reset-triggered shutdown,
the non-A shutdown instantly.
Each linear regulator features extremely low dropout
voltage, specified at two-thirds of the maximum output
current. LDO1 is rated for 300mA, while LDOs 2–5 are
each rated for 150mA. All LDOs are optimized for low
noise and isolation. Each LDO can be individually
enabled and disabled through the serial port, as well as
individually programmed to any of 32 voltages from
1.8V to 3.3V.
The MAX1798/MAX1798A/MAX1799/MAX1799As’ wide
2.5V to 5.5V input voltage range makes them compati-
ble with a wide range of input supplies, including a sin-
gle lithium-ion (Li+) cell battery. Both devices are
available in thermally-enhanced 20-pin TSSOP and
TQFN exposed pad (EP) packages. Evaluation kits in
TSSOP (MAX1798EVKIT and MAX1799EVKIT) are avail-
able to facilitate designs.
Features
oOne 300mA Low-Noise LDO
oFour 150mA Low-Noise LDOs
o45µVRMS Noise from 10Hz to 100kHz
o>60dB Crosstalk Isolation Below 10kHz
o>60dB PSRR Below 10kHz
o125mV (max) Dropout (OUT1 at 200mA)
o100mV (max) Dropout (OUT2–5 at 100mA)
oProgrammable Output Voltages
1.8V to 3.3V in 32 Steps
o140ms (min) Reset Timer
oSPI- or I2C-Compatible Serial Interface
oPush-On/Push-Off Control Logic
oTwo 150mA General Purpose Open-Drain Outputs
oOvercurrent and Thermal Protection (all LDOs)
o1µA Shutdown Current
o20-Pin Thermally-Enhanced TSSOP or TQFN
Packages
Applications
CDMA Cellular/PCS Handsets
PDAs, Palmtops, and Handy-Terminals
Single-Cell Li+ Systems
2- or 3-Cell NiMH, NiCd, or Alkaline Systems
MAX1798/MAX1798A/MAX1799/MAX1799A
CDMA Cellular/PCS System
Power Supplies
________________________________________________________________
Maxim Integrated Products
1
19-1655; Rev 2; 5/10
EVALUATION KIT MANUAL
AVAILABLE
SPI is a trademark of Motorola, Inc.
Ordering Information continued and Pin Configurations
appear at end of data sheet.
( ) ARE FOR MAX1799/MAX1799A.
*-13% RESET THRESHOLD AND SHUTDOWN RESET TIMER ADDED.
BACKLIGHT
GND PGND EP
MAX1798
MAX1798A*
MAX1799
MAX1799A*
0.01µFDR2
OUT3 RX
OUT4 BBA
OUT5 AUDIO OR
PLL + VCO
OUT2 TX
BP
IN1
IN2/3
SPI OR I2C
CS (AS)
DIN (SDA)
SCLK (SCK)
ON
DR1
VIN1
VIBRATOR
OUT1
OFF
ONO
RSO RESET
VCC
WDOUT
IRQ
MSM CONTROLLER
2.5V
TO 5.5V
IN4/5
Typical Operating Circuit
Ordering Information
PA RT TEMP
RANGE
PIN-
PACKAGE
INTER-
FACE
M A X17 98E TP+ -40°C to +85°C20 TQFN SPI
M AX1798E U P +-40°C to +85°C20 TS SOP -EP * SPI
M A X17 98A ETP+ -40°C to +85°C20 TQFN SPI
M AX1798AE UP+ -40°C to +85°C20 TS SOP -EP * SPI
+
Denotes a lead(Pb)-free/RoHS-compliant package.
*
EP = Exposed pad.
MAX1798/MAX1798A/MAX1799/MAX1799A
CDMA Cellular/PCS System
Power Supplies
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
-ELECTRICAL CHARACTERISTICS
(VIN1 = VIN2/3 = VIN4/5 = VSCLK (SCK) = VDIN (SDA) = VCS (AS) = V OFF = 3.6V; ON = GND = PGND = 0; RSO, ONO, DR1, DR2 =
open; BP bypassed with 0.01µF, OUT1 bypassed with 4.7µF; OUT2, OUT3, OUT4, OUT5 bypassed with 2.2µF; OUT1–5 set to 2.98V,
TA= 0°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
OFF, DR1, DR2 to GND............................................-0.3V to +6V
IN1, IN2/3, IN4/5, DIN (SDA) to GND .......................-0.3V to +6V
SCLK (SCK), BP, ON to GND...................................-0.3V to +6V
RSO, ONO to GND .................................-0.3V to (VOUT1 + 0.3V)
PGND to GND.....................................................................±0.3V
OUT1, CS (AS) to GND ..............................-0.3V to (VIN1 + 0.3V)
OUT2, OUT3 to GND...............................-0.3V to (VIN2/3 + 0.3V)
OUT4, OUT5 to GND...............................-0.3V to (VIN4/5 + 0.3V)
Continuous Sink Current
DR1, DR2...............................................................100mARMS
RSO................................................................................25mA
Continuous Power Dissipation (TA= +70°C)
20-Pin TQFN (derate 33.8mW/°C above +70°C) ...............2W
20-Pin TSSOP (derate 37.7mW/°C above +70°C) .............2W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Output Voltage Noise
f = 10Hz to 100kHz, C
OUT
= 4.7µF
45
µV
RMS
OUT1 Reset Threshold
OUT1 rising and
falling
-15 -13 -11
%
IN2/3 rising edge
IN1 rising edge
OUT1 ON, other regulators OFF IOUT1 = 0
All regulators ON, IOUT_ = 0
IN4/5 rising edge
IN1 falling edge
OFF = 0, ON = IN1
CONDITIONS
µA367 680Supply Current (All Outputs On)
V2.10 2.30 2.45VUVLO-2/3
Undervoltage Lockout IN2/3
V2.10 2.30 2.45VUVLO-1
V2.5 5.5
IN1, IN2/3, IN4/5 Operating
Voltage
Undervoltage Lockout IN1
µA113 230ION
Supply Current (Standby)
V2.10 2.30 2.45VUVLO-4/5
Undervoltage Lockout IN4/5
V0.9 2.1Power-On Reset Threshold
µA110ISHDN
Supply Current in Shutdown
UNITSMIN TYP MAXSYMBOLPARAMETER
IBP ≤1nA
2.5V ≤VIN1 ≤5.5V mV0.2 5BP Supply Rejection
V1.231 1.250 1.269BP Voltage
IOUT1 = 70mA (Note 3) -2 2Output Accuracy %
Output Accuracy
(Line and Load)
1mA ≤IOUT1 ≤300mA,
2.5V ≤VIN1 ≤5.5V, VOUT1 = 1.8V (Note 3) -3 3 %
Nominal Voltage Adjust Range 32 steps through serial interface; Tables 2, 3 1.8 3.3 V
IOUT1 = 1mA (Notes 1, 3) 1
Dropout Voltage IOUT1 = 200mA (Notes 1, 3) 73 125 mV
Load Regulation 0.1mA ≤IOUT1 ≤300mA -0.003 %/mA
Line Regulation 2.5V ≤VIN1 ≤5.5V, VOUT1 = 1.8V (Note 3) -0.15 -0.03 0.11 %/V
Current Limit 320 500 850 mA
Output-Discharge Switch
Resistance in Shutdown Regulator output turned off 25 300 Ω
-9.5 -7.5 -5.5
OUT1 REGULATOR
(MAX1798/MAX1799)
(MAX1798A/MAX1799A)
MAX1798/MAX1798A/MAX1799/MAX1799A
CDMA Cellular/PCS System
Power Supplies
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VIN1 = VIN2/3 = VIN4/5 = VSCLK (SCK) = VDIN (SDA) = VCS (AS) = V OFF = 3.6V; ON = GND = PGND = 0; RSO, ONO, DR1, DR2 =
open; BP bypassed with 0.01µF, OUT1 bypassed with 4.7µF; OUT2, OUT3, OUT4, OUT5 bypassed with 2.2µF; OUT1–5 set to 2.98V,
TA= 0°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.)
µVRMS
45f = 10Hz to 100kHz, COUT = 2.2µFOutput Voltage Noise
Line Regulation -0.15 -0.02 0.11 %/V2.5V ≤VIN_ ≤5.5V, VOUT_ = 1.8V (Note 3)
0.6IDIN (SDA) = 6mA
Nominal Voltage Adjust Range 1.8 3.3 V32 steps through serial interface; Tables 2, 3
°C10Hysteresis
°C160Threshold
µA-1 1VDR1 = VDR2 = 5.5VIOFF
DR1, DR2 OFF Current
(Leakage)
V0.2 0.5IDR1 = IDR2 = 100mA (Note 3)DR1, DR2 Output Low Level
kΩ9 14 19
RSO = 2.48VRSO Reset Resistance
V
VOUT1 -
0.5
IRSO = 0
RSO Output High Level
(Internal Pullup Resistor)
V0.5IRSO = 1mA, VIN1 = 1V
RSO Output Low Level
V
VOUT1 -
0.5
IONO = -1mAONO Output High Level
V0.05 0.5IONO = 1mAONO Output Low Level
kΩ80 155 360
OFF = 5.5VOFF Pulldown Resistance
V
0.4IDIN (SDA) = 3mA
SDA Output Low Level
(MAX1799 only)
V1.6VIH
Input High Level
V0.4
V
IL
Input Low Level
ms
35 60 110Watchdog Timer
ms140 235 430Reset Timer
Ω110 300Regulator output turned off
Output-Discharge Switch
Resistance
PARAMETER SYMBOL MIN TYP MAX UNITS
1
Output Accuracy
(Line and Load) -3 3 %
Dropout Voltage 50 100 mV
-2 2Output Accuracy %
CONDITIONS
IOUT_ = 1mA (Notes 1, 3)
1mA ≤IOUT_ ≤150mA,
2.5V ≤VIN_ ≤5.5V, VOUT_ = 1.8V (Note 3)
IOUT_ = 100mA (Notes 1, 3)
Load Regulation -0.005 %/mA
Current Limit
IOUT_ = 50mA (Note 3)
160 250 500 mA
1mA ≤IOUT_ ≤150mA
ms
175 295 540
OUT1 Shutdown Timer
(MAX1798A/MAX1799A only)
THERMAL SHUTDOWN
LOGIC AND CONTROL INPUTS (ON, OFF, RSO, DIN (SDA), SCLK (SCK), CS (AS))
OUT2–5 REGULATORS
MAX1798/MAX1798A/MAX1799/MAX1799A
CDMA Cellular/PCS System
Power Supplies
4 _______________________________________________________________________________________
ns50tSP
Maximum Pulse Width of Spikes
that Must Be Suppressed by the
Input Filter of Both SDA and
SCK Signals
ns100tSU_DAT
Data Setup Time
CONDITIONS
µs0tHD_DAT
Data Hold Time
µs1.3tBUF
Bus-Free Time Between START
and STOP
kHz400
SCK
Clock Frequency
µs0.6tSU_STA
Setup Time Repeated START
Condition
µs0.6tHD_STA
Hold Time Repeated START
Condition
µs1.3tLOW
SCK Low Period
µs0.6tHIGH
SCK High Period
UNITSMIN TYP MAXSYMBOLPARAMETER
Setup Time for STOP Condition tSU_STO 0.6 µs
SCLK Clock Frequency fSCLK 2MHz
SCLK Low Period tcl 125 ns
SCLK High Period tch 125 ns
Data Hold Time tHD_DAT 0ns
Data Setup Time tSU_DAT 125 ns
CS Assertion to SCLK Rising
Edge Setup Time tCSS 200 ns
CS Deassertion to SCLK Rising
Edge Setup Time tCS1 200 ns
SCLK Rising Edge to CS
Deassertion tCSH 200 ns
SCLK Rising Edge to CS
Assertion tCSO 200 ns
CS High Period tCSW 300 ns
I2C (SMB) TIMING (MAX1799/MAX1799A)
SPI TIMING (MAX1798/MAX1798A)
ELECTRICAL CHARACTERISTICS (continued)
(VIN1 = VIN2/3 = VIN4/5 = VSCLK (SCK) = VDIN (SDA) = VCS (AS) = V OFF = 3.6V; ON = GND = PGND = 0; RSO, ONO, DR1, DR2 =
open; BP bypassed with 0.01µF, OUT1 bypassed with 4.7µF; OUT2, OUT3, OUT4, OUT5 bypassed with 2.2µF; OUT1–5 set to 2.98V,
TA= 0°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.)
OUT1 rising and
falling
MAX1798/MAX1798A/MAX1799/MAX1799A
CDMA Cellular/PCS System
Power Supplies
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS
(VIN1 = VIN2/3 = VIN4/5 = VSCLK (SCK) = VDIN (SDA) = VCS (AS) = V OFF = 3.6V; ON = GND = PGND = 0; RSO, ONO, DR1, DR2 =
open; BP bypassed with 0.01µF, OUT1 bypassed with 4.7µF; OUT2, OUT3, OUT4, OUT5 bypassed with 2.2µF; OUT1–5 set to 2.98V,
TA= -40°C to +85°C, unless otherwise noted.) (Note 2)
Ω300Regulator output turned off
Output-Discharge Switch
Resistance in Shutdown
mA320 850 Current Limit
%/V-0.15 0.112.5V ≤VIN1 ≤5.5V, VOUT1 = 1.8V (Note 3)Line Regulation
mV125IOUT1 = 200mA (Notes 1, 3)Dropout Voltage
V1.8 3.332 steps through serial interface; Tables 2, 3Nominal-Voltage Adjust Range
%-3.5 3.5
1mA ≤IOUT1 ≤300mA,
2.5V ≤VIN1 ≤5.5V, VOUT1 = 1.8V (Note 3)
Output Accuracy
(Line and Load)
%-2.5 2.5IOUT1 = 70mA (Note 3)Output Accuracy
BP Voltage 1.225 1.275 VIBP ≤1nA
PARAMETER SYMBOL MIN TYP MAX UNITS
Supply Current in Shutdown ISHDN 10 µA
Power-On Reset Threshold 0.9 2.1 V
Undervoltage Lockout IN4/5 VUVLO-4/5 2.10 2.45 V
Supply Current (Standby) ION 230 µA
Undervoltage Lockout IN1
IN1, IN2/3, IN4/5 Operating
Voltage 2.5 5.5 V
VUVLO-1 2.10 2.45 V
Undervoltage Lockout IN2/3 VUVLO-2/3 2.10 2.45 V
Supply Current (All Outputs On) 680 µA
CONDITIONS
OFF = 0, ON = IN1
IN1 falling edge
IN4/5 rising edge
All regulators ON, IOUT_ = 0
OUT1 ON, other regulators OFF IOUT1 = 0
(Note 1)
IN1 rising edge
IN2/3 rising edge
%-2.5 2.5IOUT_ = 50mA (Note 3)Output Accuracy
%-3.5 3.5
1mA ≤IOUT_ ≤150mA,
2.5V ≤VIN_ ≤5.5V, VOUT_ = 1.8V (Note 3)
Output Accuracy
(Line and Load)
V1.8 3.332 steps through serial interface; Tables 2, 3Nominal-Voltage Adjust Range
mV100IOUT_ = 100mA (Notes 1, 3)Dropout Voltage
%/V-0.15 0.112.5V ≤VIN_ ≤5.5V, VOUT_ = 1.8V (Note 3)Line Regulation
mA160 500 Current Limit
Ω300Regulator output turned off
Output-Discharge Switch
Resistance in Shutdown
%
-9.5 -5.5
-15 -11
OUT1 Reset Threshold MAX1798/MAX1799
MAX1798A/MAX1799A
OUT1 REGULATOR
OUT2–5 REGULATORS
CDMA Cellular/PCS System
Power Supplies
6 _______________________________________________________________________________________
µs0.6tSU_STO
Setup Time for STOP Condition
ns100tSU_DAT
Data Setup Time
µs089tHD_DAT
Data Hold Time
µs0.6tSU_STA
Setup Time Repeated START
Condition
µs0.6tHIGH
SCK High Period
µs1.3tLOW
SCK Low Period
µs0.6tHD_STA
Hold Time Repeated START
Condition
µs1.3tBUF
Bus-Free Time Between START
and STOP
kHz400
SCK
Clock Frequency
0.6IDIN (SDA) = 6mA
µA-1 1VDR1 = VDR2 = 5.5VIOFF
DR1, DR2 OFF Current
(Leakage)
V0.5IDR1 = IDR2 = 100mA (Note 3)DR1, DR2 Output Low Level
kΩ9 19
RSO = 2.48VRSO Reset Resistance
V
VOUT1 -
0.5
IRSO = 0
RSO Output High Level
(Internal Pullup Resistor)
PARAMETER SYMBOL MIN TYP MAX UNITS
V0.5IRSO = 1mA, VIN1 = 1V
RSO Output Low Level
V
VOUT1 -
0.5
IONO = -1mAONO Output High Level
V0.5IONO = 1mAONO Output Low Level
kΩ80 360
OFF = 5.5VOFF Pulldown Resistance
µA-1 1
0 ≤VIN ≤VIN1; ON, DIN (SDA),
SCLK (SCK), and CS (AS) only
Logic Input Current
V
0.4IDIN (SDA) = 3mA
SDA Output Low Level
(MAX1799 only)
V1.6VIH
Input High Level
V0.4VIL
Input Low Level
ms35 110Watchdog Timer
CONDITIONS
ms140 430Reset Timer
ms175 540
OUT1 Shutdown Timer
(MAX1798A/MAX1799A only)
LOGIC AND CONTROL INPUTS (ON, OFF, RSO DIN (SDA), SCLK (SCK), CS (AS))
I2C (SMB) TIMING (MAX1799/MAX1799A)
ELECTRICAL CHARACTERISTICS (continued)
(VIN1 = VIN2/3 = VIN4/5 = VSCLK (SCK) = VDIN (SDA) = VCS (AS) = V OFF = 3.6V; ON = GND = PGND = 0; RSO, ONO, DR1, DR2 =
open; BP bypassed with 0.01µF, OUT1 bypassed with 4.7µF; OUT2, OUT3, OUT4, OUT5 bypassed with 2.2µF; OUT1–5 set to 2.98V,
TA= -40°C to +85°C, unless otherwise noted.) (Note 2)
MAX1798/MAX1798A/MAX1799/MAX1799A
MAX1798/MAX1798A/MAX1799/MAX1799A
CDMA Cellular/PCS System
Power Supplies
_______________________________________________________________________________________ 7
Note 1: The dropout voltage is defined as (VIN - VOUT) when VOUT is 100mV below the value of VOUT for VIN = VOUT + 1V.
Note 2: Specifications to -40°C are guaranteed by design, not production tested.
Note 3: Specifications are guaranteed by design, not production tested in the ETP (TQFN) packages.
CONDITIONS
SCLK Clock Frequency fSCLK 2MHz
SCLK Low Period tcl 125 ns
SCLK High Period tch 125 ns
Data Hold Time tHD_DAT 0ns
Data Setup Time tSU_DAT 125 ns
CS Assertion to SCLK Rising
Edge Setup Time tCSS 200 ns
CS Deassertion to SCLK Rising
Edge Setup Time tCS1 200 ns
SCLK Rising Edge to CS
Deassertion tCSH 200 ns
SCLK Rising Edge to CS
Assertion tCSO 200 ns
CS High Period tCSW 300 ns
UNITSMIN TYP MAXSYMBOLPARAMETER
ELECTRICAL CHARACTERISTICS (continued)
(VIN1 = VIN2/3 = VIN4/5 = VSCLK (SCK) = VDIN (SDA) = VCS (AS) = V OFF = 3.6V; ON = GND = PGND = 0; RSO, ONO, DR1, DR2 =
open; BP bypassed with 0.01µF, OUT1 bypassed with 4.7µF; OUT2, OUT3, OUT4, OUT5 bypassed with 2.2µF; OUT1–5 set to 2.98V,
TA= -40°C to +85°C, unless otherwise noted.) (Note 2)
SPI TIMING (MAX1798/MAX1798A)
OUTPUT VOLTAGE ACCURACY (OUT1)
vs. LOAD CURRENT
-2.0
-1.0
-1.5
0
-0.5
1.5
1.0
0.5
2.0
0 10050 150 200 250 300
MAX1798/99-01
LOAD CURRENT (mA)
ACCURACY (%)
VOUT1 = 3.3V
VOUT1 = 1.8V VOUT1 = 2.98V
OUTPUT VOLTAGE ACCURACY (OUT2–5)
vs. LOAD CURRENT
-2.0
-1.0
-1.5
0
-0.5
1.5
1.0
0.5
2.0
05025 75 100 125 150
MAX1798/99-02
LOAD CURRENT (mA)
ACCURACY (%)
VOUT1 = 1.8V
VOUT1 = 3.3V
VOUT1 = 2.98V
-2.0
-1.0
-1.5
0
-0.5
1.5
1.0
0.5
2.0
-40 10-15 35 60 85
OUTPUT VOLTAGE ACCURACY (OUT1)
vs. TEMPERATURE
MAX1798/99-03
TEMPERATURE (°C)
ACCURACY (%)
ILOAD = 70mA
VOUT1(NOM) = 2.98V
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
MAX1798/MAX1798A/MAX1799/MAX1799A
CDMA Cellular/PCS System
Power Supplies
8 _______________________________________________________________________________________
f = 10Hz TO 100kHz
CBP = 0.01µF
1 10 100 1000
OUTPUT NOISE vs. LOAD CURRENT
MAX1798/99-10
LOAD CURRENT (mA)
OUTPUT NOISE (µVRMS)
60
0
10
20
30
40
50
OUT1 = 2.98V
COUT1 = 4.7µF
OUT2–5 = 2.98V
COUT2–5 = 2.2µF
100µs/div
OUTPUT NOISE
MAX1798/99-11
VOUT, 50µV/div
f = 10Hz TO 100kHz
COUT2 = 2.2µF, ILOAD = 10mA
CBP = 0.01µF
70
0.1 10 1001 1000
CHANNEL-TO-CHANNEL ISOLATION
vs. FREQUENCY
MAX1798/99-12
FREQUENCY (kHz)
CHANNEL-TO-CHANNEL ISOLATION (dB)
0
10
20
30
40
50
60
OUT2/3 = 2.98V
COUT2/3 = 2.2µF
ILOAD = 100mA
CBP = 0.01µF
100
130
120
110
140
150
160
170
180
190
200
0 10050 150 200 250 300
GROUND-PIN CURRENT (OUT1)
vs. LOAD CURRENT
MAX1798/99-04
LOAD CURRENT (mA)
GROUND-PIN CURRENT (µA)
VIN1 = 3.6V
OUT2–5 OFF
VOUT1 = 2.98V
VOUT1 = 3.3V
VOUT1 = 1.8V
VOUT1 = 2.98V
0
100
50
200
150
350
300
250
400
2.0 3.02.5 3.5 4.0 4.5 5.0 5.5
GROUND-PIN CURRENT (OUT1)
vs. SUPPLY VOLTAGE (VIN1)
MAX1798/99-05
SUPPLY VOLTAGE (V)
GROUND-PIN CURRENT (µA)
ILOAD = 0
ILOAD = 200mA
140
160
150
180
170
190
200
-40 10 35 60-15 85
GROUND-PIN CURRENT (OUT1)
vs. TEMPERATURE
MAX1798/99-06
TEMPERATURE (°C)
GROUND-PIN CURRENT (µA)
VIN = 3.6V
ILOAD = 200mA
0
50
25
100
75
125
150
0 100 15050 200 250 300
DROPOUT VOLTAGE (OUT1)
vs. LOAD CURRENT
MAX1798/99-07
LOAD CURRENT (mA)
DROPOUT VOLTAGE (mV)
TA = +25°C
TA = +85°C
TA = -40°C
0
50
25
100
75
125
150
0507525 100 125 150
DROPOUT VOLTAGE (OUT2–5)
vs. LOAD CURRENT
MAX1798/99-08
LOAD CURRENT (mA)
DROPOUT VOLTAGE (mV)
TA = +25°C
TA = +85°C
TA = -40°C VOUT_ = 2.98V
ILOAD = 10mA
CBP = 0.01µF
90
0.01 0.1 1 10 100 1000
80
50
40
60
70
30
20
10
0
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY
MAX1798/99-09
FREQUENCY (kHz)
PSRR (dB)
COUT1 = 4.7µF
COUT2–5 = 2.2µF
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
MAX1798/MAX1798A/MAX1799/MAX1799A
CDMA Cellular/PCS System
Power Supplies
_______________________________________________________________________________________ 9
20µs/div
LINE-TRANSIENT RESPONSE
MAX1798/99-13
VOUT
AC-COUPLED
10mV/div
VIN
500mV/div
VIN = 3.7V TO 4.0V, VOUT = 2.98V
ILOAD = 100mA
2µs/div
LOAD-TRANSIENT RESPONSE
MAX1798/99-14
VOUT1
AC-COUPLED
50mV/div
ILOAD
100mA/div
VIN1 = 3.5V, VOUT1 = 2.98V
ILOAD = 20mA TO 200mA, OUT2/3/4/5 = OFF
2µs/div
LOAD-TRANSIENT RESPONSE
(NEAR DROPOUT)
MAX1798/99-15
VOUT1
AC-COUPLED
50mV/div
ILOAD
100mA/div
VIN1 = 3.1V, VOUT1 = 2.98V
ILOAD = 20mA TO 200mA, OUT2/3/4/5 = OFF
10ms/div
ENTERING SHUTDOWN
MAX1798/99-16
VOUT1
1V/div
OFF
2V/div
ILOAD = 0
40ms/div
STARTUP
MAX1798/99-17
VOUT
2V/div
ON
2V/div
RSO
2V/div
TSSOP/TQFN SAFE OPERATING AREA
(POWER DISSIPATION LIMIT)
TA = +25°C
TA = +85°C
MAX RECOMMENDED INPUT VOLTAGE
MAX TOTAL OUTPUT CURRENT
200
400
300
600
500
900
800
700
1000
2.5 3.53.0 4.0 4.5 5.0 5.5 6.0
MAX1798/99-18
INPUT VOLTAGE (V)
MAXIMUM OUTPUT CURRENT (mA)
VOUT = 2.98V
VOUT = 1.8V
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
MAX1798/MAX1798A/MAX1799/MAX1799A
CDMA Cellular/PCS System
Power Supplies
10 ______________________________________________________________________________________
Pin Description
PIN
TSSOP QFN NAME FUNCTION
119CS (AS) Chip-Select Input for SPI (MAX1798/MAX1798A). Address Select Input for I2C (MAX1799/
MAX1799A).
220
SCLK
(SCK)
Clock Input for Serial Interface. Data is read on the rising edge of the clock. SCLK for
MAX1798/MAX1798A. SCK for MAX1799/MAX1799A.
31
DIN
(SDA)
Data Input for Serial Interface. Data is read on the rising edge of the clock. DIN for
MAX1798/MAX1798A. SDA for MAX1799/MAX1799A.
4 2 ONO On Output. Indicates the state of ON. After initial power-up, the logic level of this pin follows that
of ON. Used to signal the microcontroller (µC) for an OFF request (allows push-on/push-off).
5 3 GND Ground
64BP
1.25V Reference Bypass. Connect a 0.01µF bypass capacitor to GND for reduced noise.
Do not load this pin.
7 5 PGND Power Ground
86RSO
Reset Output. Holds the µC system reset line low during initial startup and whenever OUT1 falls
out of regulation. RSO has a 140ms (min) timeout period and is an open-drain output with an
internal 14kΩ pullup to OUT1. The RSO line maintains a valid low output level for IN1 as low as
1V.
9 7 DR1 2Ω Open-Drain Driver Output 1. Maximum sink current is 150mA (100mARMS). Can drive up to
10 LEDs for backlight or a vibrator motor.
10 8 DR2 2Ω Open-Drain Driver Output 2. Maximum sink current is 150mA (100mARMS). Can drive up to
10 LEDs for backlight or a vibrator motor.
11 9 OFF
OFF Input. A low level to this pin when ON is high turns off the IC once the watchdog timer has
timed out. A high-level input keeps the chip on. There is an internal 155kΩ pulldown resistor at
this input.
12 10 OUT5 Output 5, Output of Linear Regulator 5; 150mA (max) Output Current. Connect a 2.2µF ceramic
bypass capacitor to PGND.
13 11 IN4/5 Supply Inputs 4 and 5. Voltage supply for linear regulators 4 and 5.
14 12 OUT4 Output 4, Output of Linear Regulator 4; 150mA (max) Output Current. Connect a 2.2µF ceramic
bypass capacitor to PGND.
15 13 OUT1 Output 1, Output of Linear Regulator 1; 300mA (max) Output Current. Connect a 4.7µF ceramic
bypass capacitor to PGND.
16 14 IN1 Supply Input 1. Voltage supply for linear regulator 1 and serial interface.
17 15 OUT3 Output 3, Output of Linear Regulator 3; 150mA (max) Output Current. Connect a 2.2µF ceramic
bypass capacitor to PGND.
18 16 IN2/3 Supply Inputs 2 and 3. Voltage supply for linear regulators 2 and 3.
19 17 OUT2 Output 2, Output of Linear Regulator 2; 150mA (max) Output Current. Connect a 2.2µF ceramic
bypass capacitor to PGND
20 18 ON ON Input. An active-low turns on the device, enabling LDO1, RESET, the ON/OFF logic, and the
serial interface.
— — EP Exposed Pad. Connect the exposed pad to a ground plane to provide heat sinking.
MAX1798/MAX1798A/MAX1799/MAX1799A
Detailed Description
The MAX1798/MAX1798A/MAX1799/MAX1799A drive
CDMA cellular and PCS handsets or systems with
inputs from 2.5V to 5.5V. The devices contain five
LDOs, two open-drain outputs, and a reset output as
shown in Figure 1. All outputs are individually program-
mable through either an SPI (MAX1798/MAX1798A) or
I2C (MAX1799/MAX1799A) serial-port interface. The
outputs may be turned on or off individually through the
serial interface. Their output voltages are adjustable
from 1.8V to 3.3V in 32 increments. At power-up, all
outputs are at a default value of 2.98V, but only OUT1
is on. OUT1 is rated for 300mA and optimized for low
dropout. OUT2–5 are rated for 150mA. All LDOs are
optimized for low noise, high isolation, and low dropout.
Linear Regulator 1
Regulator 1 is a low-dropout linear regulator that
sources 300mA (max), operating from a 2.5V to 5.5V
input voltage (VIN1). OUT1 is turned on by using the on
button. OUT1 is turned off by using either the off pin or
the serial port. Its output can be adjusted from 1.8V to
3.3V from the SPI or I2C serial-port interface by setting
the control data byte (Table 1). OUT1 is always on
when the MAX1798/MAX1798A/MAX1799/MAX1799A
are on. If OUT1 is turned off, the entire IC shuts down. If
VIN1 falls below 1V, a POR circuit resets all LDO volt-
ages to 2.98V and OUT1 is left on while OUT2–5 are
turned off.
Linear Regulators 2–5
Regulators 2–5 are LDOs that source 150mA (max)
from input voltages (VIN2/3 and VIN4/5) of 2.5V to 5.5V.
OUT2–5 can be turned on or off and adjusted from 1.8V
to 3.3V through the SPI or I2C serial-port interface by
setting the control data byte (Table 1). At power-up,
OUT2–5 are set to 2.98V, but turned off. The control
data byte must be used to turn them on. If VIN1 falls
below 1V, a POR circuit resets all LDO voltages to
2.98V and OUT2–5 are turned off. If VIN2/3 or VIN4/5 fall
below 2.15V, the UVLO circuit turns off the correspond-
ing output, but all LDO voltages remain at their prior
settings. OUT2–5 are optimized for low noise and high
isolation.
Open-Drain Outputs
The open-drain N-channel MOSFETs (DR1 and DR2,
Figure 2) have a nominal 2Ωon-resistance and can be
used to drive up to 10 LEDs for backlight or a vibrator
motor. DR1 and DR2 can sink 100mARMS (max). At
power-up, DR1 and DR2 are high impedance and are
commanded on by the control data byte.
RSO
RSO is an open-drain output, connected to OUT1
through an internal 14kΩresistor. At power-up, OUT1
turns on and RSO is held low for 140ms (min). When RSO
goes high, OFF must be brought high within 35ms to
keep OUT1 on. Otherwise, if OFF is low, the watchdog
timer circuit counts down 35ms (min), and RSO is
actively held low while the entire device turns off.
The MAX1798/MAX1799 RSO goes low when OUT1
droops by more than 7.5% ±2% of its programmed out-
put voltage. The MAX1798A/MAX1799A RSO goes low
when OUT1 droops by more than 13% ±2% of its pro-
grammed output voltage. RSO stays low for 140ms
(min) after OUT1 rises above the threshold. During this
time, the watchdog timer circuit is inactive.
The MAX1798A/MAX1799A have an additional timer
circuit to shut down the regulators when the RSO and
watchdog timer time out. If the OUT1 voltage level ever
exceeds the RSO threshold level before the reset and
OUT2 DAC
C1
0
C2
0
1
FUNCTION
0
1
0
OUT1 DAC
0
0
1
Update DAC Outputs
0
COMMAND
OUT3 DAC 0
C0
1
OUT4 DAC 1
0
0
OUT5 DAC 1
1
0
Driver Outputs 1
1
0
D4
U5
X
D2D3
U3U4
X
D1
XDR2
DIN (SDA)
D0
U1
DR1
Table 1. Control Data Byte
Note: C2 is MSB, and D0 is LSB. X = Don’t care.
CDMA Cellular/PCS System
Power Supplies
______________________________________________________________________________________ 11
U2
DAC1 (Table 2)
DAC1 (Table 2)
DAC1 (Table 2)
DAC1 (Table 2)
DAC1 (Table 2)
1
ON/OFF Conrol 1 1 ON5 ON3ON4 ON2 ON1
MAX1798/MAX1798A/MAX1799/MAX1799A
CDMA Cellular/PCS System
Power Supplies
12 ______________________________________________________________________________________
( ) *ARE FOR MAX1799.
PGND
GND
10µF
0.01µF
BP
ON
DR1
VBATT
DR2
ONO
14kΩ
ON DETECT
RSO
OFF
2Ω
2ΩVIBRATOR
MOTOR
CONTROL
REGISTERS
(ON/OFF
AND VOUT
PROGRAMMING)
THERMAL SHUTDOWN
1.8V TO 3.3V
150mA AUDIO OR
PLL + VCO
LDO5
(LOW NOISE, 0.5Ω)OUT5
2.2µF
5-BIT DAC
THERMAL SHUTDOWN
1.8V TO 3.3V
150mA
LDO4
(LOW NOISE, 0.5Ω)OUT4
2.2µF
5-BIT DAC
BBA + TCXO
IN4/5
ACTIVE-LOW
RESET
(140ms)
THERMAL SHUTDOWN
1.8V TO 3.3V
300mA
LDO1
(LOW NOISE, 0.3Ω)
OUT1
4.7µF
5-BIT DAC
IN1
OFF ON
MAX1798/MAX1798A
MAX1799/MAX1799A
100kΩ
VBATT
2.5V TO 5.5V
SERIAL PORT
SPI OR I2C
CS (AS)*
DIN (SDA)*
SCLK (SCK)*
155kΩ
THERMAL SHUTDOWN
1.8V TO 3.3V
150mA
LDO3
(LOW NOISE, 0.5Ω)OUT3
2.2µF
5-BIT DAC
THERMAL SHUTDOWN
1.8V TO 3.3V
150mA
LDO2
(LOW NOISE, 0.5Ω)OUT2
2.2µF
5-BIT DAC
TX
RX
IN2/3
RESET
VCC
WDOUT
IRQ
MSM CONTROLLER
ON/OFF
LOGIC
Figure 1. Typical Application Circuit/Functional Diagram
MAX1798/MAX1798A/MAX1799/MAX1799A
CDMA Cellular/PCS System
Power Supplies
______________________________________________________________________________________ 13
watchdog timers time out, the shutdown timer is reset.
The shutdown timer requires continuous low RSO signal
and continuous nontriggered watchdog timer to shut
down the regulators.
ON
and
OFF
Logic
See Figure 3. The MAX1798/MAX1798A/MAX1799/
MAX1799A power up when VIN1 is greater than 2.5V
and ON is low (ON button is pressed down momentari-
ly). When ON returns high, the device remains on. It
turns on OUT1 and the serial interface port. Once
OUT1 is in regulation, RSO stays low an additional
140ms (min). At this time, OUT1 is on and set to 2.98V,
while OUT2–5 are disabled and set to 2.98V. To stay
on, the OFF pin must be in a high state within 35ms
(min) or the device will shut down and can only be
turned on by pressing the ON button. While ON is held
low, the status of OFF is irrelevant and OUT1 and the
serial port are on.
After initial power-up, the logic level of ONO follows the
logic level of ON but is level-shifted to OUT1 high volt-
age. This signal can be used to interrupt the system
controller, which can subsequently manage an orderly
shutdown through the serial port by turning off OUT1.
140ms min 140ms min
35ms max 35ms max 52ms typ
35ms max
10µs min
PULSED HIGH
OR CONTINUOUS HIGH
ON
(INPUT)
OUT1
RSO
(OUTPUT)
OFF
(INPUT)
ONO
(OUTPUT)
Figure 3. Push-On/Push-Off Startup and Shutdown Timing Diagram
SCL
AB CD
EFG H
IJK
SDA
tSU:STA tHD:STA
tLOW tHIGH
tSU:DAT tHD:DAT tSU:STO tBUF
A = START CONDITION
B = MSB OF ADDRESS CLOCKED INTO SLAVE
C = LSB OF ADDRESS CLOCKED INTO SLAVE
D = R/W BIT CLOCKED INTO SLAVE
E = SLAVE PULLS SMBDATA LINE LOW
LM
F = ACKNOWLEDGE BIT CLOCKED INTO MASTER
G = MSB OF DATA CLOCKED INTO SLAVE (OP/SUS BIT)
H = LSB OF DATA CLOCKED INTO SLAVE
I = SLAVE PULLS SMBDATA LINE LOW
J = ACKNOWLEDGE CLOCKED INTO MASTER
K = ACKNOWLEDGE CLOCK PULSE
L = STOP CONDITION, DATA EXECUTED BY SLAVE
M = NEW START CONDITION
Figure 2. I
2
C-Compatible Serial-Interface Timing Diagram
MAX1798/MAX1798A/MAX1799/MAX1799A
CDMA Cellular/PCS System
Power Supplies
14 ______________________________________________________________________________________
Hard Shutdown
To shut down the MAX1798/MAX1798A/MAX1799/
MAX1799A, drive OFF low or allow the internal resistor
to pull down OFF while ON is high. The device shuts
down after the watchdog timer has cleared (35ms min,
52ms typ). During shutdown, all LDO outputs and RSO
are actively pulled to GND, the open-drain drivers are
in a high-impedance state, and the serial port and reset
timer are inactive. Previously programmed output volt-
age data is retained in the internal registers as long as
VIN1 > 2.1V. If the device is turned back on by the ON
button, OUT1 automatically is enabled with the preshut-
down output voltage. OUT2–5 automatically return to
their preshutdown voltages once they are enabled
through the serial interface.
Soft Shutdown
The serial port can also be used to shut down the
MAX1798/MAX1798A/MAX1799/MAX1799A. Using the
control data byte to disable OUT1 will shut down the
entire device. Once shut down, the only means to turn
on the device is through a momentary low on the ON
button.
Control Data Byte
The control data byte is 8 bits long (3 command bits
and 5 data bits). The first 3 bits specify the action to be
taken, while the last 5 bits set the output voltage or
ON/OFF status. Each regulator has an individual DAC
that sets the output voltage. The DAC registers are
double buffered to allow for simultaneous updating of
all outputs. The output voltage is programmed per
Table 2 or Table 3. At power-up, if no specific voltage
is programmed, OUT1–5 will be set for 2.98V. All DAC
programming must be shifted from the double buffer to
the DACs with the update DAC command (Table 1,
000XXXXX) for the programmed voltages to be seen at
the LDO outputs. The DACs can be updated one at a
time or all at once after all desired outputs are pro-
grammed. The ON/OFF status of the LDOs and drivers
is not double-buffered and takes immediate effect upon
CS returning high (SPI compatible) or upon the ninth
rising edge of SCK during the command byte (Figure 2,
edge L). A one turns on the LDO output or driver out-
put, and a zero turns it off.
SPI-Compatible Serial Interface
Use an SPI-compatible 3-wire serial interface with the
MAX1798/MAX1798A to control the ON/OFF state and
output voltage of each regulator, the ON/OFF state of
the drivers, and to shut down the device. Figures 4a
and 4b are timing diagrams for the SPI protocol. The
MAX1798/MAX1798A is a write-only device and uses
CS along with SCLK and DIN to communicate. The seri-
al port operates when the device is enabled, even when
RSO is low. The MAX1798/MAX1798A can support a
2MHz (max) data rate. This SPI-compatible port uses
the CPOL = CPHA = 0 protocol.
I2C-Compatible Serial Interface
Use an I2C-compatible 2-wire serial interface with the
MAX1799/MAX1799A to control the ON/OFF state and
output voltage of each regulator, the ON/OFF state of
the drivers, and to shut down the device. Use standard
I2C-compatible write-byte commands to program the
IC. Figure 2 is a timing diagram for the I2C protocol.
The MAX1799/MAX1799A is always a slave to the bus
master. The serial port operates when the device is
enabled, even when OUT1 and RSO are low. When AS
is high, the address is 0111111. When AS is low, the
address is 1001111. Two MAX1799/MAX1799A devices
can be controlled by a single bus master.
Output Voltage
The MAX1798/MAX1798A/MAX1799/MAX1799A are
supplied with factory-set output voltages. At power-up,
all DACS are set for 2.98V, while only OUT1 is enabled;
all other LDO outputs and drivers are off. OUT2–5,
DR1, and DR2 must be enabled on with the serial port.
OUT2–5 can be individually programmed through the
serial port from 1.8V to 3.3V in 32 steps, either while on
or off. OUT1 can be programmed in 32 steps from 1.8V
to 3.3V only while on. (If OUT1 is off, the serial port is
also off, and OUT1 cannot be programmed.) If OUT1 is
turned off through the serial port or the OFF pin, the
entire chip, including the serial port, will be shut down.
However, all previously programmed DAC settings will
be retained as long as a valid supply voltage is main-
tained on IN1 (VIN1 > 2.1V).
Current Limit
The MAX1798/MAX1798A/MAX1799/MAX1799A
include current limiting on each LDO output. OUT1 has
a current limit set at 500mA (320mA min), while
OUT2–5 have current limits set at 250mA (160mA min).
When the LDO output is in current limit, the current-lim-
iter device monitors and controls the pass transistor’s
gate voltage, limiting the output current available from
the LDO. Once the excessive load is removed, normal
function resumes automatically.
MAX1798/MAX1798A/MAX1799/MAX1799A
CDMA Cellular/PCS System
Power Supplies
______________________________________________________________________________________ 15
Table 3. OUT1–5 Output Voltages
(Hexadecimal Format)
Table 2. OUT1–5 Output Voltages
(Binary Format)
DAC_ DATA
REGULATOR
OUTPUT
VOLTAGE (V)
111113.300
011113.214
101113.132
001113.054
110112.980
010112.909
100112.842
000112.777
111012.716
011012.657
101012.601
001012.547
110012.495
010012.445
100012.398
000012.352
111102.308
011102.265
101102.224
001102.184
110102.146
010102.109
100102.074
000102.039
111002.006
011001.974
101001.942
001001.912
110001.883
010001.854
100001.827
000001.800
D0D1D2D3D4
OUT1–
OUT5
DAC_ DATA
REGULATOR
OUTPUT
VOLTAGE (V)
3F5F7F9FBF3.300
3E5E7E9EBE3.214
3D5D7D9DBD3.132
3C5C7C9CBC3.054
3B5B7B9BBB2.980
3A5A7A9ABA2.909
39597999B92.842
38587898B82.777
37577797B72.716
36567696B62.657
35557595B52.601
34547494B42.547
33537393B32.495
32527292B22.445
31517191B12.398
30507090B02.352
2F4F6F8FAF2.308
2E4E6E8EAE2.265
2D4D6D8DAD2.224
2C4C6C8CAC2.184
2B4B6B8BAB2.146
2A4A6A8AAA2.109
29496989A92.074
28486888A82.039
27476787A72.006
26466686A61.974
25456585A51.942
24446484A41.912
23436383A31.883
22426282A21.854
21416181A11.827
20406080A01.800
OUT1OUT2OUT3OUT4OUT5
OUT1–
OUT5
MAX1798/MAX1798A/MAX1799/MAX1799A
CDMA Cellular/PCS System
Power Supplies
16 ______________________________________________________________________________________
Thermal-Overload Protection
The MAX1798/MAX1798A/MAX1799/MAX1799A inte-
grate a separate thermal monitor for each linear regula-
tor. When the junction temperature of any LDO exceeds
TJ= +160°C, the specific thermal sensor signals the
shutdown logic, turning off the pass transistor and
allowing that LDO to cool. The thermal sensor turns the
pass transistor on again after the LDO’s junction tem-
perature cools by 10°C, resulting in a pulsed output
during continuous thermal-overload conditions. Due to
the substrate’s thermal conductivity, a thermal overload
on one LDO may possibly affect other LDOs on the
device.
Thermal-overload protection is designed to protect the
MAX1798/MAX1798A/MAX1799/MAX1799A in the
event of fault conditions. For continual operation, do not
exceed the absolute maximum junction-temperature
rating of TJ= +150°C.
Noise Reduction
Bypass BP to GND with an external 0.01µF bypass
capacitor. The MAX1798/MAX1798A/MAX1799/
MAX1799A exhibit 45µVRMS of output voltage noise.
Graphs of Output Noise vs. Load Current, Output Noise
(10Hz to 100kHz), PSRR vs. Frequency, and Channel-
to-Channel Isolation vs. Frequency appear in the
Typical Operating Characteristics.
DIN
SCLK
18
A2 A1 A0 D4 D3 D2 D1 DO
CS
INSTRUCTION
EXECUTED
Figure 4a. Serial-Interface Timing Diagram
CS
SCLK
DIN
tDS
tDH
tCL
tCH
tCSS0
tCSH0 tCSW
tCSH1
tCSS1
Figure 4b. Detailed Serial-Interface Timing Diagram
MAX1798/MAX1798A/MAX1799/MAX1799A
CDMA Cellular/PCS System
Power Supplies
______________________________________________________________________________________ 17
Applications Information
Capacitor Selection and
Regulator Stability
Use a 10µF low-ESR ceramic capacitor on the
MAX1798/MAX1798A/MAX1799/MAX1799A’s input if all
the supply inputs are connected together. Larger input
capacitance and lower ESR provide better supply noise
rejection and line-transient response. If IN1, IN2/3, and
IN4/5 are connected to different supply voltages,
bypass each input with a 4.7µF low-ESR ceramic
capacitor.
A minimum 4.7µF low-ESR ceramic capacitor is recom-
mended on OUT1, and a minimum 2.2µF low-ESR
ceramic capacitor is recommended on OUT2–5. The
MAX1798/MAX1798A/MAX1799/MAX1799A are stable
with output capacitors in the ESR range of 10mΩto 1Ω.
Use larger capacitors to reduce noise and improve
load-transient response, stability, and power-supply
rejection.
Note that some ceramic dielectrics exhibit large capac-
itance and ESR variation with temperature. With
dielectrics such as Z5U and Y5V, it may be necessary
to use a minimum 4.7µF on OUT2–5 to ensure stability
at temperatures below -10°C. With X7R or X5R
dielectrics, 2.2µF should be sufficient at all operating
temperatures. Tantalum capacitors may cause instabili-
ty with the MAX1798/MAX1798A/MAX1799/MAX1799A
and are not recommended for this application.
Use a 0.01µF bypass capacitor at BP for low output-
voltage noise. Increasing the capacitance will slightly
decrease the output noise but will increase the startup
time. Values above 0.1µF provide no performance
advantage and are not recommended.
Line-Transient Considerations
The MAX1798/MAX1798A/MAX1799/MAX1799A are
designed to deliver low dropout voltages and low qui-
escent currents in battery-powered systems. Power-
supply rejection is >60dB at low frequencies and rolls
off above 10kHz. See the Power-Supply Rejection Ratio
(PSRR) vs. Frequency graph in the
Typical Operating
Characteristics.
When operating from sources other than batteries,
improved supply noise rejection and transient response
can be achieved by increasing the values of the input
and output bypass capacitors and through passive fil-
tering techniques. The
Typical Operating Character-
istics
show the MAX1798/MAX1798A/MAX1799/
MAX1799A line- and load-transient responses.
Load-Transient Considerations
The MAX1798/MAX1798A/MAX1799/MAX1799A load-
transient response graphs (see
Typical Operating
Characteristics
) show three components of the output
response: the output capacitor’s ESR spike, the regula-
tor’s transient settling response, and the DC shift due to
the LDO’s load regulation. Increasing the output capaci-
tor’s value and decreasing the ESR reduce the over-
shoot.
Dropout Voltage
A regulator’s minimum input-output voltage differential
(dropout voltage) determines the lowest usable supply
voltage. In battery-powered systems, this determines
the useful end-of-life battery voltage. Because the
MAX1798/MAX1798A/MAX1799/MAX1799A use P-
channel MOSFET pass transistors, their dropout volt-
age is a function of drain-to-source on-resistance
(RDS(ON)) multiplied by the load current. See the
Dropout Voltage (OUT1) vs. Load Current graph in the
Typical Operating Characteristics.
PROCESS: BiCMOS
Chip Information
Ordering Information (continued)
PA RT TEMP
RANGE
PIN-
PACKAGE
INTER-
FACE
M A X17 99E TP+ -40°C to +85°C20 TQFN I2C
M AX1799E U P +-40°C to +85°C20 TS SOP -EP I2C
M A X17 99A ETP+ -40°C to +85°C20 TQFN I2C
M AX1799AE UP+ -40°C to +85°C20 TS SOP -EP I2C
+
Denotes a lead(Pb)-free/RoHS-compliant package.
*
EP = Exposed pad.
MAX1798/MAX1798A/MAX1799/MAX1799A
CDMA Cellular/PCS System
Power Supplies
18 ______________________________________________________________________________________
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
OUT2
IN2/3
OUT3ONO
DIN (SDA)
SCLK (SCK)
TOP VIEW
IN1
OUT1
OUT4
IN4/5
PGND
BP
GND
12
11
9
10
OUT5
DR2
DR1
MAX1798
MAX1798A
MAX1799
MAX1799A
TSSOP
CS (AS)
RSO
ON
OFF
( ) ARE FOR MAX1799/MAX1799A ONLY.
+
Pin Configurations
20
+19 18 17 16
678910
1
2
3
4
5
DIN (SDA)
ON0
GND
BP
PGND
15
14
13
12
11
OUT3
IN1
OUT1
OUT4
IN4/5
SCLK (SCK)
CS (AS)
ON
OUT2
IN2/3
TOP VIEW
RS0
OFF
DR1
DR2
OUT5
MAX1798
MAX1798A
MAX1799
MAX1799A
THIN QFN
5mm ✕ 5mm ✕ 0.75mm
( ) ARE FOR MAX1799/MAX1799A ONLY.
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in
the package code indicates RoHS status only. Package draw-
ings may show a different suffix character, but the drawing per-
tains to the package regardless of RoHS status.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
20 TQFN T2055+4 21-0140
20 TSSOP-EP U20E+1 21-0108
MAX1798/MAX1798A/MAX1799/MAX1799A
CDMA Cellular/PCS System
Power Supplies
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________
19
© 2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
2 5/10 Replaced QFN package with TQFN package 1, 2, 7, 9, 10, 17, 18
