MC68332 ELECTRICAL CHARACTERISTICS
USER’S MANUAL A-11
Table A-6a. 20.97 MHz AC Timing
(VDD and VDDSYN = 5.0 Vdc ± 5%, VSS = 0 Vdc, TA = TL to TH)
Num Characteristic Symbol Min Max Unit
F1 Frequency of Operation (32.768 kHz crystal)2f 0.13 20.97 MHz
1 Clock Period tcyc 47.7 — ns
1A ECLK Period tEcyc 381 — ns
1B External Clock Input Period3tXcyc 47.7 — ns
2, 3 Clock Pulse Width tCW 18.8 — ns
2A, 3A ECLK Pulse Width tECW 183 — ns
2B, 3B External Clock Input High/Low Time3tXCHL 23.8 — ns
4, 5 Clock Rise and Fall Time tCrf —5ns
4A, 5A Rise and Fall Time — All Outputs except CLKOUT trf —8ns
4B, 5B External Clock Rise and Fall Time4tXCrf —5ns
6 Clock High to Address, FC, SIZE, RMC Valid tCHAV 023ns
7 Clock High to Address, Data, FC, SIZE, RMC High Impedance tCHAZx 047ns
8 Clock High to Address, FC, SIZE, RMC Invalid tCHAZn 0—ns
9 Clock Low to AS, DS, CS Asserted tCLSA 023ns
9A AS to DS or CS Asserted (Read)5tSTSA –10 10 ns
9C Clock Low to IFETCH, IPIPE Asserted tCLIA 222ns
11 Address, FC, SIZE, RMC Valid
to AS, CS Asserted
tAVSA 10 — ns
12 Clock Low to AS, DS, CS Negated tCLSN 223ns
12A Clock Low to IFETCH, IPIPE Negated tCLIN 222ns
13 AS, DS, CS Negated to
Address, FC, SIZE Invalid (Address Hold)
tSNAI 10 — ns
14 AS, CS Width Asserted tSWA 80 — ns
14A DS, CS Width Asserted (Write) tSWAW 36 — ns
14B AS, CS Width Asserted (Fast Write Cycle) tSWDW 32 — ns
15 AS, DS, CS Width Negated6tSN 32 — ns
16 Clock High to AS, DS, R/W High Impedance tCHSZ —47ns
17 AS, DS, CS Negated to R/W Negated tSNRN 10 — ns
18 Clock High to R/W High tCHRH 023ns
20 Clock High to R/W Low tCHRL 023ns
21 R/W Asserted to AS, CS Asserted tRAAA 10 — ns
22 R/W Low to DS, CS Asserted (Write) tRASA 54 — ns
23 Clock High to Data Out Valid tCHDO —23ns
24 Data Out Valid to Negating Edge of AS, CS t
DVASN 10 — ns
25 DS, CS Negated to Data Out Invalid (Data Out Hold) tSNDOI 10 — ns
26 Data Out Valid to DS, CS Asserted (Write) tDVSA 10 — ns
27 Data In Valid to Clock Low (Data Setup) tDICL 5—ns
27A Late BERR, HALT Asserted to Clock Low (Setup Time) tBELCL 15 — ns
28 AS, DS Negated to DSACK[1:0], BERR, HALT, AVEC Negated tSNDN 060ns
29 DS, CS Negated to Data In Invalid (Data In Hold)7tSNDI 0—ns
29A DS, CS Negated to Data In High Impedance7, 8 tSHDI —48ns
30 CLKOUT Low to Data In Invalid (Fast Cycle Hold)7tCLDI 10 — ns
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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