DM54S474/DM74S474 National Semiconductor DM54/74S474 (512 x 8) 4096-Bit TTL PROM General Description This Schottky memory is organized in the popular 512 words by 8 bits configuration. Memory enable inputs are provided to control the output states. When the device is enabled, the outputs represent the contents of the selected word. When disabled, the 8 outputs go to the OFF or high impedance state. PROMs are shipped from the factory with lows in all loca- tions. A high may be programmed into any selected location by following the programming instructions. Features w Advanced titanium-tungsten (Ti-W) fuses m@ Schottky-clamped for high speed Address access35 ns max Enable access25 ns max Enable recovery25 ns max m PNP inputs for reduced input loading @ All DC and AC parameters guaranteed over temperature m Low voltage TRI-SAFE programming g@ TRI-STATE outputs Block Diagram 4096-8IT ARRAY 64 x 64 MEMORY MATRIX ECODER ENABLE GATE a7 06 a5 o4 03 a2 Pin Names A0-A8 Addresses GT, G2, G3, G4 _ | Output Enables GND Ground NC No Connection Q0-Q7 Outputs BUF Vec Power Supply O1 ao TL/D/9714~1 3-38 Connection Diagrams Dual-in-Line Package ar ATH 24 |= Voc Ab42 23 -A8 AS43 22;nNC Mold 21;Gi ASH5 20 62 A246 19fc3 Al? 18,=G4 AO#8 17 07 oo49 16 a06 Qis10 15-05 o2411 14];04 GND112 13}Q3 TL/D/9714-2 Top View Order Number DM54/74S474J, 474Au, 474Bu, DM74S474N, 474AN, 474BN See NS Package Number J24A or N24A Ordering Information Commercial Temp Range (0C to + 70C) Plastic Leaded Chip Carrier (PLCC) eeee See Lisvtsyisis | 432 4 28 27 26 Ad5 25 = Gi A3416 24 G2 Az217 23) 63 Aifa 22 G4 AO19 21f NC NC 110 20 |= 07 OO =411 19 = 06 12 13 14 15 16 17 18 rEg? SY Tt eye NO OM Tw oo a zocdogsg TL/D/9714-3 Top View Order Number DM74S474V, 474AV, 474BV See NS Package Number V26A Military Temp Range ( 55C to + 125C) Parameter/Order Number Max Access Time (ns) Parameter/Order Number Max Access Time (ns) DM74S474AJ 45 DM54S474AJ 60 DM74S474BJ 35 DM54S474BJ 50 DM74S474J 65 DM54S8474J 75 DM?74S474AN 45 DM74S4748N 35 DM74S474N 65 DM74S474AV 45 DM74S474BV 35 DM74S8474V 65 3-39 vLSPZWNG/bZrSrSNd DM54S474/DM74S474 Absolute Maximum Ratings (note 1) Operating Conditions If Military/Aerospace specified devices are required, Min Max Units please contact the National Semiconductor Sales Supply Voltage (Vcc) Office/Distributors for availability and specifications. Military 4.50 5.50 Vv Supply Voltage (Note 2) 0.5V to +7.0V Commercial 4.75 5.25 Vv Input Voltage (Note 2) 1.2V to + 5.5V Ambient Temperature (Ta) Output Voltage (Note 2) ~0.5V to +5.5V Military ~55 +1425 C Storage Temperature 65C to + 150C Commercial 0 +70 C Lead Temp. (Soldering, 10 seconds) 300C Logical 0 Input Voltage 0 0.8 Vv ESD to be determined Logical 1 Input Voltage 2.0 5.5 Vv Note 1: Absolute maximum ratings are those values beyond which the de- vice may be permanently damaged. They do not mean that the device may be operated at these values. Note 2: These limits do not apply during programming. For the programming ratings, refer to the programming instructions. DC Electrical Characteristics (note 1) Symbol Parameter Conditions DM54S474 DM74S474 Units Min | Typ Max | Min | Typ Max lit Input Load Current Voc = Max, Vin = 0.45V 80 | 250 80 | 250 |) pA WW Input Leakage Current Voc = Max, Vin = 2.7V 25 25 pA Voc = Max, Vin = 5.5V 1.0 1.0 mA VoL Low Level Output Voltage | Voc = Min, lol = 16 mA 0.35 | 0.50 0.35 | 0.45 Vv VIL Low Level Input Voltage 0.80 0.80 v Vin High Levei Input Voltage 2.0 2.0 Vv Vc Input Clamp Voltage Voc = Min, lin = 18mA 0.8 | 1.2 08 | -1.2 v C Input Capacitance Voc = 5.0V, Vin = 2.0V l Ta = 25C, 1 MHz 4.0 4.0 pF Co Output Capacitance Voc = 5.0V, Vo = 2.0V 6.0 60 F Ta = 25C, 1 MHz, Outputs off P loc Power Supply Current Voc = Max, Inputs Grounded 415 170 115 170 mA All Outputs Open los Short Circuit Vo = OV, Voc = Max _ _ _ _ Output Current (Note 2) 20 70 20 70 mA loz Output Leakage Voc = Max, Vo = 0.45V to 2.4V +50 +50 pA (TRI-STATE) Chip Disabled 50 50 BA Von Output Voltage High lon = 2.0mA 2.4 3.2 Vv lon = 6.5mA 24 3.2 Vv Note 1: These limits apply over the entire operating range unless stated otherwise. All typical vakies are for Vcc = .0V and Ta = 25C. Note 2: During log measurement, only one output at a time should be grounded. Permanent damage may otherwise result. 3-40 AC Electrical Characteristics with standard Load and Operating Conditions COMMERCIAL TEMP RANGE (0C to + 70C) Symbol grec Parameter DM74S474 DM74S474A DM74S474B Units ymbol Min | Typ | Max | Min | Typ | Max | Min | Typ | Max TAA TAVQV | Address Access Time 40 65 25 45 25 35 ns TEA TEVQV | Enable Access Time 20 35 15 25 15 25 ns TER TEXQX | Enable Recovery Time 20 35 15 25 15 25 ns TZX TEVQX | Output Enable Time 20 35 15 25 15 25 ns TXZ TEXQZ | Output Disable Time 20 35 15 25 15 25 ns MILITARY TEMP RANGE ( 55C to + 125C) Symbol Symbal Parameter DM54S474 DM54S474A DM54S474B Units Min | Typ | Max | Min | Typ | Max | Min Typ | Max TAA TAVQV | Address Access Time 40 70 25 60 25 50 ns TEA TEVQV | Enable Access Time 20 40 15 35 15 35 ns TER TEXQX | Enable Recovery Time 20 40 15 35 15 35 ns T2X TEVQX | Output Enable Time 20 40 15 35 t5 35 ns TXZ TEXQZ | Output Disable Time 20 40 15 35 15 35 ns Functional Description TESTABILITY The Schottky PROM die includes extra rows and columns of fusable links for testing the programmability of each chip. These test fuses are placed at the worst-case chip locations to provide the highest possible confidence in the program- ming tests in the final product. A ROM pattern is also per- manently fixed in the additional circuitry and coded to pro- vide a parity check of input address levels. These and other test circuits are used to test for correct operation of the row and column-select circuits and functionality of input and en- able gates. All test circuits are availabie at both wafer and assembled device levels to allow 100% functional and para- metric testing at every stage of the test flow. RELIABILITY As with all National products, the Ti-W PROMs are subject- ed to an on-going reliability evaluation by the Reliability As- surance Department. These evaluations employ accelerat- ed life tests, including dynamic high-temperature operating lite, temperature-humidity life, temperature cycling, and ther- mal shock. To date, nearly 7.4 million Schottky Ti-W PROM device hours have been logged, with samples in Epoxy B molded DIP (N-package), PLCC (V-package) and CERDIP (J-package). Device performance in all package configura- tions is excellent. TITANIUM-TUNGSTEN FUSES Nationals Programmable Read-Only Memories (PROMs) feature titanium-tungsten (Ti-W) fuse links designed to pro- gram efficiently with only 10.5V applied. The high perform- ance and reliability of these PROMs are the result of fabrica- tion by a Schottky bipolar process, of which the titanium- tungsten metallization is an integral part, and the use of an on-chip programming circuit. A major advantage of the titanium-tungsten fuse technology is the low programming voltage of the fuse links. At 10.5V, this virtually eliminates the need for guard-ring devices and wide spacings required for other fuse technologies. Care is taken, however, to minimize voltage drops across the die and to reduce parasitics. The device is designed to ensure that worst-case fuse operating current is low enough for reliable long-term operation. The Darlington programming Circuit is liberally designed to insure adequate power density for blowing the fuse links. The complete circuit design is optimized to provide high performance over the entire oper- ating ranges of Vcc and temperature. 3-41 bLbSPLING/PZ>SPsnd