FTX710-BM2 S LLKC 956023 947361 - INTEL

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1. General description

The 74LVC1G157-Q100 is a single 2-input multiplexer which select data from two data

inputs (I0 and I1) under control of a common data select input (S). The state of the

common data sele ct input determines the particular register from which the data come s.

The output (Y) presents the selected data in the true (non-inverted) form.

Inputs ca n be driven from e ither 3.3 V or 5 V device s. This f eature allows the use of these

devices as translators in mixed 3.3 V and 5 V applications.

This device is fully specified for partial power-down applications using IOFF.

The IOFF circuitry disables the outpu t, pr eve n tin g the damaging backflow current through

the device when it is powered down.

Schmitt-trigger action at all input s makes the circuit highly tolerant to slower input rise and

fall times.

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

Automotive product qualification in accordance with AEC-Q100 (Grade 1)

Spe cified from 40 C to +85 C and from 40 C to +125 C

Wide supply voltag e range from 1.65 V to 5.5 V

High noise immunity

Complies with JEDEC standard:

JESD8-7 (1.65 V to 1.95 V)

JESD8-5 (2.3 V to 2.7 V)

JESD8B/JESD36 (2.7 V to 3.6 V)

24 mA output drive (VCC =3.0V)

CMOS low power consumption

Latch-up performance exceeds 250 mA

Direct interface with TTL levels

Inputs accept voltages up to 5 V

ESD protection:

MIL-STD-883, method 3015 exceeds 2000 V

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )

Multiple package options

74LVC1G157-Q100

Single 2-input multiplexer

Rev. 2 — 8 December 2016 Product data sheet

Product data sheet Rev. 2 — 8 December 2016 2 of 14

NXP Semiconductors 74LVC1G157-Q100

Single 2-input multiplexer

3. Ordering information

4. Marking

[1] The pin 1 indicator is located on the lo wer left corner of the device, below the marking code.

5. Functional diagram

Tabl e 1. Ordering information

Type number Package

Temperature range Name Description Version

74LVC1G157GW-Q100 40 Cto+125C SC-88 plastic surface-mounted package; 6 leads SOT363

74LVC1G157GV-Q100 40 C to +125 C SC-74 plastic surface-mounted package (TSOP6); 6 leads SOT457

Table 2. Marking

Type number Marking code[1]

74LVC1G157GW-Q100 YP

74LVC1G157GV-Q100 YP

Fig 1. Logic symbol Fig 2. IEC logic symbol

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Product data sheet Rev. 2 — 8 December 2016 3 of 14

NXP Semiconductors 74LVC1G157-Q100

Single 2-input multiplexer

6. Pinning information

6.1 Pinning

6.2 Pin description

Fig 4. Logic diagra m

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Table 3. Pin description

Symbol Pin Description

I1 1 data input from source 1

GND 2 ground (0 V)

I0 3 data input from source 0

Y 4 multiplexer output

VCC 5 supply voltage

S 6 common data select input

Product data sheet Rev. 2 — 8 December 2016 4 of 14

NXP Semiconductors 74LVC1G157-Q100

Single 2-input multiplexer

7. Functional description

[1] H = HIGH voltage level;

L = LOW voltage level;

X = don’t care.

8. Limiting values

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

[2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.

[3] For SC-88 and SC-74 packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.

Table 4. Function table[1]

Inputs Output

SI1 I0 Y

LXLL

LXHH

HLXL

HHXH

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Max Unit

VCC supply voltage 0.5 +6.5 V

IIK input clamping current VI < 0 V 50 - mA

VIinput voltage [1] 0.5 +6.5 V

IOK output clamping current VO > VCC or VO < 0 V - 50 mA

VOoutput voltage Active mode [1][2] 0.5 VCC + 0.5 V

Power-down mode [1][2] 0.5 +6.5 V

IOoutput current VO = 0 V to VCC -50 mA

ICC supply current - 100 mA

IGND ground current 100 - mA

Ptot total power dissipation Tamb =40 C to +125 C[3] -250mW

Tstg storage temperature 65 +150 C

Product data sheet Rev. 2 — 8 December 2016 5 of 14

NXP Semiconductors 74LVC1G157-Q100

Single 2-input multiplexer

9. Recommended operating conditions

10. Static characteristics

Table 6. Recommended operating conditions

Symbol Parameter Conditions Min Typ Max Unit

VCC supply voltage 1.65 - 5.5 V

VIinput voltage 0 - 5.5 V

VOoutput voltage Active mode - - VCC V

VCC = 0 V; Power-down mode - - 5.5 V

Tamb ambient temperature 40 - +125 C

t/V input transition rise and fall rate VCC = 1.65 V to 2.7 V - - 20 ns/V

VCC = 2.7 V to 5.5 V - - 10 ns/V

Table 7. Static characteristics

At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit

Min Typ[1] Max Min Max

VIH HIGH-level input

voltage VCC = 1.65 V to 1.95 V 0.65VCC - - 0.65VCC -V

VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V

VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V

VCC = 4.5 V to 5.5 V 0.7VCC - - 0.7VCC -V

VIL LOW-level input

voltage VCC = 1.65 V to 1.95 V - - 0.35VCC - 0.35VCC V

VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V

VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V

VCC = 4.5 V to 5.5 V - - 0.3VCC -0.3V

CC V

VOH HIGH-level output

voltage VI=V

IH or VIL

IO=100 A;

VCC = 1.65 V to 5.5 V VCC 0.1 - - VCC 0.1 - V

IO=4mA; V

CC = 1.65 V 1.2 1.54 - 0.95 - V

IO=8mA; V

CC = 2.3 V 1.9 2.15 - 1.7 - V

IO=12 mA; VCC = 2.7 V 2.2 2.50 - 1.9 - V

IO=24 mA; VCC = 3.0 V 2.3 2.62 - 2.0 - V

IO=32 mA; VCC = 4.5 V 3.8 4.11 - 3.4 - V

VOL LOW-level output

voltage VI=V

IH or VIL

IO= 100 A;

VCC = 1.65 V to 5.5 V - - 0.10 - 0.10 V

IO=4mA; V

CC = 1.65 V - 0.07 0.45 - 0.70 V

IO=8mA; V

CC = 2.3 V - 0.12 0.30 - 0.45 V

IO=12mA; V

CC = 2.7 V - 0.17 0.40 - 0.60 V

IO=24mA; V

CC = 3.0 V - 0.33 0.55 - 0.80 V

IO=32mA; V

CC = 4.5 V - 0.39 0.55 - 0.80 V

Product data sheet Rev. 2 — 8 December 2016 6 of 14

NXP Semiconductors 74LVC1G157-Q100

Single 2-input multiplexer

[1] All typical values are measured at Tamb =25C.

11. Dynamic characteristics

[1] Typical values are measured at Tamb =25C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respe ctively.

[2] tpd is the same as tPLH and tPHL.

[3] CPD is used to determine the dynamic power dissipation (PDin W).

PD=C

PD VCC2fiN+(CLVCC2fo) where:

fi= input frequency in MHz;

fo= output frequency in MHz;

CL= output load capacitance in pF;

VCC = supply voltage in Volts;

N = number of inputs switching;

(CLVCC2fo) = sum of the outputs.

IIinput leakage

current VI = 5.5 V or GND;

VCC =0Vto5.5V -0.1 1-1A

IOFF power-off leakage

current VCC = 0 V; VIor VO=5.5V - 0.1 2-2A

ICC supply current VI = 5.5 V or GND; IO = 0 A;

VCC = 1.65 V to 5.5 V -0.14 - 4A

ICC additional supply

current per pin; VCC = 2.3 V to 5.5 V;

VI=V

CC 0.6 V; IO=0 A - 5 500 - 500 A

CIinput capacitance VCC =3.3V; V

I = GND to VCC -2.5- - -pF

Table 7. Static characteristics …continued

At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit

Min Typ[1] Max Min Max

Table 8. Dynamic characteristics

Voltages are referenced to GND (ground = 0 V); for load circuit see Figure 7.

Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit

Min Typ[1] Max Min Max

tpd propagation delay I0, I1 to Y; see Figure 6 [2]

VCC = 1.65 V to 1.95 V 1.5 4.3 11.0 1.5 13.0 ns

VCC = 2.3 V to 2.7 V 1.0 2.9 6.1 1.0 7.6 ns

VCC = 2.7 V 1.0 3.1 5.6 1.0 7.0 ns

VCC = 3.0 V to 3.6 V 1.0 2.7 5.0 1.0 6.3 ns

VCC = 4.5 V to 5.5 V 0.5 2.2 4.0 0.5 5.0 ns

S to Y; see Figure 6 [2]

VCC = 1.65 V to 1.95 V 1.5 4.3 11.0 1.5 13.0 ns

VCC = 2.3 V to 2.7 V 1.0 2.9 6.9 1.0 8.6 ns

VCC = 2.7 V 1.0 3.3 5.9 1.0 7.4 ns

VCC = 3.0 V to 3.6 V 1.0 2.9 5.0 1.0 6.3 ns

VCC = 4.5 V to 5.5 V 0.5 2.3 4.0 0.5 5.0 ns

CPD power dissipation

capacitance VI = GND to VCC; VCC = 3.3 V [3] -18- - -pF

Product data sheet Rev. 2 — 8 December 2016 7 of 14

NXP Semiconductors 74LVC1G157-Q100

Single 2-input multiplexer

12. Waveforms

Measurement points are given in Table 9.

VOL and VOH are typical output voltage levels that occur with the output load.

Fig 6. Data inputs (I0, I1) and common data select input (S) to output (Y) propagation delays

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Supply voltage Input Output

VCC VMVM

1.65 V to 1.95 V 0.5VCC 0.5VCC

2.3 V to 2.7 V 0.5VCC 0.5VCC

2.7V 1.5V 1.5V

3.0V to 3.6V 1.5V 1.5V

4.5 V to 5.5 V 0.5VCC 0.5VCC

Product data sheet Rev. 2 — 8 December 2016 8 of 14

NXP Semiconductors 74LVC1G157-Q100

Single 2-input multiplexer

Test data is given in Table 10.

Definitions for test circuit:

RL = Load resistance.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance; should be equal to the output impedance Zo of the pulse generator.

VEXT = External voltage for measuring switching times.

Fig 7. Test circuit for measuring switching times

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Supply voltage Input Load VEXT

VCC VItr=t

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2.3 V to 2.7 V VCC  2.0ns 30pF 500open

2.7V 2.7V  2.5ns 50pF 500open

3.0V to 3.6V 2.7V  2.5ns 50pF 500open

4.5 V to 5.5 V VCC  2.5ns 50pF 500open

Product data sheet Rev. 2 — 8 December 2016 9 of 14

NXP Semiconductors 74LVC1G157-Q100

Single 2-input multiplexer

13. Package outline

Fig 8. Package outline SOT363 (SC-88)

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Product data sheet Rev. 2 — 8 December 2016 10 of 14

NXP Semiconductors 74LVC1G157-Q100

Single 2-input multiplexer

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Product data sheet Rev. 2 — 8 December 2016 11 of 14

NXP Semiconductors 74LVC1G157-Q100

Single 2-input multiplexer

14. Abbreviations

15. Revision history

Table 11. Abbreviations

Acronym Description

CMOS Complementary Metal Oxide Semiconductor

DUT Device Under Test

ESD ElectroStatic Discharge

HBM Human Body Model

MM Machine Model

MIL Military

TTL Transistor-Transistor Logic

Table 12. Revision history

Document ID Release date Data sheet st atus Change notice Supersedes

74LVC1G157_Q100 v.2 20161208 Product da ta sheet - 74LVC1G157_ Q100 v.1

Modifications: •Table 7: The maximum limits for leakage current and supply current have changed.

74LVC1 G157_Q100 v.1 20130121 Product data sheet - -

Product data sheet Rev. 2 — 8 December 2016 12 of 14

NXP Semiconductors 74LVC1G157-Q100

Single 2-input multiplexer

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[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

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Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contain s data from the objective specification for product develop ment.

Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.

Product [short] data sheet Production This document contains the product specification.

Product data sheet Rev. 2 — 8 December 2016 13 of 14

NXP Semiconductors 74LVC1G157-Q100

Single 2-input multiplexer

No offer to sell or license — Nothing in this document may be interpret ed or

construed as an of fer to se ll product s that is op en for accept ance or the grant ,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

16.4 Trademarks

Notice: All referenced b rands, produc t names, service names and trademarks

are the property of their respective ow ners.

17. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors 74LVC1G157-Q100

Single 2-input multiplexer

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 8 December 2016

Document identifier: 74LVC1G157_Q100

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

18. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3

6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3

7 Functional description . . . . . . . . . . . . . . . . . . . 4

8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4

9 Recommended operating conditions. . . . . . . . 5

10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5

11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6

12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9

14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 11

15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11

16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12

16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12

16.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

16.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 12

16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13

17 Contact information. . . . . . . . . . . . . . . . . . . . . 13

18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14