(0,50 mm) .0197"
ERM5 SERIES
Rugged Edge Rate
contacts for reduced
broadside coupling
20 to 150
I/Os
(0,50mm)
.0197" pitch
ERM5–040–02.0–L–DV–KTR
ERM5–020–05.0–L–DV–KTR
ERM5–050–05.0–L–DV–KTR
7 mm, 9 mm,
10 mm, 11 mm
or 12 mm Stack
Height
WWW.SAMTEC.COM
Note: Some lengths, styles
and options are non-standard,
non-returnable.
Mates with:
ERF5
F-213
SPECIFICATIONS
(0,50)
.0197
(1,32)
.052
DIA
No. of Positions x
(0,50) .0197 + (6,80) .268
(1,09)
.043
02
01
B
A
(4,95)
.195
(2,50)
.098
(3,80)
.149
For complete specifi cations and
recommended PCB layouts see
www.samtec.com?ERM5
Insulator Material:
Black LCP
Terminal Material:
Phosphor Bronze or BeCu
Plating:
Au or Sn over
50µ" (1,27 µm) Ni
Current Rating:
1.9A per contact
@ 80°C ambient
Operating Temp Range:
-55°C to +125°C
Voltage Rating:
194 VAC mated with ERF5
RoHS Compliant:
Ye s
Processing:
Lead–Free Solderable:
Ye s
SMT Lead Coplanarity:
(0,10 mm) .004" max (010-040)
(0,13 mm) .005" max (050-075)
010,020,
030,040, –050,
060,070, –075
–K
= (3,50 mm) .138" DIA
Polyimide Film
Pick & Place Pad
–TR
= Tape & Reel
Packaging
02.0
= 2 mm
Body
Height
04.0
= 4 mm
Body
Height
05.0
= 5 mm
Body
Height
ERM5 NO. OF POSITIONS
PER ROW DV K TR
PLATING
OPTION
LEAD
STYLE
–L
= 10µ" (0,25µm)
Gold on contact,
Matte Tin on tail
Note: Other Gold plating
options available.
Contact Samtec.
(1,00 mm)
.039"
NOMINAL
WIPE
RUGGED HIGH SPEED HEADER
• Edge Rate
contacts
High contact wipe
MATED HEIGHT*
ERM5
LEAD
STYLE
ERF5 LEAD STYLE
–05.0 –07.0
02.0 (7,00) .276 (9,00) .354
–04.0 (9,00) .354 (11,00) .433
–05.0 (10,00) .394 (12,00) .472
*Processing conditions will affect mated height.
LEAD
STYLE AB
02.0 (1,94)
.076
(4,84)
.191
04.0 (3,94)
.155
(6,84)
.269
05.0 (4,94)
.194
(7,84)
.309
APPLICATION
SPECIFIC
OPTION
• Friction Lock
• Weld Tab
Call Samtec.
ERM5/ERF5
7 mm Stack Height
Rated @ 3dB Insertion Loss
with PCB effects* w/o PCB effects**
Single-Ended Signaling 10.5 GHz / 21 Gbps 13.5 GHz / 27 Gbps
Differential Pair Signaling 9.5 GHz / 19 Gbps 20 GHz / 40 Gbps
*Performance data includes effects of a non-optimized PCB.
**Test board losses de-embedded from performance data.
Performance data for other stack heights and complete test data
available at www.samtec.com?ERM5 or contact sig@samtec.com
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