DATA SH EET
Product specification
File under Integrated Circuits, IC06 1998 Aug 31
INTEGRATED CIRCUITS
74HC1G02; 74HCT1G02
2-input NOR gate
1998 Aug 31 2
Philips Semiconductors Product specification
2-input NOR gate 74HC1G02; 74HCT1G02
FEATURES
Wide operating voltage:
2.0 to 6.0 V
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
Very small 5 pins package
Output capability: standard.
DESCRIPTION
The 74HC1G/HCT1G02 is a high
speed Si-gate CMOS device.
The 74HC1G/HCT1G02 provides the
2-input NOR function. The standard
output currents are half the values
compared to the 74HC/HCT02.
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
L = LOW voltage level.
INPUTS OUTPUT
inA inB outY
LL H
LH L
HL L
HH L
QUICK REFERENCE DATA
GND = 0 V; Tamb =25°C; tr=t
f6.0 ns.
Notes
1. CPD is used to determine the dynamic power dissipation PD(µW).
PD=C
PD ×VCC2×fi+(CL×VCC2×fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
(CL×VCC2×fo) = sum of outputs.
2. For HC1G the condition is VI= GND to VCC.
For HCT1G the condition is VI= GND to VCC 1.5 V.
PINNING
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
HC1G HCT1G
tPHL, tPLH propagation delay
inA, inB to outY CL= 15 pF;
VCC =5V 79ns
C
Iinput capacitance 1.5 1.5 pF
CPD power dissipation
capacitance notes 1 and 2 18 19 pF
PIN SYMBOL DESCRIPTION
1 inB data input B
2 inA data input A
3 GND ground (0 V)
4 outY data output
5V
CC DC supply voltage
1998 Aug 31 3
Philips Semiconductors Product specification
2-input NOR gate 74HC1G02; 74HCT1G02
ORDERING AND PACKAGE INFORMATION
OUTSIDE NORTH
AMERICA
PACKAGES
TEMPERATURE
RANGE PINS PACKAGE MATERIAL CODE MARKING
74HC1G02GW 40 to +125 °C5 SC-88A plastic SOT353 HB
74HCT1G02GW 5 SC-88A plastic SOT353 TB
Fig.1 Pin configuration.
handbook, halfpage
1
2
3
5
4
MNA102
02
VCC
inA
outY
GND
inB
Fig.2 Logic symbol.
handbook, halfpage
MNA103
inB
inA outY
2
14
Fig.3 IEC logic symbol.
handbook, halfpage
MNA104
4
2
1
1
Fig.4 Logic diagram.
handbook, halfpage
MNA105
inB
inA
outY
1998 Aug 31 4
Philips Semiconductors Product specification
2-input NOR gate 74HC1G02; 74HCT1G02
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V).
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Above +55 °C the value of PD derates linearly with 2.5 mW/K.
SYMBOL PARAMETER 74HC1G02 74HCT1G02 UNIT CONDITIONS
MIN. TYP. MAX. MIN. TYP. MAX.
VCC DC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V
VIinput voltage 0 VCC 0VCC V
VOoutput voltage 0 VCC 0VCC V
Tamb operating ambient
temperature 40 +25 +125 40 +25 +125 °C see DC and AC
characteristics
per device
tr, tfinput rise and fall times
except for Schmitt
trigger inputs
−−1000 −−−ns VCC = 2.0 V
−−500 −−500 ns VCC = 4.5 V
−−400 −−−ns VCC = 6.0 V
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC DC supply voltage 0.5 +7.0 V
±IIK DC input diode current VI<−0.5VorV
I>V
CC + 0.5 V; note 1 20 mA
±IOK DC output diode current VO<−0.5V or VO>VCC + 0.5 V; note 1 20 mA
±IODC output source or sink current
standard outputs 0.5V <VO<VCC +0.5 V; note 1 12.5 mA
±ICC DC VCC or GND current for types
with standard outputs note 1 25 mA
Tstg storage temperature 65 +150 °C
PDpower dissipation per package temperature range: 40 to +125 °C;
note 2 200 mW
1998 Aug 31 5
Philips Semiconductors Product specification
2-input NOR gate 74HC1G02; 74HCT1G02
DC CHARACTERISTICS FOR THE 74HC1G
Additional type data to the recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Note
1. All typical values are measured at Tamb =25°C.
SYMBOL PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
40 to +85 40 to +125 VCC (V) OTHER
MIN. TYP.(1) MAX. MIN. MAX.
VIH HIGH-level input
voltage 1.5 1.2 1.5 V 2.0
3.15 2.4 3.15 4.5
4.2 3.2 4.2 6.0
VIL LOW-level input voltage 0.8 0.5 0.5 V 2.0
2.1 1.35 1.35 4.5
2.8 1.8 1.8 6.0
VOH HIGH-level output
voltage; all outputs 1.9 2.0 1.9 V 2.0 VI=V
IH or VIL:
IO=20µA
4.4 4.5 4.4 4.5
5.9 6.0 5.9 6.0
VOH HIGH-level output
voltage; standard
outputs
4.13 4.32 3.7 V 4.5 VI=V
IH or VIL;
IO= 2.0 mA
5.63 5.81 5.2 6.0 VI=V
IH or VIL;
IO= 2.6 mA
VOL LOW-level output
voltage; all outputs 0 0.1 0.1 V 2.0 VI=V
IH or VIL;
IO=20µA
0 0.1 0.1 4.5
0 0.1 0.1 6.0
VOL LOW-level output
voltage; standard
outputs
0.15 0.33 0.4 V 4.5 VI=V
IH or VIL;
IO= 2.0 mA
0.16 0.33 0.4 6.0 VI=V
IH or VIL;
IO= 2.6 mA
IIinput leakage current −−1.0 1.0 µA 6.0 VI=V
CC or GND
ICC quiescent supply
current −−10 20 µA 6.0 VI=V
CC or GND;
IO=0
1998 Aug 31 6
Philips Semiconductors Product specification
2-input NOR gate 74HC1G02; 74HCT1G02
DC CHARACTERISTICS FOR THE 74HCT1G
Additional type data to the recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Note
1. All typical values are measured at Tamb =25°C.
SYMBOL PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
40 to +85 40 to +125 VCC (V) OTHER
MIN. TYP.(1) MAX. MIN. MAX.
VIH HIGH-level input
voltage 2.0 1.6 2.0 V 4.5 to 5.5
VIL LOW-level input
voltage 1.2 0.8 0.8 V 4.5 to 5.5
VOH HIGH-level output
voltage; all outputs 4.4 4.5 4.4 V 4.5 VI=V
IH or VIL;
IO=20µA
V
OH HIGH-level output
voltage; standard
outputs
4.13 4.32 3.7 V 4.5 VI=V
IH or VIL;
IO= 2.0 mA
VOL LOW-level output
voltage; all outputs 0 0.1 0.1 V 4.5 VI=V
IH or VIL;
IO=20µA
V
OL LOW-level output
voltage; standard
outputs
0.15 0.33 0.4 V 4.5 VI=V
IH or VIL;
IO= 2.0 mA
IIinput leakage current −−1.0 1.0 µA 5.5 VI=V
CC or GND
ICC quiescent supply
current −−10.0 20 µA 5.5 VI=V
CC or GND;
IO=0
I
CC additional supply
current per input −−500 850 µA 4.5 to 5.5 VI=V
CC 2.1;
IO=0
1998 Aug 31 7
Philips Semiconductors Product specification
2-input NOR gate 74HC1G02; 74HCT1G02
AC CHARACTERISTICS FOR 74HC1G02
GND = 0 V; tr=t
f6.0 ns; CL=50pF.
Note
1. All typical values are measured at Tamb =25°C.
AC CHARACTERISTICS FOR 74HCT1G02
GND = 0 V; tr=t
f6.0 ns; CL=50pF.
Note
1. All typical values are measured at Tamb =25°C.
SYMBOL PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
40 to +85 40 to +125 VCC (V) WAVEFORMS
MIN. TYP.(1) MAX. MIN. MAX.
tPHL, tPLH propagation delay
inA, inB to outY 25 115 135 ns 2.0 see Figs 5 and 6
92327 ns 4.5
82023 ns 6.0
SYMBOL PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
40 to +85 40 to +125 VCC (V) WAVEFORMS
MIN. TYP.(1) MAX. MIN. MAX.
tPHL, tPLH propagation delay
inA, inB to outY 11 24 27 ns 4.5 see Figs 5 and 6
1998 Aug 31 8
Philips Semiconductors Product specification
2-input NOR gate 74HC1G02; 74HCT1G02
AC WAVEFORMS
Fig.5 The input (inA, inB) to output (outY)
propagation delay.
handbook, halfpage
MNA106
inA, inB input
outY output
tPHL tPLH
VM
(1)
VM
(1)
(1) HC1G02: VM= 50% and VI= GND to VCC.
HCT1G02: VM= 1.3 V and VI= GND to 3.0 V.
Fig.6 Load circuitry for switching times.
Definitions for test circuit:
CL= Load capacitance including jig and probe capacitance
(see “AC characteristics for 74HC1G02” and
“AC characteristics for 74HCT1G02”).
RT= Termination resistance should be equal to the output
impedance Z0 of the pulse generator.
handbook, halfpage
VCC
VIVO
MNA101
D.U.T.
CL50 pF
RT
PULSE
GENERATOR
1998 Aug 31 9
Philips Semiconductors Product specification
2-input NOR gate 74HC1G02; 74HCT1G02
PACKAGE OUTLINE
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
SOT353
wBM
b
p
D
e
1
e
A
A
1
L
p
Q
detail X
HE
E
vMA
AB
y
0 1 2 mm
scale
c
X
132
45
Plastic surface mounted package; 5 leads SOT353
UNIT A1
max bpcD
E (2) e1HELpQywv
mm 0.1 0.30
0.20 2.2
1.8
0.25
0.10 1.35
1.15 0.65
e
1.3 2.2
2.0 0.2 0.10.2
DIMENSIONS (mm are the original dimensions)
0.45
0.15 0.25
0.15
A
1.1
0.8
97-02-28SC-88A
1998 Aug 31 10
Philips Semiconductors Product specification
2-input NOR gate 74HC1G02; 74HCT1G02
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
“Data Handbook IC26; Integrated Circuit Packages”
(order code 9398 652 90011).
Reflow soldering
Reflow soldering techniques are suitable for all SO
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
Wave soldering
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
The longitudinal axis of the package footprint must be
parallel to the solder flow.
The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Repairing soldered joints
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
1998 Aug 31 11
Philips Semiconductors Product specification
2-input NOR gate 74HC1G02; 74HCT1G02
DEFINITIONS
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
Data sheet status
Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Internet: http://www.semiconductors.philips.com
Philips Semiconductors – a worldwide company
© Philips Electronics N.V. 1998 SCA60
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Printed in The Netherlands 245106/00/01/pp12 Date of release: 1998 Aug 31 Document order number: 9397 750 03661