2–120
FEATURES
•
Eight 0.200” Dot Matrix Characters in Red, Yellow,
High Efficiency Red, Green, High Efficiency Green
•
Built-in 2 P age, 256 Character ROM. Both pages are
Mask Programmable for Custom Fonts
•
Readable from 8 Feet (2.5 meters)
•
Built-in Decoders, Multiplexers and Drivers
•
Wide Viewing Angle, X Axis
±
55
°
, Y Axis
±
65
°
•
Programmable Features:
– Individual Flashing Character
– Full Display Blinking
– Multi-Level Dimming and Blanking
– Clear Function
– Lamp Test
•
Internal or External Clock
•
End Stackable Dual-In-Line Plastic Package
RED
PDSP2110
YELLOW
PDSP2111
HIGH EFFICIENCY RED
PDSP2112
GREEN
PDSP2113
HIGH EFFICIENCY GREEN
PDSP2114
0.200” 8-Character, 5x7 Dot Matrix
Parallel Input Alphanumeric Intelligent Display
Description
The PDSP2110 (Red), PDSP2111 (Yellow), PDSP2112 (High Effi-
ciency Red), PDSP2113 (Green), PDSP2114 (High Efficiency
Green), and PDSP2115 (Soft Orange) are eight digit, 5x7 dot
matrix, parallel input, alphanumeric Intelligent Displays. The 0.20
inch high digits are packaged in a rugged, high quality, optically
transparent, 0.6 inch lead spacing, 28 pin plastic DIP.
The on-board CMOS has a built-in 256 character ROM. Both
pages are mask programmable for 256 custom characters.The
first page of ROM of a standard pr oduct contains 128 characters
including ASCII, selected European and Scientific symbols. The
second page contains Katakana Japanese characters, more
European characters, Avionics, and other graphic symbols.
The PSP211X is designed for standard microprocessor interface
techniques, and is fully TTL compatible. The Clock I/O and Clock
Select pins allow the user to cascade multiple display
modules.
Package Dimensions in inches (mm)
1.680 (42.67) max.
0.210
(5.34) 0.105
(2.67)
0.386
(9.8)
0.771
(19.58) 0.600
(15.24
)
0.086
(2.19)
0.012 (0.30) typ.
0.100
(2.54) typ.
0.018 typ.
(.46) 0.160±.020
(4.06±.50)
0.209 (5.31)
PLCD558X
SIEMENS WW Z1
Part Number
Pin 1 Indicator
EIA Date
Code
Intensity Code
Color Bin
(For Yellow Only)
0
.189
(
4.81)
0.189
(4.79)
2–121
PDSP2110/1/2/3/4
Maximum Rating,
DC Supply Voltage, V
CC
to GND..............–0.5 to +7.0 Vdc
Input Voltage Levels Relative
to Ground.......................................–0.5 to V
CC
+ 0.5 Vdc
Operating Temperature .............................–40
°
C to +85
°
C
Storage Temperature................................–40
°
C to +100
°
C
Maximum Solder Temperature 0.063”
below seating plane, t<5 sec)...............................260
°
C
Relative Humidity at 85
°
C............................................85%
Note
: Maximum voltage is with no LEDs illuminated
Enlarged Character Font
Dimensions in inches (mm)
Write Cycle Timing Diagram
0.112
(2.85)
0.030 (0.76) Typ.
0.01 (0.254)
0.026 (0.65) Typ.
0.189
(4.81)
R1
R2
R3
R4
R5
R6
R7
C1 C2 C3 C4 C5
Tas Tah
Tceh
Tces
Tw
Tdh
Tds
Tbw
CE
D7-D0
WR
FL, A3-A0 see Notes
Tacc
see Notes
see Notes
see Notes
*Notes:
1. All input voltages are
(VIL=0.8 V, VIH=2.0 V).
2. These wave forms are not
edge triggered.
3. Tbw=Tas + Tah
Switching Specifications
(over operating temperature range and V
CC
=4.5 V)
1. Wait 300 ns min. after the reset function is turned off.
2. Tacc=Tas + Tw + Tah
3. The Clear Cycle Time may be shortened by writing a second
Control Word with the Clear Bit disabled, 160 ns after the first
control word that enabled the Clear Bit.
Symbol Description Min. Units
Tbw Time Between Writes 30 ns
Tacc
(2)
Display Access Time 130 ns
Tas Address Setup Time 10 ns
Tces Chip Enable Setup Time 0 ns
Tah Address Hold Time 20 ns
Tceh Chip Enable Hold Time 0 ns
Tw Write Active Time 100 ns
Tds Data Valid Prior to Rising Edge of
Write 50 ns
Tdh Data Hold Time 20 ns
Trc
(1)
Reset Active Time 300 ns
Tclr
(3)
Clear Cycle Time 3
µ
s
data wait data
write control
word-clear bit
enabled
wait 130 ns write control
word-clear bit
enabled
2–122
PDSP2110/1/2/3/4
Optical Characteristics at 25
°
C
, V
CC
=5.0 V at Full Brightness
Red PDSP2110
Yellow PDSP2111
High Efficiency Red PDSP2112
Green PDSP2113
High Efficiency Green PDSP2114
Note
1. Peak luminous intensity is meaaured at T
A
=T
J
=25
°
C. No time is allowed for the device to warm up prior to measurement.
Description Symbol Min. Typ. Units
Peak Luminous Intensity
(1)
I
V
peak
70 90
µ
cd/dot
Peak Wavelength
λ
(peak) 660 nm
Dominant Wavelength
λ
(d) 639 nm
Description Symbol Min. Typ. Units
Peak Luminous Intensity
(1)
I
V
peak
130 210
µ
cd/dot
Peak Wavelength
λ
(peak) 583 nm
Dominant Wavelength
λ
(d) 585 nm
Description Symbol Min. Typ. Units
Peak Luminous Intensity
(1)
I
V
peak
150 330
µ
cd/dot
Peak Wavelength
λ
(peak) 630 nm
Dominant Wavelength
λ
(d) 626 nm
Description Symbol Min. Typ. Units
Peak Luminous Intensity
(1)
I
V
peak
150 260
µ
cd/dot
Peak Wavelength
λ
(peak) 565 nm
Dominant Wavelength
λ
(d) 570 nm
Description Symbol Min. Typ. Units
Peak Luminous Intensity
(1)
I
V
peak
200 510
µ
cd/dot
Peak Wavelength
λ
(peak) 568 nm
Dominant Wavelength
λ
(d) 574 nm
2–123
PDSP2110/1/2/3/4
Electrical Characteristics at 25
°
C
Note: 1. Average I
CC
measured at full brightness. Peak I
CC
=2 X I
AVG
I
CC
(# displayed).
2. Internal/external frequency duty factor is 50%.
Parameters Limits Conditions
Min. Typ. Max. Units
V
CC
4.5 5.0 5.5 V
I
CC
Blank 0.5 1.0 mA V
CC
=5 V, V
IN
=5 V
I
CC
8 digits
(1)
12 dots/character 200 255 mA V
CC
=5 V, “V” displayed in
all eight digits
I
CC
8 digits
(1)
20 dots/character 300 370 mA V
CC
=5 V, “#” displayed in
all eight digits
I
IP
Current
(with pull-up) 11 18
µ
AV
CC
=5 V, V
IN
=0 V to V
CC
,
(WR, CE, FL, RST, CLKSEL)
I, Input Leakage Current
(no pull-up)
±
1
µ
AV
CC
=5 V,V
IN
=0 V to V
CC
,
(Clk I/O, A0-A3, D0-D7)
V
IH
Input Voltage High 2.0 V
CC
+0.3 VV
CC
=4.5 V to 5.5 V
V
IL
Input Voltage Low GND
–0.3 0.8 V V
CC
=4.5 V to 5.5 V
V
OL
Output Voltage Low
(Clock Pin) 0.4 V V
CC
=4.5 V to 5.5 V,
I
OL
=1.6 mA
V
OH
Output Voltage High
(Clock Pin) 2.4 V V
CC=4.5 V to 5.5 V,
IOH=40mA
IOH Output Current High
(Clock I/O) –0.9 mA VCC=4.5 V, VOH=–2.4 V
IOL Output Current Low
(Clock I/O) 1.6 2 mA VCC=4.5 V, VOL=–0.4 V
θJC Thermal Resistance
Junction to Case 25 °C/W
FEXT External Clock
Input Frequency (2) 28 81.14 KHz VCC=5.0 V, CLKSEL=0
FOSC Internal Clock
Output Frequency (2) 28 81.14 KHz VCC=5.0 V, CLKSEL=1
Clock I/O Buss Loading 240 pF
Clock Out Rise Time 500 ns VCC=4.5 V, VOH=2.4 V
Clock Out Fall Time 500 ns VCC=4.5 V, VOL=0.4 V
FM, Digit Multiplex
Frequency 125 256 362.5 Hz
Blinking Rate 0.98 2 2.83 Hz
2–124
PDSP2110/1/2/3/4
T op View
Pin Assignments
Cascading the PDSP211X Displays
Pin Function Pin Function
1 RST 28 D7
2FL 27 D6
3A0 26D5
4A1 25D4
5 A2 24 D3
6 A3 23 D2
7 Substr. bias 22 No Pin
8 21
9 20 D1
10 No Connect 19 D0
11 CLKSEL 18 No Connect
12 CLK I/O 17 CE
13 WR 16 GND (logic)
14 VCC 15 GND (supply)
28 Pins 15
1 Pins 14
Digit
0 1 2 3 4 5 6 7
RD WR FL RST CLK I/O CLKSEL
D0-D7 A0-A4 CE
PDSP2110/1/2/3/4S
D0-D7 A0-A4 CE
Up to14 More Displays
in between
Address Decode Chip 1 to 14
Address
Data I/O
RD
WR
FL
RST
VCC
A6
A7
A8
A9
Address
Decoder
PDSP2110/1/2/3/4S
RD WR FL RST CLK I/O CLKSEL
0
15
Pin Definitions
Pin Function Definition
1RST Used for initiallization of a display and sy-
chronization of blinking for multiple displays
2FL Low input accesses the Flash RAM
3 A0 Address input LSB
4 A1 Address input
5 A2 Address input MSB
6 A3 Mode selector
7 Substr. bias Used to bias IC substrate, must
be connected to VCC. Can't be
used to supply power to display.
8
9
10 No connect
11 CLKSEL Selects internal/external clock source
12 CLK I/O Ouputs master clock or inputs externa l
clock
13 WR A low will write data into the display if CE
is low
14 VCC Positive power supply input
15 GND Analog Ground for LED drivers
16 GND Digital Ground for internal logic
17 CE Enables access to the display
18 No Connect
19 D0 Data input LSB
20 D1 Data input
21 No pin
22
23 D2
Data input
24 D3
25 D4
26 D5
27 D6
28 D7 Data input MSB, selects ROM, page 1 or 2
2–125 PDSP2110/1/2/3/4
Character Set
ROM Page 1 (D7 = 0)
ROM Page 2 (D7 = 1)
2–126
PDSP2110/1/2/3/4
Block Diagram
Functional Description
The PDSP211X block diagram is comprised of the following
major blocks and registers.
Display Memory consists of a 8x8 bit RAM block. Each of
the eight 8-bit words holds the 7-bit ASCII data (bit D0-D6).
The 8th bit, D7 selects 1 of the 2 pages of character ROM.
D7=0 selects Page 1 of the ROM and D7=1 selects Page 2 of
the ROM. A3=1.
RST can be used to initialize display operation upon power
up or during normal operation. When activated, RST will clear
the Flash RAM and Conrol W or d Register (00H) and reset the
internal counter. All eight display memory locations will be set
to 20H to show blanks in all digits.
FL pin enables access to the Flash RAM. The Flash RAM
will set (D0=1)or reset (D0=0) flashing of the character
addressed by A0-A2.
The 1x8 bit Control W ord RAM is loaded with attribute data
if A3=0.
The Control W ord Logic decodes attribute data for proper
implementation.
Character ROM is designed for two pages of 128 characters
each. Both pages of the ROM are Mask Programmable for
custom fonts. On the standard product page one contains
standard ASCII, selected Eur opean characters and some sci-
entific symbols. Page two contains Katakana characters,
more European characters, avionics, and other graphic
symbols.
The Clock Source could either be the internal oscillator
(CLKSEL=1) of the device or an external clock
(CLKSEL=0) could be an input from another PDSP211X dis-
play for the synchronization of blinking for multiple displays.
0 1 2 3 4 5 6 7
DISPLAY
Rows 0 to 13
Columns 0 to 19
Column
Data
Row Control Logic
& Row Drivers
Blink
Rate
÷ 128
Counter
÷ 7
Counter
÷ 32
Counter
OSC
D6
D5
D4
D3
D2
D1
D0
D7
Control Word
Decode Logic
Display
Memory
7 Bit ASCII
Code
A0 A1 A2 A3 WR CE FL
Address Decoder
Flash RAM
(8 x 1 Bit)
Address
Lines
Row Decoder
ROM 1 ROM 2
128x7 Bit
ASCII
Character
Decode
(4.48K Bits)
128x7 Bit
ASCII
Character
Decode
(4.48K Bits)
Timing and
Control Logic Master
Slave
Latches
Digit
0 to 8
Column
Drivers for
Digit 0 to 8
Latches
Column Decoder
Control Word
Mux
Rate
RST
CLK I/O
C
LKSEL
8 x 8 Bits
The Display Multiplexer controls the Row Drivers so no
additional logic is required for a display system.
The Display has eight digits. Each digit has 35 LEDs clus-
tered into a 5x7 dot matrix.
Theory of Operation
The PDSP211X Programmable display is designed to work
with all major microprocessors. Data entry is via an eight bit
parallel bus. Three bits of address route the data to the
proper digit location in the RAM. Standar d control signals like
WR and CE allow the data to be written into the display.
D0 – D7 data bits are used for both ASCII and control word
data input. A3 acts as the mode selector. If A3=0, D0 – D7
load the RAM with control word data. If A3=1, D0 – D7 will
load the RAM with ASCII and page select data. In the later
mode, D7=0 selects Page 1 of Character ROM and D7=1
selects Page 2 of Character ROM.
For normal operation FL pin should be held high. When FL is
held low, Flash RAM is accessed to set character blinking.
The seven bit ASCII code is decoded by the Character ROM
to generate Column data. Twenty columns worth of data is
sent out each display cycle and it takes fourteen display
cycles to write into eight digits.
The rows are being multiplexed in two sets of seven rows
each. The internal timing and control logic synchronizes the
turning on of rows and presentation of column data to assur e
proper display operation.
2–127
PDSP2110/1/2/3/4
The character Flash Enable causes 2 Hz coming out of the
counter to be ANDED with column drive signal and makes
the column driver to cycle at 2 Hz. Thus the character flashes
at 2 Hz.
The display Blink works the same way as the Flash Enable
but causes all twenty column drivers to cycle at 2 Hz thereby
making all eight digits to blink at 2 Hz.
The Lamp Test causes the column drivers to run at 1/2 duty
cycle thus all the LEDs in all eight digits turn on at 50%
intensity.
Clear bit clears the character RAM and writes a blank into
the display memory. It however does not clear the control
word.
ASCII Data or Control Word Data can be written into the dis-
play at this point. For multiple display operation, CLK I/O
must be properly selected. CLK I/O will output the internal
clock if CLKSEL=1, or will allow input from an external clock
if CLKSEL=0.
Data Input Commands
X = Don’t care
Power up Sequence
Upon power up display will come on at random. Thus the
display should be reset on power-up. The reset will clear the
Flash RAM, Control Word Register and reset the internal
counter. All the digits will show blanks and display brightness
level will be 100%.
Microprocessor Interface
The interface to a micrprocessor is through the 8-bit data bus
(D0-D7), the 4-bit address bus (A0-A3) and control lines FL,
CE and WR.
To write data (ASCII/ Control Word) into the display CE
should be held low , addr ess and data signals stable and WR
should be brought low.
The Control Word is decoded by the Control Word Decode
Logic. Each code has a different function. The code for dis-
play brightness changes the duty cycle for the column driv-
ers. The peak LED current stays the same but the average
LED current diminishes depending on the intensity level.
Signals
CE WR FL A3 A2 A1 A0 Operation
1XXXXXX
X1XXXXX
No operation
No operation
0 0 1 0 0 0 0 Write Control Register
0 011 000
0 011 0 01
0011010
0011011
0 011 100
0011101
0111100
0011111
Digit 0 (left)
Digit 1
Digit 2
Digit 3
Digit 4
Digit 5
Digit 6
Digit 7 (right)
Write display data to
user RAM and Page
Select Register
D0–D6=ASCII Data
D7=0 Select ROM 1
D7=1 Select ROM 2
000X000
000X001
000X010
000X111
000X100
000X101
000X110
000X111
Digit 0 (left)
Digit 1
Digit 2
Digit 3
Digit 4
Digit 5
Digit 6
Digit 7 (right)
Write Flash RAM Register
D0=0 Flashing Charac. off
D0=1 Flashing Charac. on
D1–D7=X
2–128
PDSP2110/1/2/3/4
Control W ord Format
Display Brightness
The display can be programmed to vary between blank, 13%, 20%, 27%, 40%, 53%, 80% and full brightness.
Bits D0, D1 and D2 control the display brightness.
X = Don’t Care
Flash RAM Function
Character Flash is controlled by FL pin, bit D0 and control word bit D3. Combination of FL being low,
proper digit address and D0 being high will write a flash bit into the Flash RAM Register. In the control
word mode when D3 is brought high, the above mentioned character will flash.
Setting the Flash Bit
X = Don’t Care A = Selected Address
Character Flash Control Word
X = Don’t Care B = Selected Brightness
Display Blinking
Blinking Function is independant of Flash function. When D4 is held high, entire display blinks at 2 Hz.
X = Don’t Care B = Selected Brightness
Lamp Test
Bit D6 when brought high will cause all the LEDs in all eight digits to light up at 53% brightness.
Selecting or de-selecting Lamp Test bit has no effect on the display memory.
X = Don’t Care
CE WR FL A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 Display Brightness
001
001
001
001
001
001
001
001
0XX X
0XX X
0XX X
0XX X
0XX X
0XX X
0XX X
0XX X
00 XX X 0 00
00 XX X 0 01
00 XX X 0 10
00 XX X 0 11
00 XX X 1 00
00 XX X 1 01
00 XX X 1 10
00 XX X 1 11
100% Brightness
80% Brightness
53% Brightness
40% Brightness
27% Brightness
20% Brightness
13% Brightness
Blank Display
CE WR FL A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 Operation
000
000XA AA
XA AAXXXXXXX0
XXXXXXX1Flash RAM Disabled
Flash RAM Enabled
CE WR FL A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 Operation
001
0010X XX
0X XX00X00BBB
00X01BBB
Disable Flashing Character
Enable Flashing Character
CE WR FL A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 Operation
001
0010X XX
0X XX00X00BBB
00X10BBB
Display Blinking Disabled
Display Blinking Enabled
CE WR FL A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 Operation
001
0010X XX
0X XX 00X0XXXX
01X00XXX
Lamp Test Disabled
Lamp Test Disabled
2–129
PDSP2110/1/2/3/4
Clear Function
Clear function will clear the display. The Flash RAM will be set to all zeros. An ASCII blank code (20H) will be written into the dis-
play memory. The user must wait 3 ms or write a new control word to the display with conrol word bit D7 = 0 to disable clear
before writing any data to the display memory, otherwise all new data to the display memory will remain cleared. See Switching
Specifications for clear function timing.
X = Don’t Care
Control W ord Format
D7 D6 D5 D4 D3 D2 D1 D0
D2 D1 D0 Brightness
0 0 0 100%
0 0 1 80%
0 1 0 53%
0 1 1 40%
1 0 0 27%
1 0 1 20%
1 1 0 13%
1 1 1 0% Blank
D3 Flash Enable
0 Disable Flashing Character
1 Enable Flashing Character
D4 Blinking Display
0 Disable Blinking Display
1 Enable Blinking Display
D6 Lamp Test
0 Disable Lamp Test
1 Enable Lamp Test (all dots on at 53% brightness)
D7 Clear Enable
0 Disable Clear
1 Enable Clear (Clear Data RAM, Page RAM, Flash RAM)
CE WR FL A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 Operation
001
0010X XX
0X XX 0XXXXXXX
1XXXXX XXClear Disabled
Clear User RAM, Page RAM,
Flash RAM and Display
Clear Enable Lamp Test Not Used Blink Enable Flash Enable Brightness Control
2–130
PDSP2110/1/2/3/4
Electrical and Mechanical Considerations
V oltage Transient Suppression
For best results power the display and the components that
interface with the display to avoid logic inputs higher than
VCC. Additionally, the LEDs may cause transients in the
power supply line while they change display states. The
common practice is to place a parallel combination of a .01
µF and a 22 µF capacitor between VCC and GND for all dis-
play packages.
ESD Protection
The input protection structure of the PDSP2110/1/2/3/4 pro-
vides significant protection against ESD damage. It is capa-
ble of withstanding discharges greater than 2 KV. Take all
the standard precautions, normal for CMOS components.
These include properly grounding personnel, tools, tables,
and transport carriers that come in contact with unshielded
parts. If these conditions are not, or cannot be met, keep the
leads of the device shorted together or the parts in anti-
static packaging.
Soldering Considerations
The PDSP2110/1/2/3/4 can be hand soldered with SN63 sol-
der using a grounded iron set to 260°C.
Wave soldering is also possible following these conditions:
Preheat that does not exceed 93°C on the solder side of the
PC board or a package surface temperature of 85°C. Water
soluble organic acid flux (except carboxylic acid) or resin-
based RMA flux without alcohol can be used.
Wave temperature of 245°C ±5°C with a dwell between 1.5
sec. to 3.0 sec. Exposure to the wave should not exceed
temperatures above 260°C for five seconds at 0.063" below
the seating plane. The packages should not be immersed in
the wave.
Post Solder Cleaning Procedures
The least offensive cleaning solution is hot D.I. water (60°C)
for less than 15 minutes. Addition of mild saponifiers is
acceptable. Do not use commercial dishwasher detergents.
For faster cleaning, solvents may be used. Exercise care in
choosing solvents as some may chemically attack the nylon
package. Maximum exposure should not exceed two min-
utes at elevated temperatures. Acceptable solvents are TF
(trichorotrifluorethane), TA, 111 Trichloroethane, and
unheated acetone.(1)
Note: 1. Acceptable commercial solvents are: Basic TF, Arklone,
P. Genesolv, D. Genesolv DA, Blaco-Tron TF, Blaco-Tron TA, and
Freon TA.
Unacceptable solvents contain alcohol, methanol, methyl-
ene chloride, ethanol, TP35, TCM, TMC, TMS+, TE, or TES.
Since many commercial mixtures exist, contact a solvent
vendor for chemical composition information. Some major
solvent manufacturers are: Allied Chemical Corporation,
Specialty Chemical Division, Morristown, NJ; Baron-
Blakeslee, Chicago, IL; Dow Chemical, Midland, MI; E.I.
DuPont de Nemours & Co., Wilmington, DE.
For further information refer to Appnotes 18 and 19 in the
current Siemens Optoelectronic Data Book.
An alternative to soldering and cleaning the display mod-
ules is to use sockets. Naturally, 28 pin DIP sockets .600"
wide with .100" centers work well for single displays.
Multiple display assemblies are best handled by longer
SIP sockets or DIP sockets when available for uniform
package alignment. Socket manufacturers are Aries Elec-
tronics, Inc., Frenchtown, NJ; Garry Manufacturing, New
Brunswick, NJ; Robinson-Nugent, New Albany, IN; and
Samtec Electronic Hardward, New Albany, IN.
For further information refer to Appnote 22 in the current
Siemens Optoelectronic Data Book.
Optical Considerations
The .200" high character of the PDSP211X gives readabil-
ity up to eight feet. Proper filter selection enhances read-
ability over this distance.
Using filters emphasizes the contrast ratio between a lit
LED and the character background. This will increase the
discrimination of differ ent characters. The only limitation is
cost. Take into consideration the ambient lighting environ-
ment for the best cost/benefit ratio for filters.
Incandescent (with almost no green) or fluorescent (with
almost no red) lights do not have the flat spectral
response of sunlight. Plastic band-pass filters are an inex-
pensive and effective way to strengthen contrast ratios.
The PDSP2110/2112 are red/high efficiency red displays
and should be matched with long wavelength pass filter in
the 570 nm to 590 nm range. The PDSP2111/2113/2114
should be matched with a yellow-green band-pass filter
that peaks at 565 nm. For displays of multiple colors, neu-
tral density grey filters offer the best compromise.
Additional contrast enhancement is gained by shading the
displays. Plastic band-pass filters with built-in louvers offer
the next step up in contrast improvement. Plastic filters
can be improved further with anti-reflective coatings to
reduce glare. The trade-off is fuzzy characters. Mounting
the filters close to the display reduces this effect. Take
care not to overheat the plastic filter by allowing for pr oper
air flow.
Optimal filter enhancements are gained by using circular
polarized, anti-reflective, band-pass filters. The circular
polarizing further enhances contrast by reducing the light
that travels through the filter and reflects back off the dis-
play to less than 1%. Selecting the proper intensity of the
displays allows 10,000 foot candle sunlight viewability.
Several filter manufacturers supply quality filter materials.
Some of them are: Panelgraphic Corporation, W. Cald-
well, NJ; SGL Homalite, Wilmington, DE; 3M Company,
Visual Products Division, St. Paul, MN; Polaroid Corpora-
tion, Polarizer Division, Cambridge, MA; Marks Polarized
Corporation, Deer Park, NY, Hoya Optics, Inc., Fremont,
CA.
One last note on mounting filters: recessing displays and
bezel assemblies is an inexpensive way to provide a
shading effect in overhead lighting situations. Several
bezel manufacturers are: R.M.F. Products, Batavia, IL;
Nobex Components, Griffith Plastic Corp., Burlingame,
CA; Photo Chemical Products of California, Santa Monica,
CA; I.E.E.–Atlas, Van Nuys, CA.
