Features
äbq2031 fast-charge control evaluation and
development
äOnboard configuration for fast charge of 2, 3, 4 or 6
lead-acid cells; user-defined option allows other
configurations
äSelectable charge algorithms: Two-Step Voltage,
Two-Step Current, or Pulsed Current
äConstant current (up to 2.5A) and constant voltage
(up to 15V) provided by on-board switch-mode
regulator
äCharge termination by maximum voltage, second
difference of cell voltage, minimum current, or
maximum time-out
äDirect connections for battery, thermistor, and power
supply
äMTO is set for 3.1 hours
äJumper-configurable 3-LED display
General Description
The DV2031S2 Development System provides a develop-
ment environment for the bq2031 Lead-Acid Fast-
Charge IC. The DV2031S2 incorporates a bq2031 in a
buck-type switch-mode regulation mode to provide
fast-charge control for 2, 3, 4, or 6 lead-acid cells.
The DV2031S2 can be configured for three different
charge algorithms with jumpers JP1 and JP3. The
charge algorithms available are
Two-step voltage
Two-step current
Pulsed current
Each algorithm consists of pre-charge qualification, fast
charge, and maintenance charge periods.
Fast charge termination occurs on
Maximum voltage
The second difference of cell voltage (∆2V)
Minimum current
Maximum time-out
The maintenance charge may be configured for either a
regulated float voltage or a pulsed current.
The user provides a DC power supply and batteries
and configures the board for the number of cells, the
minimum current threshold, and the LED display
mode. The board has direct connections for the battery
and the provided thermistor.
Before using the DV2031S2 board, please review the
bq2031 data sheet (SLUS156) and the application note
entitled “Using the bq2031 to Charge Lead-Acid Bat-
teries” (SLUA017).
1
DV2031S2
SLUU023B DECEMBER 1998 REVISED MARCH 2007 Rev. B Board
Lead-Acid Charger Development System
Control of On-Board
P-FET Switch-Mode Regulator
Please be aware that three important notices concerning operating limitations, standard warranty, and
liability limitations appear at the end of this data sheet.
Connection Descriptions
TB1
DC+ Charger supply (DC) 30V MAX
DC– Ground from charger supply and low
sideofsystemload
TB2
BAT+ Positive battery terminal
BAT– Negative battery terminal
TEM– Thermistor connection (negative)
TEM+ Thermistor connection (positive)
JP1 QSEL Charge algorithm select
JP2 DSEL Display mode select
JP3 TSEL Charge algorithm select
JP4 IGSEL Minimum current select
JP5 Number of cells
Fixed Configuration
The DV2031S2 board has the following fixed character-
istics:
VCC for the fast charge IC is regulated on-board
from the supply at connector TB1. TB1 can accept a
maximum of 30VDC. The minimum charging volt-
age for two cells is 10VDC, and the minimum
charging voltage for six cells is 22VDC.
LED1 and LED2 indicate charge status.
LED3 indicates a charge-pending or fault condition.
Charge begins on the later application of
1. The battery
2. Supply voltage
The onboard regulator supplies a fast charge cur-
rent IMAX of 2.5A. The fast (bulk) charge voltage
VBLK is set at 2.45V per cell (±1%) and the float
voltage VFLT is set at 2.25V per cell (±1%)
The number of cells can be changed within
board-defined parameters, as described below in
“Jumper-Selectable Configuration.”
The switching frequency of the PWM control is
100kHz.
The regulated current is controlled by the value of
the sense resistor RSNS according to the equation
IV
R
CHG
SNS
=025.
The value of RSNS (R20 in the schematic) at ship-
ment is 0.10Ω. This resistor can be changed de-
pending on the application. The suggested maxi-
mum charging current IMAX for the bq2031S1
board is 2.5A with an accuracy of ±10%.
The thermistor provided is the Philips
2322–640–63103. With this thermistor connected
between TEM+ and TEM–, the temperature fault
limits are VLTF (low temperature fault) = 0°C, VHTF
(high temperature fault) = 45°C, and VTCO (charge
cutoff) = 47°C.
Jumper-Selectable
Configuration
The DV2031S2 must be configured as follows:
DSEL (JP2) selects the LED display options as de-
scribed in Table 1 on the following page.
TSEL (JP3) and QSEL (JP1) select the charge algo-
rithm as shown in Table 2 on the following page.
IGSEL (JP4) sets IMIN and the Two-Step Current
maintenance charge as a ratio of IMAX.I
COND =
IMAX/5, as shown below:
JP4 IMIN Fixed-Pulse
Average Current
LIMAX 10
II
COND MAX
210
=
HIMAX 20
II
COND MAX
420
=
None IMAX 30
II
COND MAX
830
=
As indicated in the Jumper Configuration Diagram,
JP5 configures the board for the number of
lead-acid cells.
2
DV2031S2
Rev. B Board
3
DV2031S2
Rev. B Board
JP1 JP3 Fast Charge Termination Maintenance
L H or L Two-Step Voltage IMIN or MTO Constant voltage at
VFLT
H L Two-Step Current VBLK or ∆2VorMTO Fixed-pulse current at
ICOND
HH Pulsed Current VBLK (see Note) Fast-charge rate
when VBLK ≤VFLT
Note: Fast-charge termination by MTO is a fault.
Table 2. Charge Algorithms
Mode Charge Action State LED1LED2LED3
L
Battery absent or over-voltage fault Low Low High
Pre-charge qualification Flash Low Low
Fast charging High Low Low
Maintenance charging Low High Low
Charge pending (temperature out of range) X X Flash
Charging fault X X High
H
Battery absent or over-voltage fault Low Low High
Pre-charge qualification High High Low
Fast charge Low High Low
Maintenance charging High Low Low
Charge pending (temperature out of range) X X Flash
Charging fault X X High
None
Battery absent or over-voltage fault Low Low High
Pre-charge qualification Flash Flash Low
Fast charge: current regulation Low High Low
Fast charge: voltage regulation High High Low
Maintenance charging High Low Low
Charge pending (temperature out of range) X X Flash
Charging fault X X High
Notes: 1=V
CC;0=V
SS; X = LED state when fault occurred; Flash = 16s low, 16s high.
In the Pulsed Current algorithm, the bq2031 annunciates maintenance when charging current is off and
fast charge whenever charging current is on.
Table 1. bq2031 LED Display Output Summary
Setup Procedure
1. Configure DSEL, TSEL, QSEL, maximum time-out,
and the number of cells.
2. Connect the thermistor to TEM+ and TEM–.
3. Attach the battery pack to BAT+ and BAT–.
4. Connect the charging supply to TB1 (DC+, DC-).
The combined charging and system load should not ex-
ceed the IMAX limit of 2.5A.
4
DV2031S2
Rev. B Board
JC2031.eps
BAT+
DC-
DC+
TB2
TB1
JP4
2346
L
H JP1
QSEL DSEL TSEL
JP2
H
JP3
L
H
BAT-
TEM-
TEM+
Cells #
IGSEL
JP5
H
LL
Jumper Configuration Diagram
5
TB1
1
2
1
+5V
+5V
1
1
2
1
2
2
IN
GND
OUT
VDC D6A
D6B
U2
78L05
D1
1N4148 D2
1N4744
Q3
ZTX790A Q1
MTP23P06V
Q2
2N3904
D7B
1N5821 D7A
SBL845DI
C6
1000µF
35V
C7
10µF
35V
C3
10µF
C5
0.1µF
bq2031
2031s2-b.eps
U1
LED2/DSEL
LED1/TSEL
LED3/QSEL
MOD
COM
TPWM
TMTO
16
LED2
LED1
LED3
15
14
13
12
11
10
9
1
123123123
2
3
4
5
6
7
8
FLOAT
BAT
VCOMP
ICOMP
IGSEL
SNS
TS
V
CC
V
SS
C2
0.1µF
L1
200µH
R21
20K
C15
0.1µF
C14
470µF
35v
C11
0.01µF
C8
C1
0.1µF
C10
0.1µF
C13
0.1µF
R10
10K
JP3
TSEL JP2
DSEL JP1
QSEL
R11
10K
Q5
2N3904
R9
10K
R1
1K R13
0_OHMS
D5
LED3
D3
LED2
D4
LED1
See application note for additional details.
Not used
C12
1000pF
R5
62K
R22
43_OHMS
Q4
ZTX790A
R19
464K
1%
R12
49.9K
1%
+5V
+5V
3
2
1
R18
1K R2
6.81K
1%
R3
3.74K
1%
JP4
IGSEL
R8
220
C9
10µF
R4
10K
R16
52.3K
1%
R15
102K
1%
R17
154K
1%
R14
261K
1%
R20
0.10
2W
TEM
BAT
TB2
BAT+
BAT-
TEM-
TEM+
2 Cell
JP5
2
1
2
3
4
468
1357
3 Cell 4 Cell 6 Cell
R6
10K
R7
100K
C4
1000pF
VDC+
1N5821
SBL845DI
DV2031S2 Board Schematic
DV2031S2
Rev. B Board
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Copyright 2007, Texas Instruments Incorporated
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