LM4863 www.ti.com SNAS114F - OCTOBER 1999 - REVISED MAY 2013 LM4863 Dual 2.2W Audio Amplifier Plus Stereo Headphone Function Check for Samples: LM4863 FEATURES APPLICATIONS * * * * * * * * 1 2 Stereo Headphone Amplifier Mode "Click and Pop" Suppression Circuitry Unity-Gain Stable Thermal Shutdown Protection Circuitry SOIC, TSSOP, exposed-DAP TSSOP, and WQFN packages KEY SPECIFICATIONS * * * * PO at 1% THD+N - LM4863LQ, 3, 4 loads: 2.5W(typ), 2.2W(typ) - LM4863MTE, 3, 4 loads: 2.5W(typ), 2.2W(typ) - LM4863MTE, 8 load: 1.1W(typ) - LM4863, 8: 1.1W(typ) Single-ended mode THD+N at 75mW into 32: 0.5%(max) Shutdown current: 0.7A(typ) Supply voltage range: 2.0V to 5.5V Multimedia Monitors Portable and Desktop Computers Portable Televisions DESCRIPTION The LM4863 is a dual bridge-connected audio power amplifier which, when connected to a 5V supply, will deliver 2.2W to a 4 load or 2.5W to a 3 load with less than 1.0% THD+N (see Notes below). In addition, the headphone input pin allows the amplifiers to operate in single-ended mode when driving stereo headphones. Boomer audio power amplifiers were designed specifically to provide high quality output power from a surface mount package while requiring few external components. To simplify audio system design, the LM4863 combines dual bridge speaker amplifiers and stereo headphone amplifiers on one chip. The LM4863 features an externally controlled, lowpower consumption shutdown mode, a stereo headphone amplifier mode, and thermal shutdown protection. It also utilizes circuitry to reduce "clicks and pops" during device turn-on. . NOTE An LM4863MTE or LM4863LQ that has been properly mounted to a circuit board will deliver 2.2W into 4. The other package options for the LM4863 will deliver 1.1W into 8. See Application Information for further information concerning the LM4863MTE and LM4863LQ. NOTE An LM4863MTE or LM4863LQ that has been properly mounted to a circuit board and forced-air cooled will deliver 2.5W into 3. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 1999-2013, Texas Instruments Incorporated LM4863 SNAS114F - OCTOBER 1999 - REVISED MAY 2013 www.ti.com Typical Application Note: Pin out shown for SOIC package. Refer to Connection Diagrams for the pinout of the TSSOP, Exposed-DAP TSSOP, and Exposed-DAP WQFN packages. Connection Diagrams Figure 1. 16-Pin SOIC - Top View See Package Number DW0016B 2 Figure 2. 20-Pin TSSOP - Top View See Package Number PW0020A Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 LM4863 www.ti.com SNAS114F - OCTOBER 1999 - REVISED MAY 2013 Figure 3. 20-Pin Exposed-DAP TSSOP - Top View See Package Number PWP0020A Figure 4. 24-Pin Exposed-DAP WQFN - Top View See Package Number NHW0024A Not recommended for new designs. Contact TI Audio Marketing. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 3 LM4863 SNAS114F - OCTOBER 1999 - REVISED MAY 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) (2) Supply Voltage 6.0V -65C to +150C Storage Temperature -0.3V to VDD +0.3V Input Voltage (3) Internally limited ESD Susceptibility (4) 2000V Power Dissipation ESD Susceptibility (5) 200V Junction Temperature Solder Information Thermal Resistance 150C Small Outline Package Vapor Phase (60 sec.) 215C Infrared (15 sec.) 220C JC (typ)--DW0016B 20C/W JA (typ)--DW0016B 80C/W JC (typ)--DW0020A 20C/W JA (typ)--DW0020A 80C/W JC (typ)--PWP0020A 2C/W JA (typ)--PWP0020A 41C/W (6) JA (typ)--PWP0020A 51C/W (7) 90C/W (8) JA (typ)--PWP0020A JC (typ)--NHW0024A 3.0C/W JA (typ)--NHW0024A (1) (2) (3) (4) (5) (6) (7) (8) (9) 42C/W (9) Not recommended for new designs. Contact Texas Insturments Audio Marketing. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. The maximum power dissipation is dictated by TJMAX, JA, and the ambient temperature TA and must be derated at elevated temperatures. The maximum allowable power dissipation is PDMAX = (TJMAX - T A)/JA. For the LM4863, TJMAX = 150C. For the JAs for different packages, please see Application Informationor the Absolute Maximum Ratings section. Human body model, 100 pF discharged through a 1.5k resistor. Machine model, 220pF - 240pF discharged through all pins. The given JA is for an LM4863 packaged in an PWP0020A with the exposed-DAP soldered to an exposed 2in2 area of 1oz printed circuit board copper. The given JA is for an LM4863 packaged in an PWP0020A with the exposed-DAP soldered to an exposed 1in2 area of 1oz printed circuit board copper. The given JA is for an LM4863 packaged in an PWP0020A with the exposed-DAP not soldered to printed circuit board copper. The given JA is for an LM4863 packaged in an NHW0024A with the exposed-DAP soldered to an exposed 2in2 area of 1oz printed circuit board copper. Operating Ratings Temperature Range TMIN TA TMAX 4 -40C TA 85C 2.0V VDD 5.5V Supply Voltage Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 LM4863 www.ti.com SNAS114F - OCTOBER 1999 - REVISED MAY 2013 Electrical Characteristics for Entire IC (1) (2) The following specifications apply for VDD= 5V unless otherwise noted. Limits apply for TA= 25C. Symbol Parameter Conditions LM4863 Typical VDD (3) Limit Supply Voltage IDD Quiescent Power Supply Current VIN = 0V, IO = 0A (5) , HP-IN = 0V 11.5 VIN = 0V, IO = 0A (5) , HP-IN = 4V 5.8 Units (Limits) 2 V (min) 5.5 V (max) 20 mA (max) 6 mA (min) 2 A (max) mA ISD Shutdown Current VIH Headphone High Input Voltage 4 V (min) VIL Headphone Low Input Voltage 0.8 V (max) (1) (2) (3) (4) (5) VDD applied to the SHUTDOWN pin (4) 0.7 Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not specify specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not specified for parameters where no limit is given, however, the typical value is a good indication of device performance. All voltages are measured with respect to the ground (GND) pins unless otherwise specified. Typicals are measured at 25C and represent the parametric norm. Limits are specified to TI's AOQL (Average Outgoing Quality Level). The quiescent power supply current depends on the offset voltage when a practical load is connected to the amplifier. Electrical Characteristics for Bridged-Mode Operation (1) (2) The following specifications apply for VDD= 5V unless otherwise specified. Limits apply for TA= 25C. Symbol Parameter Conditions LM4863 Typical VOS Output Offset Voltage PO Output Power (5) VIN = 0V (3) 5 Limit 50 (4) Units (Limits) mV (max) (6) THD+N = 1%, f = 1kHz LM4863MTE, RL = 3 LM4863LQ, RL = 3 2.5 2.5 W W LM4863MTE, RL = 4 LM4863LQ, RL = 4 2.2 2.2 W W LM4863, RL = 8 1.1 THD+N = 10%, f = 1kHz 1.0 W (min) (6) LM4863MTE, RL = 3 LM4863LQ, RL = 3 3.2 3.2 W W LM4863MTE, RL = 4 LM4863LQ, RL = 4 2.7 2.7 W W LM4863, RL = 8 THD+N = 1%, f = 1kHz, RL = 32 1.5 W 0.34 W % THD+N Total Harmonic Distortion+Noise 20Hz f 20kHz, AVD = 2 LM4863MTE, RL = 4, PO = 2W LM4863LQ, RL = 4, PO = 2W 0.3 0.3 LM4863, RL = 8, PO = 1W 0.3 % PSRR Power Supply Rejection Ratio VDD = 5V, VRIPPLE = 200mVRMS, RL = 8, CB = 1.0F 67 dB (1) (2) (3) (4) (5) (6) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not specify specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not specified for parameters where no limit is given, however, the typical value is a good indication of device performance. All voltages are measured with respect to the ground (GND) pins unless otherwise specified. Typicals are measured at 25C and represent the parametric norm. Limits are specified to TI's AOQL (Average Outgoing Quality Level). Output power is measured at the device terminals. When driving 3 or 4 and operating on a 5V supply, the LM4863LQ and LM4863MTE must be mounted to the circuit board that has a minimum of 2.5in2 of exposed, uninterrupted copper area connected to the WQFN package's exposed DAP. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 5 LM4863 SNAS114F - OCTOBER 1999 - REVISED MAY 2013 www.ti.com Electrical Characteristics for Bridged-Mode Operation (1)(2) (continued) The following specifications apply for VDD= 5V unless otherwise specified. Limits apply for TA= 25C. Symbol Parameter Conditions LM4863 Typical (3) Limit (4) Units (Limits) XTALK Channel Separation f = 1kHz, CB = 1.0F 90 dB SNR Signal To Noise Ratio VDD = 5V, PO = 1.1W, RL = 8 98 dB Electrical Characteristics for Single-Ended Operation (1) (2) The following specifications apply for VDD= 5V unless otherwise specified. Limits apply for TA= 25C. Symbol Parameter Conditions LM4863 Typical VOS Output Offset Voltage VIN = 0V PO Output Power (3) Limit (4) Units (Limits) 5 50 mV (max) THD+N = 0.5%, f = 1kHz, RL = 32 85 75 mW (min) THD+N = 1%, f = 1kHz, RL = 8 340 mW THD+N = 10%, f = 1kHz, RL = 8 440 mW THD+N Total Harmonic Distortion+Noise AV = -1, PO = 75mW, 20Hz f 20kHz, RL = 32 0.2 % PSRR Power Supply Rejection Ratio CB = 1.0F, VRIPPLE = 200mV RMS, f = 1kHz 52 dB XTALK Channel Separation f = 1kHz, CB = 1.0F 60 dB SNR Signal To Noise Ratio VDD = 5V, PO = 340mW, RL = 8 95 dB (1) (2) (3) (4) 6 Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not specify specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not specified for parameters where no limit is given, however, the typical value is a good indication of device performance. The maximum power dissipation is dictated by TJMAX, JA, and the ambient temperature TA and must be derated at elevated temperatures. The maximum allowable power dissipation is PDMAX = (TJMAX - T A)/JA. For the LM4863, TJMAX = 150C. For the JAs for different packages, please see Application Informationor the Absolute Maximum Ratings section. Typicals are measured at 25C and represent the parametric norm. Limits are specified to TI's AOQL (Average Outgoing Quality Level). Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 LM4863 www.ti.com SNAS114F - OCTOBER 1999 - REVISED MAY 2013 Typical Performance Characteristics- PWP Specific Characteristics LM4863MTE THD+N vs Output Power LM4863MTE THD+N vs Frequency Figure 5. Figure 6. LM4863MTE THD+N vs Output Power LM4863MTE THD+N vs Frequency Figure 7. Figure 8. LM4863MTE Power Dissipation vs Power Output LM4863MTE Power Derating Curve Figure 9. Figure 10. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 7 LM4863 SNAS114F - OCTOBER 1999 - REVISED MAY 2013 www.ti.com Typical Performance Characteristics- PWP Specific Characteristics (continued) LM4863MTE Power Derating Curve This curve shows the LM4863MTE's thermal dissipation ability at different ambient temperatures given these conditions: 500LFPM + JEDEC board: The part is soldered to a 1S2P 20-lead exposed-DAP TSSOP test board with 500 linear feet per minute of forced-air flow across it. Board information - copper dimensions: 74x74mm, copper coverage: 100% (buried layer) and 12% (top/bottom layers), 16 vias under the exposed-DAP. 500LFPM + 2.5in2: The part is soldered to a 2.5in2, 1 oz. copper plane with 500 linear feet per minute of forced-air flow across it. 2.5in2: The part is soldered to a 2.5in2, 1oz. copper plane. Not Attached: The part is not soldered down and is not forced-air cooled. Figure 11. 8 Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 LM4863 www.ti.com SNAS114F - OCTOBER 1999 - REVISED MAY 2013 Non-PWP Specific Characteristics THD+N vs Frequency THD+N vs Frequency Figure 12. Figure 13. THD+N vs Frequency THD+N vs Output Power Figure 14. Figure 15. THD+N vs Output Power THD+N vs Output Power Figure 16. Figure 17. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 9 LM4863 SNAS114F - OCTOBER 1999 - REVISED MAY 2013 www.ti.com Non-PWP Specific Characteristics (continued) 10 THD+N vs Output Power THD+N vs Frequency Figure 18. Figure 19. THD+N vs Output Power THD+N vs Frequency Figure 20. Figure 21. Output Power vs Load Resistance Power Dissipation vs Supply Voltage Figure 22. Figure 23. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 LM4863 www.ti.com SNAS114F - OCTOBER 1999 - REVISED MAY 2013 Non-PWP Specific Characteristics (continued) Output Power vs Supply Voltage Output Power vs Supply Voltage Figure 24. Figure 25. Output Power vs Supply Voltage Output Power vs Load Resistance Figure 26. Figure 27. Output Power vs Load Resistance Power Dissipation vs Output Power Figure 28. Figure 29. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 11 LM4863 SNAS114F - OCTOBER 1999 - REVISED MAY 2013 www.ti.com Non-PWP Specific Characteristics (continued) 12 Dropout Voltage vs Supply Voltage Power Derating Curve Figure 30. Figure 31. Power Dissipation vs Output Power Noise Floor Figure 32. Figure 33. Channel Separation Channel Separation Figure 34. Figure 35. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 LM4863 www.ti.com SNAS114F - OCTOBER 1999 - REVISED MAY 2013 Non-PWP Specific Characteristics (continued) Power Supply Rejection Ratio Open Loop Frequency Response Figure 36. Figure 37. Supply Current vs Supply Voltage Figure 38. External Components Description (Refer to Figure 39.) Components Functional Description 1. Ri The Inverting input resistance, along with Rf, set the closed-loop gain. Ri, along with Ci, form a high pass filter with fc = 1/(2RiCi). 2. Ci The input coupling capacitor blocks DC voltage at the amplifier's input terminals. Ci, along with Ri, create a highpass filter with fc = 1/(2RiCi). Refer to SELECTING PROPER EXTERNAL COMPONENTS, for an explanation of determining the value of Ci. 3. Rf The feedback resistance, along with Ri, set the closed-loop gain. 4. Cs The supply bypass capacitor. Refer to POWER SUPPLY BYPASSING for information about properly placing, and selecting the value of, this capacitor. 5. CB The capacitor, CB, filters the half-supply voltage present on the BYPASS pin. Refer to SELECTING PROPER EXTERNAL COMPONENTS section for information concerning proper placement and selecting CB's value. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 13 LM4863 SNAS114F - OCTOBER 1999 - REVISED MAY 2013 www.ti.com APPLICATION INFORMATION EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATIONS The LM4863's exposed-DAP (die attach paddle) packages (PWP and NHW) provide a low thermal resistance between the die and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the die to the surrounding PCB copper traces, ground plane and, finally, surrounding air. The result is a low voltage audio power amplifier that produces 2.2W at 1% THD with a 4 load. This high power is achieved through careful consideration of necessary thermal design. Failing to optimize thermal design may compromise the LM4863's high power performance and activate unwanted, though necessary, thermal shutdown protection. The PWP and NHW packages must have their DAPs soldered to a copper pad on the PCB. The DAP's PCB copper pad is connected to a large plane of continuous unbroken copper. This plane forms a thermal mass and heat sink and radiation area. Place the heat sink area on either outside plane in the case of a two-sided PCB, or on an inner layer of a board with more than two layers. Connect the DAP copper pad to the inner layer or backside copper heat sink area with 32(4x8) (PWP) or 6(3x2) (NHW) vias. The via diameter should be 0.012in 0.013in with a 1.27mm pitch. Ensure efficient thermal conductivity by plating-through and solder-filling the vias. Best thermal performance is achieved with the largest practical copper heat sink area. If the heatsink and amplifier share the same PCB layer, a nominal 2.5in2 (min) area is necessary for 5V operation with a 4 load. Heatsink areas not placed on the same PCB layer as the LM4863 should be 5in2 (min) for the same supply voltage and load resistance. The last two area recommendations apply for 25c ambient temperature. Increase the area to compensate for ambient temperatures above 25c. In systems using cooling fans, the LM4863MTE can take advantage of forced air cooling. With an air flow rate of 450 linear-feet per minute and a 2.5in2 exposed copper or 5.0in2 inner layer copper plane heatsink, the LM4863MTE can continuously drive a 3 load to full power. The LM4863LQ achieves the same output power level without forced air cooling. In all circumstances and conditions, the junction temperature must be held below 150C to prevent activating the LM4863's thermal shutdown protection. The LM4863's power de-rating curve, Figure 31, in Non-PWP Specific Characteristics shows the maximum power dissipation versus temperature. Example PCB layouts for the exposed-DAP TSSOP and WQFN packages are shown in RECOMMENDED PRINTED CIRCUIT BOARD LAYOUT. Further detailed and specific information concerning PCB layout, fabrication, and mounting an WQFN package is available from Texas Instruments' package Engineering Group. When contacting them, ask for "Preliminary Application Note for the Assembly of the WQFN Package on a Printed Circuit Board, Revision A dated 7/14/00." PCB LAYOUT AND SUPPLY REGULATION CONSIDERATIONS FOR DRIVING 3 AND 4 LOADS Power dissipated by a load is a function of the voltage swing across the load and the load's impedance. As load impedance decreases, load dissipation becomes increasingly dependent on the interconnect (PCB trace and wire) resistance between the amplifier output pins and the load's connections. Residual trace resistance causes a voltage drop, which results in power dissipated in the trace and not in the load as desired. For example, 0.1 trace resistance reduces the output power dissipated by a 4 load from 2.1W to 2.0W. This problem of decreased load dissipation is exacerbated as load impedance decreases. Therefore, to maintain the highest load dissipation and widest output voltage swing, PCB traces that connect the output pins to a load must be as wide as possible. Poor power supply regulation adversely affects maximum output power. A poorly regulated supply's output voltage decreases with increasing load current. Reduced supply voltage causes decreased headroom, output signal clipping, and reduced output power. Even with tightly regulated supplies, trace resistance creates the same effects as poor supply regulation. Therefore, making the power supply traces as wide as possible helps maintain full output voltage swing. 14 Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 LM4863 www.ti.com SNAS114F - OCTOBER 1999 - REVISED MAY 2013 * Refer to SELECTING PROPER EXTERNAL COMPONENTS, for a detailed discussion of CB size. Pin out shown for the SOIC package. Refer to Connection Diagrams for the pinout of the TSSOP, Exposed-DAP TSSOP, and Exposed-DAP WQFN packages. Figure 39. Typical Audio Amplifier Application Circuit BRIDGE CONFIGURATION EXPLANATION As shown in Figure 39, the LM4863 consists of two pairs of operational amplifiers, forming a two-channel (channel A and channel B) stereo amplifier. (Though the following discusses channel A, it applies equally to channel B.) External resistors Rf and Ri set the closed-loop gain of Amp1A, whereas two internal 20k resistors set Amp2A's gain at -1. The LM4863 drives a load, such as a speaker, connected between the two amplifier outputs, -OUTA and +OUTA. Figure 39 shows that Amp1A's output serves as Amp2A's input. This results in both amplifiers producing signals identical in magnitude, but 180 out of phase. Taking advantage of this phase difference, a load is placed between -OUTA and +OUTA and driven differentially (commonly referred to as "bridge mode"). This results in a differential gain of AVD = 2 x (Rf / Ri) (1) Bridge mode amplifiers are different from single-ended amplifiers that drive loads connected between a single amplifier's output and ground. For a given supply voltage, bridge mode has a distinct advantage over the singleended configuration: its differential output doubles the voltage swing across the load. This produces four times the output power when compared to a single-ended amplifier under the same conditions. This increase in attainable output power assumes that the amplifier is not current limited or that the output signal is not clipped. To ensure minimum output signal clipping when choosing an amplifier's closed-loop gain, refer to AUDIO POWER AMPLIFIER DESIGN. Another advantage of the differential bridge output is no net DC voltage across the load. This is accomplished by biasing channel A's and channel B's outputs at half-supply. This eliminates the coupling capacitor that single supply, single-ended amplifiers require. Eliminating an output coupling capacitor in a single-ended configuration forces a single-supply amplifier's half-supply bias voltage across the load. This increases internal IC power dissipation and may permanently damage loads such as speakers. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 15 LM4863 SNAS114F - OCTOBER 1999 - REVISED MAY 2013 www.ti.com POWER DISSIPATION Power dissipation is a major concern when designing a successful single-ended or bridged amplifier. Equation 2 states the maximum power dissipation point for a single-ended amplifier operating at a given supply voltage and driving a specified output load PDMAX = (VDD)2 / (22 RL) Single-Ended (2) However, a direct consequence of the increased power delivered to the load by a bridge amplifier is higher internal power dissipation for the same conditions. The LM4863 has two operational amplifiers per channel. The maximum internal power dissipation per channel operating in the bridge mode is four times that of a single-ended amplifier. From Equation 3, assuming a 5V power supply and an 4 load, the maximum single channel power dissipation is 1.27W or 2.54W for stereo operation. PDMAX = 4 x (VDD)2 / (22 RL) Bridge Mode (3) The LM4973's power dissipation is twice that given by Equation 2 or Equation 3 when operating in the singleended mode or bridge mode, respectively. Twice the maximum power dissipation point given by Equation 3 must not exceed the power dissipation given by Equation 4: PDMAX' = (TJMAX - TA) / JA (4) The LM4863's TJMAX = 150C. In the NHW (WQFN) package soldered to a DAP pad that expands to a copper area of 5in2 on a PCB, the LM4863's JA is 20C/W. In the PWP package soldered to a DAP pad that expands to a copper area of 2in2 on a PCB , the LM4863's JA is 41C/W. At any given ambient temperature TJ\A, use Equation 4 to find the maximum internal power dissipation supported by the IC packaging. Rearranging Equation 4 and substituting PDMAX for PDMAX' results in Equation 5. This equation gives the maximum ambient temperature that still allows maximum stereo power dissipation without violating the LM4863's maximum junction temperature. TA = TJMAX - 2 x PDMAX JA (5) For a typical application with a 5V power supply and an 4 load, the maximum ambient temperature that allows maximum stereo power dissipation without exceeding the maximum junction temperature is approximately 99C for the WQFN package and 45C for the PWP package. TJMAX = PDMAX JA + TA (6) Equation 6 gives the maximum junction temperature TJMAX. If the result violates the LM4863's 150C, reduce the maximum junction temperature by reducing the power supply voltage or increasing the load resistance. Further allowance should be made for increased ambient temperatures. The above examples assume that a device is a surface mount part operating around the maximum power dissipation point. Since internal power dissipation is a function of output power, higher ambient temperatures are allowed as output power or duty cycle decreases. If the result of Equation 5 is greater than that of Equation 6, then decrease the supply voltage, increase the load impedance, or reduce the ambient temperature. If these measures are insufficient, a heat sink can be added to reduce JA. The heat sink can be created using additional copper area around the package, with connections to the ground pin(s), supply pin and amplifier output pins. External, solder attached SMT heatsinks such as the Thermalloy 7106D can also improve power dissipation. When adding a heat sink, the JA is the sum of JC, CS, and SA. (JC is the junction-to-case thermal impedance, CS is the case-to-sink thermal impedance, and SAis the sink-to-ambient thermal impedance.) Refer to Typical Performance Characteristics for power dissipation information at lower output power levels. POWER SUPPLY BYPASSING As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection. Applications that employ a 5V regulator typically use a 10F in parallel with a 0.1F filter capacitors to stabilize the regulator's output, reduce noise on the supply line, and improve the supply's transient response. However, their presence does not eliminate the need for a local 1.0F tantalum bypass capacitance connected between the LM4863's supply pins and ground. Do not substitute a ceramic capacitor for the tantalum. Doing so may cause oscillation in the output signal. Keep the length of leads and traces that connect capacitors between the LM4863's power supply pin and ground as short as possible. Connecting a 1F capacitor, CB, between the 16 Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 LM4863 www.ti.com SNAS114F - OCTOBER 1999 - REVISED MAY 2013 BYPASS pin and ground improves the internal bias voltage's stability and improves the amplifier's PSRR. The PSRR improvements increase as the bypass pin capacitor value increases. Too large, however, increases turnon time and can compromise amplifier's click and pop performance. The selection of bypass capacitor values, especially CB, depends on desired PSRR requirements, click and pop performance (as explained in SELECTING PROPER EXTERNAL COMPONENTS, system cost, and size constraints. MICRO-POWER SHUTDOWN The voltage applied to the SHUTDOWN pin controls the LM4863's shutdown function. Activate micro-power shutdown by applying VDD to the SHUTDOWN pin. When active, the LM4863's micro-power shutdown feature turns off the amplifier's bias circuitry, reducing the supply current. The logic threshold is typically VDD/2. The low 0.7A typical shutdown current is achieved by applying a voltage that is as near as VDD as possible to the SHUTDOWN pin. A voltage thrat is less than VDD may increase the shutdown current. There are a few ways to control the micro-power shutdown. These include using a single-pole, single-throw switch, a microprocessor, or a microcontroller. When using a switch, connect an external 10k pull-up resistor between the SHUTDOWN pin and VDD. Connect the switch between the SHUTDOWN pin and ground. Select normal amplifier operation by closing the switch. Opening the switch connects the SHUTDOWN pin to VDD through the pull-up resistor, activating micro-power shutdown. The switch and resistor ensure that the SHUTDOWN pin will not float. This prevents unwanted state changes. In a system with a microprocessor or a microcontroller, use a digital output to apply the control voltage to the SHUTDOWN pin. Driving the SHUTDOWN pin with active circuitry eliminates the pull up resistor. Table 1. Logic level truth table for SHUTDOWN and HP-IN Operation SHUTDOWN HP-IN PIN OPERATIONAL MODE Low logic Low Bridged amplifiers Low logic High Single-Ended amplifiers High logic Low Micro-power Shutdown High logic High Micro-power Shutdown HP-IN FUNCTION Applying a voltage between 4V and VDD to the LM4863's HP-IN headphone control pin turns off Amp2A and Amp2B, muting a bridged-connected load. Quiescent current consumption is reduced when the IC is in this single-ended mode. Figure 40 shows the implementation of the LM4863's headphone control function. With no headphones connected to the headphone jack, the R1-R2 voltage divider sets the voltage applied to the HP-IN pin (pin 16) at approximately 50mV. This 50mV enables Amp1B and Amp2B, placing the LM4863's in bridged mode operation. The output coupling capacitor blocks the amplifier's half-supply DC voltage, protecting the headphones. While the LM4863 operates in bridged mode, the DC potential across the load is essentially 0V. The HP-IN threshold is set at 4V. Therefore, even in an ideal situation, the output swing cannot cause a false single-ended trigger. Connecting headphones to the headphone jack disconnects the headphone jack contact pin from -OUTA and allows R1 to pull the HP Sense pin up to VDD. This enables the headphone function, turns off Amp2A and Amp2B, and mutes the bridged speaker. The amplifier then drives the headphones, whose impedance is in parallel with resistor R2 and R3. These resistors have negligible effect on the LM4863's output drive capability since the typical impedance of headphones is 32. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 17 LM4863 SNAS114F - OCTOBER 1999 - REVISED MAY 2013 www.ti.com Figure 40. Headphone Circuit Figure 40 also shows the suggested headphone jack electrical connections. The jack is designed to mate with a three-wire plug. The plug's tip and ring should each carry one of the two stereo output signals, whereas the sleeve should carry the ground return. A headphone jack with one control pin contact is sufficient to drive the HPIN pin when connecting headphones. A microprocessor or a switch can replace the headphone jack contact pin. When a microprocessor or switch applies a voltage greater than 4V to the HP-IN pin, a bridge-connected speaker is muted and Amp1A and Amp2A drive a pair of headphones. SELECTING PROPER EXTERNAL COMPONENTS Optimizing the LM4863's performance requires properly selecting external components. Though the LM4863 operates well when using external components with wide tolerances, best performance is achieved by optimizing component values. The LM4863 is unity-gain stable, giving a designer maximum design flexibility. The gain should be set to no more than a given application requires. This allows the amplifier to achieve minimum THD+N and maximum signal-tonoise ratio. These parameters are compromised as the closed-loop gain increases. However, low gain demands input signals with greater voltage swings to achieve maximum output power. Fortunately, many signal sources such as audio CODECs have outputs of 1VRMS (2.83VP-P). Please refer to AUDIO POWER AMPLIFIER DESIGN for more information on selecting the proper gain. Input Capacitor Value Selection Amplifying the lowest audio frequencies requires high value input coupling capacitor (Ci in Figure 39). A high value capacitor can be expensive and may compromise space efficiency in portable designs. In many cases, however, the speakers used in portable systems, whether internal or external, have little ability to reproduce signals below 150Hz. Applications using speakers with this limited frequency response reap little improvement by using large input capacitor. Besides effecting system cost and size, Ci has an affect on the LM4863's click and pop performance. When the supply voltage is first applied, a transient (pop) is created as the charge on the input capacitor changes from zero to a quiescent state. The magnitude of the pop is directly proportional to the input capacitor's size. Higher value capacitors need more time to reach a quiescent DC voltage (usually VDD/2) when charged with a fixed current. The amplifier's output charges the input capacitor through the feedback resistor, Rf. Thus, pops can be minimized by selecting an input capacitor value that is no higher than necessary to meet the desired -3dB frequency. A shown in Figure 39, the input resistor (RI) and the input capacitor, CI produce a -3dB high pass filter cutoff frequency that is found using Equation 7. 18 Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 LM4863 www.ti.com SNAS114F - OCTOBER 1999 - REVISED MAY 2013 (7) As an example when using a speaker with a low frequency limit of 150Hz, CI, using Equation 4, is 0.063F. The 1.0F CI shown in Figure 39 allows the LM4863 to drive high efficiency, full range speaker whose response extends below 30Hz. Bypass Capacitor Value Selection Besides minimizing the input capacitor size, careful consideration should be paid to value of CB, the capacitor connected to the BYPASS pin. Since CB determines how fast the LM4863 settles to quiescent operation, its value is critical when minimizing turn-on pops. The slower the LM4863's outputs ramp to their quiescent DC voltage (nominally 1/2 VDD), the smaller the turn-on pop. Choosing CB equal to 1.0F along with a small value of Ci (in the range of 0.1F to 0.39F), produces a click-less and pop-less shutdown function. As discussed above, choosing Ci no larger than necessary for the desired bandwidth helps minimize clicks and pops. OPTIMIZING CLICK AND POP REDUCTION PERFORMANCE The LM4863 contains circuitry to minimize turn-on and shutdown transients or "clicks and pop". For this discussion, turn-on refers to either applying the power supply voltage or when the shutdown mode is deactivated. While the power supply is ramping to its final value, the LM4863's internal amplifiers are configured as unity gain buffers. An internal current source changes the voltage of the BYPASS pin in a controlled, linear manner. Ideally, the input and outputs track the voltage applied to the BYPASS pin. The gain of the internal amplifiers remains unity until the voltage on the bypass pin reaches 1/2 VDD. As soon as the voltage on the BYPASS pin is stable, the device becomes fully operational. Although the bypass pin current cannot be modified, changing the size of CB alters the device's turn-on time and the magnitude of "clicks and pops". Increasing the value of CB reduces the magnitude of turn-on pops. However, this presents a tradeoff: as the size of CB increases, the turn-on time increases. There is a linear relationship between the size of CB and the turn-on time. Here are some typical turnon times for various values of CB: CB TON 0.01F 20 ms 0.1F 200 ms 0.22F 440 ms 0.47F 940 ms 1.0F 2 Sec In order eliminate "clicks and pops", all capacitors must be discharged before turn-on. Rapidly switching VDD may not allow the capacitors to fully discharge, which may cause "clicks and pops". In a single-ended configuration, the output is coupled to the load by COUT. This capacitor usually has a high value. COUT discharges through internal 20k resistors. Depending on the size of COUT, the discharge time constant can be relatively large. To reduce transients in single-ended mode, an external 1k - 5k resistor can be placed in parallel with the internal 20k resistor. The tradeoff for using this resistor is increased quiescent current. NO LOAD STABILITY The LM4863 may exhibit low level oscillation when the load resistance is greater than 10k. This oscillation only occurs as the output signal swings near the supply voltages. Prevent this oscillation by connecting a 5k between the output pins and ground. AUDIO POWER AMPLIFIER DESIGN Audio Amplifier Design: Driving 1W into an 8 Load The following are the desired operational parameters: Power Output: 1Wrms Load Impedance: 8 Input Level: 1Vrms Input Impedance: 20k Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 19 LM4863 SNAS114F - OCTOBER 1999 - REVISED MAY 2013 www.ti.com Bandwidth: 100Hz-20 kHz 0.25 dB The design begins by specifying the minimum supply voltage necessary to obtain the specified output power. One way to find the minimum supply voltage is to use Figure 24, Figure 25, and Figure 26 in Typical Performance Characteristics. Another way, usingEquation 4, is to calculate the peak output voltage necessary to achieve the desired output power for a given load impedance. To account for the amplifier's dropout voltage, two additional voltages, based on Figure 30 in Typical Performance Characteristics, must be added to the result obtained by Equation 8. The result in Equation 8. (8) (9) VDD (VOUTPEAK + (VODTOP + VODBOT)) Figure 24 for an 8 load indicates a minimum supply voltage of 4.6V. This is easily met by the commonly used 5V supply voltage. The additional voltage creates the benefit of headroom, allowing the LM4863 to produce peak output power in excess of 1W without clipping or other audible distortion. The choice of supply voltage must also not create a situation that violates maximum power dissipation as explained above in POWER DISSIPATION. After satisfying the LM4863's power dissipation requirements, the minimum differential gain is found using Equation 10. (10) Thus, a minimum gain of 2.83 allows the LM4863's to reach full output swing and maintain low noise and THD+N performance. For this example, let AVD = 3. The amplifier's overall gain is set using the input (Ri) and feedback (Rf) resistors. With the desired input impedance set at 20k, the feedback resistor is found using Equation 11. Rf/Ri = AVD/2 (11) The value of Rf is 30k. The last step in this design example is setting the amplifier's -3dB frequency bandwidth. To achieve the desired 0.25dB pass band magnitude variation limit, the low frequency response must extend to at least one-fifth the lower bandwidth limit and the high frequency response must extend to at least five times the upper bandwidth limit. The gain variation for both response limits is 0.17dB, well within the 0.25dB desired limit. The results are an fL = 100Hz/5 = 20Hz (12) and an FH = 20kHzx5 = 100kHz (13) As mentioned in SELECTING PROPER EXTERNAL COMPONENTS, Ri and Ci create a highpass filter that sets the amplifier's lower bandpass frequency limit. Find the coupling capacitor's value usingEquation 14. (14) the result is 1/(2*20k*20Hz) = 0.398F (15) Use a 0.39F capacitor, the closest standard value. The product of the desired high frequency cutoff (100kHz in this example) and the differential gain, AVD, determines the upper passband response limit. With AVD = 3 and fH = 100kHz, the closed-loop gain bandwidth product (GBWP) is 300kHz. This is less than the LM4863's 3.5MHz GBWP. With this margin, the amplifier can be used in designs that require more differential gain while avoiding performance-restricting bandwidth limitations. RECOMMENDED PRINTED CIRCUIT BOARD LAYOUT Figure 41 through Figure 44 show the recommended two-layer PC board layout that is optimized for the 20-pin PWP-packaged LM4863 and associated external components. Figures 7 through 11 show the recommended four-layer PC board layout that is optimized for the 24-pin NHW-packaged LM4863 and associated external components. These circuits are designed for use with an external 5V supply and 4 speakers. 20 Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 LM4863 www.ti.com SNAS114F - OCTOBER 1999 - REVISED MAY 2013 These circuit boards are easy to use. Apply 5V and ground to the board's VDD and GND pads, respectively. Connect 4 speakers between the board's -OUTA and +OUTA and OUTB and +OUTB pads. Figure 41. PWP PC board layout: all layers superimposed Figure 44. Recommended PWP PC board layout: bottom-side layout Figure 42. PWP PC board layout: Component-side Silkscreen Figure 45. Recommended NHW PC board layout: Component-side Silkscreen Figure 43. Recommended PWP PC board layout: Component-side layout Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 21 LM4863 SNAS114F - OCTOBER 1999 - REVISED MAY 2013 www.ti.com Figure 46. Recommended NHW PC board layout: Component-side layout Figure 47. Recommended NHW PC board layout: upper inner-layer layout 22 Figure 48. Recommended NHW PC board layout: lower inner-layer layout Figure 49. Recommended NHW PC board layout: bottom-side layout Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 LM4863 www.ti.com SNAS114F - OCTOBER 1999 - REVISED MAY 2013 REVISION HISTORY Rev Date Description 1.1 10/30/06 Removed all references to the 16-lead plastic-PDIP package. F 5/2/2013 Changed layout of National Data Sheet to TI format Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LM4863 23 PACKAGE OPTION ADDENDUM www.ti.com 2-May-2013 PACKAGING INFORMATION Orderable Device Status (1) LM4863LQ/NOPB ACTIVE Package Type Package Pins Package Drawing Qty WQFN NHW 24 1000 Eco Plan Lead/Ball Finish (2) Green (RoHS & no Sb/Br) MSL Peak Temp Op Temp (C) Top-Side Markings (3) CU SN Level-3-260C-168 HR (4) -40 to 85 L4863 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 1 Samples PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device LM4863LQ/NOPB Package Package Pins Type Drawing WQFN NHW 24 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 1000 178.0 12.4 Pack Materials-Page 1 4.3 B0 (mm) K0 (mm) P1 (mm) 5.3 1.3 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM4863LQ/NOPB WQFN NHW 24 1000 213.0 191.0 55.0 Pack Materials-Page 2 MECHANICAL DATA NHW0024B LQA24A (Rev B) www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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