1. General description
The 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible
with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A.
The 74HC4053; 74HCT4053 is triple 2-channel analog multiplexer/demultiplexer with a
common enable input (E). Each multiplexer/demultiplexer has two independent
inputs/outputs (nY0 and nY1), a common input/output (nZ) and three digital select
inputs (Sn).
With E LOW, one of the two switches is selected (low-impedance ON-state) by S1 to S3.
With E HIGH, all switches are in the high-impedance OFF-state, independent of S1 to S3.
VCC and GND are the supply voltage pins for the digital control inputs (S1 to S3 and E).
The VCC to GND ranges are 2.0 V to 10.0 V for 74HC4053 and 4.5 V to 5.5 V for
74HCT4053. The analog inputs/outputs (nY0 and nY1, and nZ) can swing between VCC
as a positive limit and VEE as a negative limit. VCC VEE may not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically
ground).
2. Features
Low ON resistance:
80 (typical) at VCC VEE = 4.5 V
70 (typical) at VCC VEE = 6.0 V
60 (typical) at VCC VEE = 9.0 V
Logic level translation:
To enable 5 V logic to communicate with ±5 V analog signals
Typical ‘break before make’ built in
Complies with JEDEC standard no. 7A
ESD protection:
HBM EIA/JESD22-A114-C exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 °Cto+85°C and from 40 °C to +125 °C
74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
Rev. 04 — 9 May 2006 Product data sheet
74HC_HCT4053_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 04 — 9 May 2006 2 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
3. Applications
Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating
4. Quick reference data
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD=C
PD × VCC2× fi + {(CL + CS)× VCC2× fo} where:
fi= input frequency in MHz;
fo= output frequency in MHz;
{(CL + CS)× VCC2× fo} = sum of outputs;
Table 1: Quick reference data
V
EE
= GND = 0 V; T
amb
=25
°
C; t
r
=t
f
= 6 ns.
Symbol Parameter Conditions Min Typ Max Unit
74HC4053
tPZH,
tPZL
turn-ON time CL= 15 pF; RL=1k;
VCC =5 V
E to Vos -17-ns
Sn to Vos -21-ns
tPHZ,
tPLZ
turn-OFF time CL= 15 pF; RL=1k;
VCC =5 V
E to Vos -18-ns
Sn to Vos -17-ns
Ciinput capacitance - 3.5 - pF
CSswitch capacitance
independent I/O (nYn) - 5 - pF
common I/O (nZ) - 8 - pF
CPD power dissipation
capacitance per switch; VI= GND to
VCC
[1] -36-pF
74HCT4053
tPZH,
tPZL
turn-ON time CL= 15 pF; RL=1k;
VCC =5 V
E to Vos -23-ns
Sn to Vos -21-ns
tPHZ,
tPLZ
turn-OFF time CL= 15 pF; RL=1k;
VCC =5 V
E to Vos -20-ns
Sn to Vos -19-ns
Ciinput capacitance - 3.5 - pF
CSswitch capacitance
independent I/O (nYn) - 5 - pF
common I/O(nZ) - 8 - pF
CPD power dissipation
capacitance per switch; VI= GND to
(VCC 1.5 V) [1] -36-pF
74HC_HCT4053_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 04 — 9 May 2006 3 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
CL= output load capacitance in pF;
CS= maximum switch capacitance in pF;
VCC = supply voltage in V.
5. Ordering information
Table 2: Ordering information
Type number Package
Temperature range Name Description Version
74HC4053
74HC4053N 40 °C to +125 °C DIP16 plastic dual in-line package; 16 leads (300 mil); long
body SOT38-4
74HC4053D 40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width
3.9 mm SOT109-1
74HC4053DB 40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads; body
width 5.3 mm SOT338-1
74HC4053PW 40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm SOT403-1
74HC4053BQ 40 °C to +125 °C DHVQFN16 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 16 terminals;
body 2.5 ×3.5 ×0.85 mm
SOT763-1
74HCT4053
74HCT4053N 40 °C to +125 °C DIP16 plastic dual in-line package; 16 leads (300 mil); long
body SOT38-4
74HCT4053D 40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width
3.9 mm SOT109-1
74HCT4053DB 40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads; body
width 5.3 mm SOT338-1
74HCT4053PW 40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm SOT403-1
74HCT4053BQ 40 °C to +125 °C DHVQFN16 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 16 terminals;
body 2.5 ×3.5 ×0.85 mm
SOT763-1
74HC_HCT4053_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 04 — 9 May 2006 4 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
6. Functional diagram
Fig 1. Functional diagram
Fig 2. Logic symbol Fig 3. IEC logic symbol
001aae124
LOGIC
LEVEL
CONVERSION
11
16
VCC
13 1Y1
S1 DECODER 12 1Y0
14 1Z
1 2Y1
2 2Y0
15 2Z
3 3Y1
5 3Y0
43Z
10S2
9
87
GND VEE
S3
6
E
001aae125
1Y0 12
1Y1
S1
13
11
S210
S39
6E
2Y0 2
2Y1 1
3Y0 5
3Y1 3
3Z 4
2Z 15
1Z 14
001aae126
6EN
11 #
#
#
MUX/DMUX 12
13
× 0
1
0/1
0
1
14
10 2
1
15
9 5
3
4
74HC_HCT4053_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 04 — 9 May 2006 5 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
7. Pinning information
7.1 Pinning
Fig 4. Schematic diagram (one switch)
001aad544
from
logic
VCC
VEE
VEE
VCC
VCC
VEE
Y
Z
VCC
(1) The die substrate is attached to this
pad using conductive die attach
material. It can not be used as supply
pin or input.
Fig 5. Pin configuration DIP16, SO16 and
(T)SSOP16 Fig 6. Pin configuration DHVQFN16
74HC4053
74HCT4053
2Y1 VCC
2Y0 2Z
3Y1 1Z
3Z 1Y1
3Y0 1Y0
ES1
VEE S2
GND S3
001aae127
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
001aae128
VEE S2
ES1
3Y0 1Y0
3Z 1Y1
3Y1 1Z
2Y0 2Z
GND
S3
2Y1
VCC
Transparent top view
7 10
6 11
5 12
4 13
3 14
2 15
8
9
1
16
terminal 1
index area
GND(1)
74HC4053
74HCT4053
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Product data sheet Rev. 04 — 9 May 2006 6 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
7.2 Pin description
8. Functional description
8.1 Function table
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
9. Limiting values
Table 3: Pin description
Symbol Pin Description
2Y1 1 2 independent input/output 1
2Y0 2 2 independent input/output 0
3Y1 3 3 independent input/output 1
3Z 4 3 common input/output
3Y0 5 3 independent input/output 0
E 6 enable input (active LOW)
VEE 7 negative supply voltage
GND 8 ground (0 V)
S3 9 select input 3
S2 10 select input 2
S1 11 select input 1
1Y0 12 1 independent input/output 0
1Y1 13 1 independent input/output 1
1Z 14 1 common input/output
2Z 15 2 common input/output
VCC 16 supply voltage
Table 4: Function table[1]
Control Channel on
E Sn
L L nY0 to nZ
H nY1 to nZ
H X none
Table 5: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
V
EE
= GND (ground = 0 V).
[1]
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +11.0 V
IIK input clamping current VI<0.5 V or VI>V
CC + 0.5 V - ±20 mA
ISK switch clamping current VS<0.5 V or VS>V
CC + 0.5 V - ±20 mA
74HC_HCT4053_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 04 — 9 May 2006 7 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
[1] To avoid drawing VCC current out of terminals nZ, when switch current flows in terminals nYn, the voltage
drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminals nZ, no
VCC current will flow out of terminals nYn. In this case there is no limit for the voltage drop across the switch,
but the voltages at nYn and nZ may not exceed VCC or VEE.
[2] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 °C.
[3] For SO16 package: Ptot derates linearly with 8 mW/K above 70 °C.
[4] For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 °C.
[5] For DHVQFN16 packages: Ptot derates linearly with 4.5 mW/K above 60 °C.
10. Recommended operating conditions
ISswitch current 0.5 V < VS<V
CC + 0.5 V - ±25 mA
IEE negative supply current - 20 mA
ICC quiescent supply current - 50 mA
IGND ground current - 50 mA
Tstg storage temperature 65 +150 °C
Ptot total power dissipation Tamb =40 °C to + 125 °C
DIP16 package [2] - 750 mW
SO16 package [3] - 500 mW
SSOP16 package [4] - 500 mW
TSSOP16 package [4] - 500 mW
DHVQFN16 package [5] - 500 mW
PSpower dissipation per
switch - 100 mW
Table 5: Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
V
EE
= GND (ground = 0 V).
[1]
Symbol Parameter Conditions Min Max Unit
Table 6: Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
74HC4053
VCC supply voltage difference see Figure 7
VCC GND 2.0 5.0 10.0 V
VCC VEE 2.0 5.0 10.0 V
VIinput voltage GND - VCC V
VSswitch voltage VEE -V
CC V
Tamb ambient temperature 40 +25 +125 °C
tr, tfinput rise and fall times VCC = 2.0 V - 6.0 1000 ns
VCC = 4.5 V - 6.0 500 ns
VCC = 6.0 V - 6.0 400 ns
VCC = 10.0 V - 6.0 250 ns
74HCT4053
VCC supply voltage difference see Figure 7
VCC GND 4.5 5.0 5.5 V
VCC VEE 2.0 5.0 10.0 V
74HC_HCT4053_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 04 — 9 May 2006 8 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
11. Static characteristics
VIinput voltage GND - VCC V
VSswitch voltage VEE -V
CC V
Tamb ambient temperature 40 +25 +125 °C
tr, tfinput rise and fall times VCC = 4.5 V - 6.0 500 ns
Table 6: Recommended operating conditions
…continued
Symbol Parameter Conditions Min Typ Max Unit
a. Type 74HC4053 b. Type 74HCT4053
Fig 7. Guaranteed operating area as a function of the supply voltages
VCC VEE (V)
0108462
001aad545
4
6
2
8
10
0
operating area
VCC GND
(V)
VCC VEE (V)
0108462
001aad546
4
6
2
8
10
0
VCC GND
(V)
operating area
Table 7: RON resistance per switch 74HC4053 and 74HCT4053
For test circuit see Figure 8.
V
is
is the input voltage at a nYn or nZ terminal, whichever is assigned as an input.
V
os
is the output voltage at a nYn or nZ terminal, whichever is assigned as an output.
74HC4053 supply voltages: V
CC
GND or V
CC
V
EE
= 2.0 V, 4.5 V, 6.0 V and 9.0 V.
74HCT4053 supply voltages: V
CC
GND = 4.5 V or 5.5 V; V
CC
V
EE
= 2.0 V, 4.5 V, 6.0 V and 9.0 V.
Symbol Parameter Conditions Min Typ Max Unit
Tamb = 25 °C
RON(peak) ON resistance (peak) Vis = VCC to VEE; VI = VIH or VIL
VCC = 2.0 V; VEE = 0 V; IS = 100 µA[1] ---
VCC = 4.5 V; VEE = 0 V; IS = 1000 µA - 100 180
VCC = 6.0 V; VEE = 0 V; IS = 1000 µA - 90 160
VCC = 4.5 V; VEE = 4.5 V; IS = 1000 µA - 70 130
74HC_HCT4053_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 04 — 9 May 2006 9 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
RON(rail) ON resistance (rail) Vis = VEE; VI = VIH or VIL
VCC = 2.0 V; VEE = 0 V; IS = 100 µA[1] - 150 -
VCC = 4.5 V; VEE = 0 V; IS = 1000 µA - 80 140
VCC = 6.0 V; VEE = 0 V; IS = 1000 µA - 70 120
VCC = 4.5 V; VEE = 4.5 V; IS = 1000 µA - 60 105
Vis = VCC; VI = VIH or VIL
VCC = 2.0 V; VEE = 0 V; IS = 100 µA[1] - 150 -
VCC = 4.5 V; VEE = 0 V; IS = 1000 µA - 90 160
VCC = 6.0 V; VEE = 0 V; IS = 1000 µA - 80 140
VCC = 4.5 V; VEE = 4.5 V; IS = 1000 µA - 65 120
RON ON resistance
mismatch between
channels
Vis = VCC to VEE; VI = VIH or VIL
VCC = 2.0 V; VEE = 0 V [1] ---
VCC = 4.5 V; VEE = 0 V - 9 -
VCC = 6.0 V; VEE = 0 V - 8 -
VCC = 4.5 V; VEE = 4.5 V - 6 -
Tamb = 40 °C to +85 °C
RON(peak) ON resistance (peak) Vis = VCC to VEE; VI = VIH or VIL
VCC = 2.0 V; VEE = 0 V; IS = 100 µA[1] ---
VCC = 4.5 V; VEE = 0 V; IS = 1000 µA - - 225
VCC = 6.0 V; VEE = 0 V; IS = 1000 µA - - 200
VCC = 4.5 V; VEE = 4.5 V; IS = 1000 µA - - 165
RON(rail) ON resistance (rail) Vis = VEE; VI = VIH or VIL
VCC = 2.0 V; VEE = 0 V; IS = 100 µA[1] ---
VCC = 4.5 V; VEE = 0 V; IS = 1000 µA - - 175
VCC = 6.0 V; VEE = 0 V; IS = 1000 µA - - 150
VCC = 4.5 V; VEE = 4.5 V; IS = 1000 µA - - 130
Vis = VCC; VI = VIH or VIL
VCC = 2.0 V; VEE = 0 V; IS = 100 µA[1] ---
VCC = 4.5 V; VEE = 0 V; IS = 1000 µA - - 200
VCC = 6.0 V; VEE = 0 V; IS= 1000 µA - - 175
VCC = 4.5 V; VEE = 4.5 V; IS = 1000 µA - - 150
Tamb = 40 °C to +125 °C
RON(peak) ON resistance (peak) Vis = VCC to VEE; VI = VIH or VIL
VCC = 2.0 V; VEE = 0 V; IS = 100 µA[1] ---
VCC = 4.5 V; VEE = 0 V; IS = 1000 µA - - 270
VCC = 6.0 V; VEE = 0 V; IS = 1000 µA - - 240
VCC = 4.5 V; VEE = 4.5 V; IS = 1000 µA - - 195
Table 7: RON resistance per switch 74HC4053 and 74HCT4053
…continued
For test circuit see Figure 8.
V
is
is the input voltage at a nYn or nZ terminal, whichever is assigned as an input.
V
os
is the output voltage at a nYn or nZ terminal, whichever is assigned as an output.
74HC4053 supply voltages: V
CC
GND or V
CC
V
EE
= 2.0 V, 4.5 V, 6.0 V and 9.0 V.
74HCT4053 supply voltages: V
CC
GND = 4.5 V or 5.5 V; V
CC
V
EE
= 2.0 V, 4.5 V, 6.0 V and 9.0 V.
Symbol Parameter Conditions Min Typ Max Unit
74HC_HCT4053_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 04 — 9 May 2006 10 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
[1] At supply voltages (VCC VEE) approaching 2.0 V the analog switch ON resistance becomes extremely non-linear. Therefore, it is
recommended that these devices be used to transmit digital signals only, when using these supply voltages.
RON(rail) ON resistance (rail) Vis = VEE; VI = VIH or VIL
VCC = 2.0 V; VEE = 0 V; IS = 100 µA[1] ---
VCC = 4.5 V; VEE = 0 V; IS = 1000 µA - - 210
VCC = 6.0 V; VEE = 0 V; IS = 1000 µA - - 180
VCC = 4.5 V; VEE = 4.5 V; IS = 1000 µA - - 160
Vis = VCC; VI = VIH or VIL
VCC = 2.0 V; VEE = 0 V; IS = 100 µA[1] ---
VCC = 4.5 V; VEE = 0 V; IS = 1000 µA - - 240
VCC = 6.0 V; VEE = 0 V; IS = 1000 µA - - 210
VCC = 4.5 V; VEE = 4.5 V; IS = 1000 µA - - 180
Table 7: RON resistance per switch 74HC4053 and 74HCT4053
…continued
For test circuit see Figure 8.
V
is
is the input voltage at a nYn or nZ terminal, whichever is assigned as an input.
V
os
is the output voltage at a nYn or nZ terminal, whichever is assigned as an output.
74HC4053 supply voltages: V
CC
GND or V
CC
V
EE
= 2.0 V, 4.5 V, 6.0 V and 9.0 V.
74HCT4053 supply voltages: V
CC
GND = 4.5 V or 5.5 V; V
CC
V
EE
= 2.0 V, 4.5 V, 6.0 V and 9.0 V.
Symbol Parameter Conditions Min Typ Max Unit
RON =V
S / IS.V
is =0Vto(V
CC VEE).
(1) VCC = 4.5 V
(2) VCC =6V
(3) VCC =9V
Fig 8. Test circuit for measuring RON Fig 9. Typical RON as a function of input voltage Vis
001aae129
VS
nYn nZ
IS
Vis = 0 V to (VCC VEE)
HIGH
(from select input)
VEE
Vis (V)
0 9.07.23.6 5.41.8
mnb047
50
70
30
90
110
10
RON
()
(1)
(2)
(3)
74HC_HCT4053_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 04 — 9 May 2006 11 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
Table 8: Static characteristics 74HC4053
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
V
is
is the input voltage at a nYn or nZ terminal, whichever is assigned as an input.
V
os
is the output voltage at a nYn or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ Max Unit
Tamb = 25 °C
VIH HIGH-state input voltage VCC = 2.0 V 1.5 1.2 - V
VCC = 4.5 V 3.15 2.4 - V
VCC = 6.0 V 4.2 3.2 - V
VCC = 9.0 V 6.3 4.7 - V
VIL LOW-state input voltage VCC = 2.0 V - 0.8 0.5 V
VCC = 4.5 V - 2.1 1.35 V
VCC = 6.0 V - 2.8 1.8 V
VCC = 9.0 V - 4.3 2.7 V
ILI input leakage current VI = VCC or GND; VEE = 0 V
VCC = 6.0 V - - ±0.1 µA
VCC = 10.0 V - - ±0.2 µA
IS(OFF) OFF-state leakage
current VCC = 10.0 V; VI = VIH or VIL; VEE =0V;
|VS| = VCC VEE; see Figure 10
per channel - - ±0.1 µA
all channels - - ±0.1 µA
IS(ON) ON-state leakage
current VCC = 10.0 V; VI = VIH or VIL; VEE =0V;
|VS| = VCC VEE; see Figure 11 --±0.1 µA
ICC quiescent supply current Vis = VEE or VCC; Vos = VCC or VEE;
VI=V
CC or GND; VEE = 0 V
VCC = 6.0 V - - 8.0 µA
VCC = 10.0 V - - 16.0 µA
Ciinput capacitance - 3.5 - pF
CSswitch capacitance
independent I/O (nYn) - 5 - pF
common I/O (nZ) - 8 - pF
Tamb = 40 °C to +85 °C
VIH HIGH-state input voltage VCC = 2.0 V 1.5 - - V
VCC = 4.5 V 3.15 - - V
VCC = 6.0 V 4.2 - - V
VCC = 9.0 V 6.3 - - V
VIL LOW-state input voltage VCC = 2.0 V - - 0.5 V
VCC = 4.5 V - - 1.35 V
VCC = 6.0 V - - 1.8 V
VCC = 9.0 V - - 2.7 V
ILI input leakage current VI = VCC or GND; VEE = 0 V
VCC = 6.0 V - - ±1.0 µA
VCC = 10.0 V - - ±2.0 µA
74HC_HCT4053_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 04 — 9 May 2006 12 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
IS(OFF) OFF-state leakage
current VCC = 10.0 V; VI = VIH or VIL; VEE =0V;
|VS| = VCC VEE; see Figure 10
per channel - - ±1.0 µA
all channels - - ±1.0 µA
IS(ON) ON-state leakage
current VCC = 10.0 V; VI = VIH or VIL; VEE =0V;
|VS| = VCC VEE; see Figure 11 --±1.0 µA
ICC quiescent supply current Vis = VEE or VCC; Vos = VCC or VEE;
VI=V
CC or GND; VEE = 0 V
VCC = 6.0 V - - 80.0 µA
VCC = 10.0 V - - 160.0 µA
Tamb = 40 °C to +125 °C
VIH HIGH-state input voltage VCC = 2.0 V 1.5 - - V
VCC = 4.5 V 3.15 - - V
VCC = 6.0 V 4.2 - - V
VCC = 9.0 V 6.3 - - V
VIL LOW-state input voltage VCC = 2.0 V - - 0.5 V
VCC = 4.5 V - - 1.35 V
VCC = 6.0 V - - 1.8 V
VCC = 9.0 V - - 2.7 V
ILI input leakage current VI = VCC or GND; VEE = 0 V
VCC = 6.0 V - - ±1.0 µA
VCC = 10.0 V - - ±2.0 µA
IS(OFF) OFF-state leakage
current VCC = 10.0 V; VI = VIH or VIL; VEE =0V;
|VS| = VCC VEE; see Figure 10
per channel - - ±1.0 µA
all channels - - ±1.0 µA
IS(ON) ON-state leakage
current VCC = 10.0 V; VI = VIH or VIL; VEE =0V;
|VS| = VCC VEE; see Figure 11 --±1.0 µA
ICC quiescent supply current Vis = VEE or VCC; Vos = VCC or VEE;
VI=V
CC or GND; VEE = 0 V
VCC = 6.0 V - - 160.0 µA
VCC = 10.0 V - - 320.0 µA
Table 8: Static characteristics 74HC4053
…continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
V
is
is the input voltage at a nYn or nZ terminal, whichever is assigned as an input.
V
os
is the output voltage at a nYn or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ Max Unit
Table 9: Static characteristics 74HCT4053
Voltages are referenced to GND (ground=0V).
V
is
is the input voltage at a nYn or nZ terminal, whichever is assigned as an input.
V
os
is the output voltage at a nYn or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ Max Unit
Tamb = 25 °C
VIH HIGH-state input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - µA
VIL LOW-state input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 µA
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Product data sheet Rev. 04 — 9 May 2006 13 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
ILI input leakage current VCC = 5.5 V; VEE = 0 V; VI = VCC or GND - - ±0.1 µA
IS(OFF) OFF-state leakage
current VCC = 10.0 V; VI = VIH or VIL; VEE =0V;
|VS| = VCC VEE; see Figure 10
per channel - - ±0.1 µA
all channels - - ±0.1 µA
IS(ON) ON-state leakage
current VCC = 10.0 V; VI = VIH or VIL; VEE =0V;
|VS| = VCC VEE; see Figure 11 --±0.1 µA
ICC quiescent supply current VI = VCC or GND; Vis = VEE or VCC;
Vos =V
CC or VEE
VCC = 5.5 V; VEE = 0 V - - 8.0 µA
VCC = 5.0 V; VEE = 5.0 V - - 16.0 µA
ICC additional quiescent
supply current per input pin; VCC = 4.5 V to 5.5 V;
VEE = 0 V; VI = VCC 2.1 V; other inputs
at VCC or GND
- 50 180 µA
Ciinput capacitance - 3.5 - pF
CSswitch capacitance
independent I/O (nYn) - 5 - pF
common I/O (nZ) - 8 - pF
Tamb = 40 °C to +85 °C
VIH HIGH-state input voltage VCC = 4.5 V to 5.5 V 2.0 - - µA
VIL LOW-state input voltage VCC = 4.5 V to 5.5 V - - 0.8 µA
ILI input leakage current VCC = 5.5 V; VEE = 0 V; VI = VCC or GND - - ±1.0 µA
IS(OFF) OFF-state leakage
current VCC = 10.0 V; VI = VIH or VIL; VEE =0V;
|VS| = VCC VEE; see Figure 10
per channel - - ±1.0 µA
all channels - - ±1.0 µA
IS(ON) ON-state leakage
current VCC = 10.0 V; VI = VIH or VIL; VEE =0V;
|VS| = VCC VEE; see Figure 11 --±1.0 µA
ICC quiescent supply current VI = VCC or GND; Vis = VEE or VCC;
Vos =V
CC or VEE
VCC = 5.5 V; VEE = 0 V - - 80.0 µA
VCC = 5.0 V; VEE = 5.0 V - - 160.0 µA
ICC additional quiescent
supply current per input pin; VCC = 4.5 V to 5.5 V;
VEE = 0 V; VI = VCC 2.1 V; other inputs
at VCC or GND
- - 225 µA
Tamb = 40 °C to +125 °C
VIH HIGH-state input voltage VCC = 4.5 V to 5.5 V 2.0 - - µA
VIL LOW-state input voltage VCC = 4.5 V to 5.5 V - - 0.8 µA
ILI input leakage current VCC = 5.5 V; VEE = 0 V; VI = VCC or GND - - ±1.0 µA
Table 9: Static characteristics 74HCT4053
…continued
Voltages are referenced to GND (ground=0V).
V
is
is the input voltage at a nYn or nZ terminal, whichever is assigned as an input.
V
os
is the output voltage at a nYn or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ Max Unit
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Product data sheet Rev. 04 — 9 May 2006 14 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
12. Dynamic characteristics
IS(OFF) OFF-state leakage
current VCC = 10.0 V; VI = VIH or VIL; VEE =0V;
|VS| = VCC VEE; see Figure 10
per channel - - ±1.0 µA
all channels - - ±1.0 µA
IS(ON) ON-state leakage
current VCC = 10.0 V; VI = VIH or VIL; VEE =0V;
|VS| = VCC VEE; see Figure 11 --±1.0 µA
ICC quiescent supply current VI = VCC or GND; Vis = VEE or VCC;
Vos =V
CC or VEE
VCC = 5.5 V; VEE = 0 V - - 160.0 µA
VCC = 5.0 V; VEE = 5.0 V - - 320.0 µA
ICC additional quiescent
supply current per input pin; VCC = 4.5 V to 5.5 V;
VEE = 0 V; VI = VCC 2.1 V; other inputs
at VCC or GND
- - 245 µA
Table 9: Static characteristics 74HCT4053
…continued
Voltages are referenced to GND (ground=0V).
V
is
is the input voltage at a nYn or nZ terminal, whichever is assigned as an input.
V
os
is the output voltage at a nYn or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ Max Unit
Fig 10. Test circuit for measuring OFF-state leakage
current Fig 11. Test circuit for measuring ON-state leakage
current
001aae130
AA
nYn
Sn
nZ
VI = VCC or VEE VO = VEE or VCC
LOW
(select input)
VEE
001aae131
A
VI = VEE or VCC VO (open circuit)
HIGH
(select input)
VEE
nYn
Sn
nZ
Table 10: Dynamic characteristics type 74HC4053
Voltages are referenced to GND (ground = 0 V); t
r
=t
f
= 6 ns; C
L
= 50 pF unless otherwise specified; for test circuit see
Figure 14.
V
is
is the input voltage at a nYn or nZ terminal, whichever is assigned as an input.
V
os
is the output voltage at a nYn or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ Max Unit
Tamb = 25 °C
tPHL,
tPLH
propagation delay Vis to Vos RL = ∞Ω; see Figure 12
VCC = 2.0 V; VEE = 0V - 1560ns
VCC = 4.5 V; VEE = 0 V - 5 12 ns
VCC = 6.0 V; VEE = 0 V - 4 10 ns
VCC = 4.5 V; VEE = 4.5 V - 4 8 ns
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Product data sheet Rev. 04 — 9 May 2006 15 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
tPZH,
tPZL
turn-ON time RL = 1 k; see Figure 13
E to Vos VCC = 2.0 V; VEE = 0 V - 60 220 ns
VCC = 4.5 V; VEE = 0V - 2044ns
VCC = 6.0 V; VEE = 0V - 1637ns
VCC = 4.5 V; VEE = 4.5 V - 15 31 ns
VCC = 5 V; VEE =0V; C
L=15pF - 17 - ns
Sn to Vos VCC = 2.0 V; VEE = 0 V - 75 220 ns
VCC = 4.5 V; VEE = 0V - 2544ns
VCC = 6.0 V; VEE = 0V - 2037ns
VCC = 4.5 V; VEE = 4.5 V - 15 31 ns
VCC = 5 V; VEE =0V; C
L=15pF - 21 - ns
tPHZ,
tPLZ
turn-OFF time RL = 1 k; see Figure 13
E to Vos VCC = 2.0 V; VEE = 0 V - 63 210 ns
VCC = 4.5 V; VEE = 0V - 2142ns
VCC = 6.0 V; VEE = 0V - 1736ns
VCC = 4.5 V; VEE = 4.5 V - 15 29 ns
VCC = 5 V; CL=15pF - 18 - ns
Sn to Vos VCC = 2.0 V; VEE = 0 V - 60 210 ns
VCC = 4.5 V; VEE = 0V - 2042ns
VCC = 6.0 V; VEE = 0V - 1636ns
VCC = 4.5 V; VEE = 4.5 V - 15 29 ns
VCC = 5 V; CL=15pF - 17 - ns
CPD power dissipation
capacitance per switch; VI= GND to VCC [1] -36-pF
Tamb = 40 °C to +85 °C
tPHL,
tPLH
propagation delay Vis to Vos RL = ∞Ω; see Figure 12
VCC = 2.0 V; VEE = 0 V - - 75 ns
VCC = 4.5 V; VEE = 0 V - - 15 ns
VCC = 6.0 V; VEE = 0 V - - 13 ns
VCC = 4.5 V; VEE = 4.5 V - - 10 ns
Table 10: Dynamic characteristics type 74HC4053
…continued
Voltages are referenced to GND (ground = 0 V); t
r
=t
f
= 6 ns; C
L
= 50 pF unless otherwise specified; for test circuit see
Figure 14.
V
is
is the input voltage at a nYn or nZ terminal, whichever is assigned as an input.
V
os
is the output voltage at a nYn or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ Max Unit
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Product data sheet Rev. 04 — 9 May 2006 16 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
tPZH,
tPZL
turn-ON time RL = 1 k; see Figure 13
E to Vos VCC = 2.0 V; VEE = 0 V - - 275 ns
VCC = 4.5 V; VEE = 0 V - - 55 ns
VCC = 6.0 V; VEE = 0 V - - 47 ns
VCC = 4.5 V; VEE = 4.5 V - - 39 ns
Sn to Vos VCC = 2.0 V; VEE = 0 V - - 275 ns
VCC = 4.5 V; VEE = 0 V - - 55 ns
VCC = 6.0 V; VEE = 0 V - - 47 ns
VCC = 4.5 V; VEE = 4.5 V - - 39 ns
tPHZ,
tPLZ
turn-OFF time RL = 1 k; see Figure 13
E to Vos VCC = 2.0 V; VEE = 0 V - - 265 ns
VCC = 4.5 V; VEE = 0 V - - 53 ns
VCC = 6.0 V; VEE = 0 V - - 45 ns
VCC = 4.5 V; VEE = 4.5 V - - 36 ns
Sn to Vos VCC = 2.0 V; VEE = 0 V - - 265 ns
VCC = 4.5 V; VEE = 0 V - - 53 ns
VCC = 6.0 V; VEE = 0 V - - 45 ns
VCC = 4.5 V; VEE = 4.5 V - - 36 ns
Tamb = 40 °C to +125 °C
tPHL,
tPLH
propagation delay Vis to Vos RL = ∞Ω; see Figure 12
VCC = 2.0 V; VEE = 0 V - - 90 ns
VCC = 4.5 V; VEE = 0 V - - 18 ns
VCC = 6.0 V; VEE = 0 V - - 15 ns
VCC = 4.5 V; VEE = 4.5 V - - 12 ns
tPZH,
tPZL
turn-ON time RL = 1 k; see Figure 13
E to Vos VCC = 2.0 V; VEE = 0 V - - 330 ns
VCC = 4.5 V; VEE = 0 V - - 66 ns
VCC = 6.0 V; VEE = 0 V - - 56 ns
VCC = 4.5 V; VEE = 4.5 V - - 47 ns
Sn to Vos VCC = 2.0 V; VEE = 0 V - - 330 ns
VCC = 4.5 V; VEE = 0 V - - 66 ns
VCC = 6.0 V; VEE = 0 V - - 56 ns
VCC = 4.5 V; VEE = 4.5 V - - 47 ns
Table 10: Dynamic characteristics type 74HC4053
…continued
Voltages are referenced to GND (ground = 0 V); t
r
=t
f
= 6 ns; C
L
= 50 pF unless otherwise specified; for test circuit see
Figure 14.
V
is
is the input voltage at a nYn or nZ terminal, whichever is assigned as an input.
V
os
is the output voltage at a nYn or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ Max Unit
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Product data sheet Rev. 04 — 9 May 2006 17 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
[1] CPD is used to determine the dynamic power dissipation (PD in µW):
PD=C
PD × VCC2× fi + {(CL + CS)× VCC2× fo} where:
fi= input frequency in MHz;
fo= output frequency in MHz;
{(CL + CS)× VCC2× fo} = sum of outputs;
CL= output load capacitance in pF;
CS= maximum switch capacitance in pF;
VCC = supply voltage in V.
tPHZ,
tPLZ
turn-OFF time RL = 1 k; see Figure 13
E to Vos VCC = 2.0 V; VEE = 0 V - - 315 ns
VCC = 4.5 V; VEE = 0 V - - 63 ns
VCC = 6.0 V; VEE = 0 V - - 54 ns
VCC = 4.5 V; VEE = 4.5 V - - 44 ns
Sn to Vos VCC = 2.0 V; VEE = 0 V - - 315 ns
VCC = 4.5 V; VEE = 0 V - - 63 ns
VCC = 6.0 V; VEE = 0 V - - 54 ns
VCC = 4.5 V; VEE = 4.5 V - - 44 ns
Table 10: Dynamic characteristics type 74HC4053
…continued
Voltages are referenced to GND (ground = 0 V); t
r
=t
f
= 6 ns; C
L
= 50 pF unless otherwise specified; for test circuit see
Figure 14.
V
is
is the input voltage at a nYn or nZ terminal, whichever is assigned as an input.
V
os
is the output voltage at a nYn or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ Max Unit
Table 11: Dynamic characteristics type 74HCT4053
Voltages are referenced to GND (ground = 0 V); t
r
=t
f
= 6 ns; C
L
= 50 pF unless otherwise specified; for test circuit see
Figure 14.
V
is
is the input voltage at a nYn or nZ terminal, whichever is assigned as an input.
V
os
is the output voltage at a nYn or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ Max Unit
Tamb = 25 °C
tPHL,
tPLH
propagation delay Vis to Vos VCC = 4.5 V; RL = ∞Ω; see Figure 12
VEE = 0 V - 5 12 ns
VEE = 4.5 V - 4 8 ns
tPZH,
tPZL
turn-ON time RL = 1 k; see Figure 13
E to Vos VCC = 4.5 V; VEE = 0V - 2748ns
VCC = 4.5 V; VEE = 4.5 V - 16 34 ns
VCC = 5 V; VEE =0V; C
L=15pF - 23 - ns
Sn to Vos VCC = 4.5 V; VEE = 0V - 2548ns
VCC = 4.5 V; VEE = 4.5 V - 16 34 ns
VCC = 5 V; VEE =0V; C
L=15pF - 21 - ns
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Product data sheet Rev. 04 — 9 May 2006 18 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
tPHZ,
tPLZ
turn-OFF time RL = 1 k; see Figure 13
E to Vos VCC = 4.5 V; VEE = 0V - 2444ns
VCC = 4.5 V; VEE = 4.5 V - 15 31 ns
VCC = 5 V; VEE =0V; C
L=15pF - 20 - ns
Sn to Vos VCC = 4.5 V; VEE = 0V - 2244ns
VCC = 4.5 V; VEE = 4.5 V - 15 31 ns
VCC = 5 V; VEE =0V; C
L=15pF - 19 - ns
CPD power dissipation
capacitance per switch; VI= GND to (VCC 1.5 V) [1] -36-pF
Tamb = 40 °C to +85 °C
tPHL,
tPLH
propagation delay Vis to Vos VCC = 4.5 V; RL = ∞Ω; see Figure 12
VEE = 0 V - - 15 ns
VEE = 4.5 V - - 10 ns
tPZH,
tPZL
turn-ON time VCC = 4.5 V; RL=1k; see Figure 13
E to Vos VEE = 0 V - - 60 ns
VEE = 4.5 V - - 43 ns
Sn to Vos VEE = 0 V - - 60 ns
VEE = 4.5 V - - 43 ns
tPHZ,
tPLZ
turn-OFF time VCC = 4.5 V; RL=1k; see Figure 13
E to Vos VEE = 0 V - - 55 ns
VEE = 4.5 V - - 39 ns
Sn to Vos VEE = 0 V - - 55 ns
VEE = 4.5 V - - 39 ns
Tamb = 40 °C to +125 °C
tPHL,
tPLH
propagation delay Vis to Vos VCC = 4.5 V; RL = ∞Ω; see Figure 12
VEE = 0 V - - 18 ns
VEE = 4.5 V - - 12 ns
tPZH,
tPZL
turn-ON time VCC = 4.5 V; RL=1k; see Figure 13
E to Vos VEE = 0 V - - 72 ns
VEE = 4.5 V - - 51 ns
Sn to Vos VEE = 0 V - - 72 ns
VEE = 4.5 V - - 51 ns
Table 11: Dynamic characteristics type 74HCT4053
…continued
Voltages are referenced to GND (ground = 0 V); t
r
=t
f
= 6 ns; C
L
= 50 pF unless otherwise specified; for test circuit see
Figure 14.
V
is
is the input voltage at a nYn or nZ terminal, whichever is assigned as an input.
V
os
is the output voltage at a nYn or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ Max Unit
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Product data sheet Rev. 04 — 9 May 2006 19 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
[1] CPD is used to determine the dynamic power dissipation (PD in µW):
PD=C
PD × VCC2× fi + {(CL + CS)× VCC2× fo} where:
fi= input frequency in MHz;
fo= output frequency in MHz;
{(CL + CS)× VCC2× fo} = sum of outputs;
CL= output load capacitance in pF;
CS= maximum switch capacitance in pF;
VCC = supply voltage in V.
13. Waveforms
tPHZ,
tPLZ
turn-OFF time VCC = 4.5 V; RL=1k; see Figure 13
E to Vos VEE = 0 V - - 66 ns
VEE = 4.5 V - - 47 ns
Sn to Vos VEE = 0 V - - 66 ns
VEE = 4.5 V - - 47 ns
Table 11: Dynamic characteristics type 74HCT4053
…continued
Voltages are referenced to GND (ground = 0 V); t
r
=t
f
= 6 ns; C
L
= 50 pF unless otherwise specified; for test circuit see
Figure 14.
V
is
is the input voltage at a nYn or nZ terminal, whichever is assigned as an input.
V
os
is the output voltage at a nYn or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ Max Unit
Fig 12. Propagation delay input (Vis) to output (Vos)
001aad555
tPLH tPHL
50 %
50 %
Vis input
Vos output
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Product data sheet Rev. 04 — 9 May 2006 20 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
(1) Measurement points are given in Table 12.
Fig 13. Turn-ON and turn-OFF times
Table 12: Measurement points
Type Input
VM
74HC4053 0.5VCC
74HCT4053 1.3 V
001aae330
tPLZ
tPHZ
switch OFF switch ON
switch ON
Vos output
Vos output
E, Sn inputs VM
VI
0 V
90 %
10 %
tPZL
tPZH
50 %
50 %
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Product data sheet Rev. 04 — 9 May 2006 21 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
[1] VI values:
a) For 74HC4053: VI=V
CC.
b) For 74HCT4053: VI=3V.
Test data is given in Table 13.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistor.
S1 = Test selection switch.
Fig 14. Load circuitry for switching times
Table 13: Test data
Test Input Load S1 position
VIVis tr, tfCLRL
at fmax other
tPHL, tPLH [1] pulse < 2 ns 6 ns 15 pF, 50 pF 1 kopen
tPZH, tPHZ [1] VCC < 2 ns 6 ns 15 pF, 50 pF 1 kVEE
tPZL, tPLZ [1] VEE < 2 ns 6 ns 15 pF, 50 pF 1 kVCC
VMVM
tW
tW
10 %
90 %
0 V
VI
VI
negative
pulse
positive
pulse
0 V
VMVM
90 %
10 %
tf
tr
tr
tf
001aae382
VCC VCC
open
GND
VEE
VIVos
DUT
CL
RT
RLS1
PULSE
GENERATOR
Vis
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Product data sheet Rev. 04 — 9 May 2006 22 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
14. Additional dynamic characteristics
[1] Adjust input voltage Vis to 0 dBm level (0 dBm = 1 mW into 600 ).
[2] Control input E or Sn, with square-wave between VCC and GND.
[3] Adjust input voltage Vis to 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 ).
Table 14: Additional dynamic characteristics 74HC4053 and 74HCT4053
GND = 0 V; T
amb
=25
°
C.
V
is
is the input voltage at an nYn or nZ terminal, whichever is assigned as an input.
V
os
is the output voltage at an nYn or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ Max Unit
dsin sine wave distortion RL= 10 k; CL= 50 pF; see Figure 15
fi= 1 kHz
VCC = 2.25 V; VEE =2.25 V; Vis = 4.0 V (p-p) - 0.04 - %
VCC = 4.5 V; VEE = 4.5 V; Vis = 8.0 V (p-p) - 0.02 - %
fi=10kHz
VCC = 2.25 V; VEE =2.25 V; Vis = 4.0 V (p-p) - 0.12 - %
VCC = 4.5 V; VEE = 4.5 V; Vis = 8.0 V (p-p) - 0.06 - %
α(OFF)(ft) OFF-state
feed-through
attenuation
RL= 600 ; CL= 50 pF; fi= 1 MHz; see
Figure 16 [1]
VCC = 2.25 V; VEE = 2.25 V - 50 - dB
VCC = 4.5 V; VEE = 4.5 V - 50 - dB
Vct(sw-sw) crosstalk between
switches RL= 600 ; CL= 50 pF; fi= 1 MHz; see
Figure 17 [1]
VCC = 2.25 V; VEE = 2.25 V - 60 - dB
VCC = 4.5 V; VEE = 4.5 V - 60 - dB
Vct(d-sw) crosstalk between
digital inputs and
switch
VCC = 4.5 V; RL= 600 k; CL= 50 pF;
fi= 1 MHz; see Figure 18 [2]
VEE = 0 V - 110 - mV
VEE = 4.5 V - 220 - mV
f(-3dB) 3 dB frequency
response RL=50; CL= 10 pF; see Figure 19 [3]
VCC = 2.25 V; VEE = 2.25 V - 160 - MHz
VCC = 4.5 V; VEE = 4.5 V - 170 - MHz
Fig 15. Test circuit for measuring sine wave distortion
001aae132
10 µF
RL
Vos
Vis
CLdB
nYn
or
nZ
nZ
or
nYn
GND
channel
ON
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Product data sheet Rev. 04 — 9 May 2006 23 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
a. Feed-through as function of the frequency
b. Test circuit
Fig 16. Typical switch OFF signal feed-through as a function of frequency
001aae332
fi (kHz)
10 105106
104
102103
60
40
80
20
0
α(OFF)(ft)
(dB)
100
001aae133
0.1 µF
RL
Vos
Vis
CLdB
GND
channel
OFF
nYn
or
nZ
nZ
or
nYn
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Product data sheet Rev. 04 — 9 May 2006 24 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
a. Switch ON
b. Switch OFF
Fig 17. Test circuits for measuring crosstalk between any two switches
Fig 18. Test circuit for measuring crosstalk between digital inputs and switch
001aae134
0.1 µFRL
RL
Vos
Vis
CLdB
nYn
or
nZ
nZ
or
nYn
GND
channel
ON
001aae259
RL
Vos
Vis
CLdB
GND
channel
OFF
RL
nYn
or
nZ
nZ
or
nYn
DUT
001aae135
2RL
2RL
2RL
2RLnZ
or nYn
nYn
or nZ
CLoscilloscope
VCC VCC
GND
VEE
Vct(d-sw)
Sn or E
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Product data sheet Rev. 04 — 9 May 2006 25 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
a. Typical frequency response
b. Test circuit
Fig 19. Typical frequency response
001aad551
f (kHz)
10 105106
104
102103
1
1
3
3
5
Vos
(dB)
5
001aae132
10 µF
RL
Vos
Vis
CLdB
nYn
or
nZ
nZ
or
nYn
GND
channel
ON
74HC_HCT4053_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 04 — 9 May 2006 26 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
15. Package outline
Fig 20. Package outline SOT38-4 (DIP16)
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT38-4 95-01-14
03-02-13
MH
c
(e )
1
ME
A
L
seating plane
A1
wM
b1
b2
e
D
A2
Z
16
1
9
8
E
pin 1 index
b
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
UNIT A
max. 12 b1(1) (1) (1)
b2cD E e M Z
H
L
mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
min. A
max. bmax.
w
ME
e1
1.73
1.30 0.53
0.38 0.36
0.23 19.50
18.55 6.48
6.20 3.60
3.05 0.2542.54 7.62 8.25
7.80 10.0
8.3 0.764.2 0.51 3.2
inches 0.068
0.051 0.021
0.015 0.014
0.009
1.25
0.85
0.049
0.033 0.77
0.73 0.26
0.24 0.14
0.12 0.010.1 0.3 0.32
0.31 0.39
0.33 0.030.17 0.02 0.13
DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4
74HC_HCT4053_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 04 — 9 May 2006 27 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
Fig 21. Package outline SOT109-1 (SO16)
X
wM
θ
A
A1
A2
bp
D
HE
Lp
Q
detail X
E
Z
e
c
L
vMA
(A )
3
A
8
9
1
16
y
pin 1 index
UNIT A
max. A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
1.75 0.25
0.10 1.45
1.25 0.25 0.49
0.36 0.25
0.19 10.0
9.8 4.0
3.8 1.27 6.2
5.8 0.7
0.6 0.7
0.3 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.0
0.4
SOT109-1 99-12-27
03-02-19
076E07 MS-012
0.069 0.010
0.004 0.057
0.049 0.01 0.019
0.014 0.0100
0.0075 0.39
0.38 0.16
0.15 0.05
1.05
0.041
0.244
0.228 0.028
0.020 0.028
0.012
0.01
0.25
0.01 0.004
0.039
0.016
0 2.5 5 mm
scale
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
74HC_HCT4053_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 04 — 9 May 2006 28 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
Fig 22. Package outline SOT338-1 (SSOP16)
UNIT A1A2A3bpcD
(1) E(1) eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.21
0.05 1.80
1.65 0.25 0.38
0.25 0.20
0.09 6.4
6.0 5.4
5.2 0.65 1.25
7.9
7.6 1.03
0.63 0.9
0.7 1.00
0.55 8
0
o
o
0.130.2 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT338-1 99-12-27
03-02-19
(1)
wM
bp
D
HE
E
Z
e
c
vMA
X
A
y
18
16 9
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
MO-150
pin 1 index
0 2.5 5 mm
scale
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1
A
max.
2
74HC_HCT4053_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 04 — 9 May 2006 29 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
Fig 23. Package outline SOT403-1 (TSSOP16)
UNIT A1A2A3bpcD
(1) E(2) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05 0.95
0.80 0.30
0.19 0.2
0.1 5.1
4.9 4.5
4.3 0.65 6.6
6.2 0.4
0.3 0.40
0.06 8
0
o
o
0.13 0.10.21
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT403-1 MO-153 99-12-27
03-02-18
wM
bp
D
Z
e
0.25
18
16 9
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
HE
E
c
vMA
X
A
y
0 2.5 5 mm
scale
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1
A
max.
1.1
pin 1 index
74HC_HCT4053_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 04 — 9 May 2006 30 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
Fig 24. Package outline SOT763-1 (DHVQFN16)
terminal 1
index area
0.51
A1Eh
b
UNIT ye
0.2
c
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 3.6
3.4
Dh
2.15
1.85
y1
2.6
2.4 1.15
0.85
e1
2.5
0.30
0.18
0.05
0.00 0.05 0.1
DIMENSIONS (mm are the original dimensions)
SOT763-1 MO-241 - - -- - -
0.5
0.3
L
0.1
v
0.05
w
0 2.5 5 mm
scale
SOT763-1
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
16 terminals; body 2.5 x 3.5 x 0.85 mm
A(1)
max.
AA1c
detail X
y
y1C
e
L
Eh
Dh
e
e1
b
27
15 10
9
8
1
16
X
D
E
C
BA
terminal 1
index area
AC
CB
vM
wM
E(1)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
D(1)
02-10-17
03-01-27
74HC_HCT4053_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 04 — 9 May 2006 31 of 33
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
16. Abbreviations
17. Revision history
Table 15: Abbreviations
Acronym Description
CMOS Complementary Metal Oxide Semiconductor
HBM Human Body Model
ESD ElectroStatic Discharge
MM Machine Model
DUT Device Under Test
Table 16: Revision history
Document ID Release date Data sheet status Change notice Doc. number Supersedes
74HC_HCT4053_4 20060509 Product data sheet - - 74HC_HCT4053_3
Modifications: Section 5 “Ordering information”: errors corrected, type numbers in wrong order and
SOT38-4 is the package for types 74HC4053N and 74HCT4053N
74HC_HCT4053_3 20060315 Product data sheet - - 74HC_HCT4053_
CNV_2
Modifications: The format of this data sheet has been redesigned to comply with the new presentation
and information standard of Philips Semiconductors.
Added type numbers 74HC4053BQ and 74HCT4053BQ (DHVQFN16) package to
Section 5 “Ordering information”,Section 7 “Pinning information” and Section 15 “Package
outline”
74HC_HCT4053_CNV_2 19901201 Product specification - - -
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
74HC_HCT4053_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 04 — 9 May 2006 32 of 33
18. Data sheet status
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
19. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
makes no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
20. Disclaimers
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
21. Trademarks
Notice — All referenced brands, product names, service names and
trademarks are the property of their respective owners.
22. Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
Level Data sheet status[1] Product status[2] [3] Definition
I Objective data Development This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
© Koninklijke Philips Electronics N.V. 2006
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner. The information presented in this document does
not form part of any quotation or contract, is believed to be accurate and reliable and may
be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights. Date of release: 9 May 2006
Document number: 74HC_HCT4053_4
Published in The Netherlands
Philips Semiconductors 74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
23. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
5 Ordering information. . . . . . . . . . . . . . . . . . . . . 3
6 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 4
7 Pinning information. . . . . . . . . . . . . . . . . . . . . . 5
7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6
8 Functional description . . . . . . . . . . . . . . . . . . . 6
8.1 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 6
9 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6
10 Recommended operating conditions. . . . . . . . 7
11 Static characteristics. . . . . . . . . . . . . . . . . . . . . 8
12 Dynamic characteristics . . . . . . . . . . . . . . . . . 14
13 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
14 Additional dynamic characteristics . . . . . . . . 22
15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 26
16 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 31
17 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 31
18 Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 32
19 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
20 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
21 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
22 Contact information . . . . . . . . . . . . . . . . . . . . 32