PTH08000W www.ti.com SLTS248B - JUNE 2005 - REVISED FEBRUARY 2008 2.25-A, WIDE INPUT, ADJUSTABLE SWITCHING REGULATOR WITH AUTO-TRACKTM SEQUENCING * FEATURES 1 * Up to 2.25-A Output Current at 85C * 4.5-V to 14-V Input Voltage Range * Wide-Output Voltage Adjust (0.9 V to 5.5 V) * Efficiencies Up to 94% * On/Off Inhibit * Undervoltage Lockout (UVLO) * Output Overcurrent Protection (Nonlatching, Auto-Reset) * Overtemperature Protection * Ambient Temperature Range: -40C to 85C * Surface-Mount Package 2 Safety Agency Approvals: UL/CUL 60950, EN60950 APPLICATIONS * Telecommunications, Instrumentation, and General-Purpose Circuits DESCRIPTION The PTH08000W is a highly integrated, low-cost switching regulator module that delivers up to 2.25 A of output current. The PTH08000W sources output current at a much higher efficiency than a TO-220 linear regulator IC, eliminating the need for a heatsink. The small size (0.75 inch x 0.5 inch) and flexible operation creates value for a variety of applications. The input voltage range of the PTH08000W is 4.5 V to 14 V, allowing operation from either a 5-V or 12-V input bus. Using state-of-the-art switched-mode power-conversion technology, the PTH08000W can step down to voltages as low as 0.9 V from a 5-V input bus, with less than 1 W of power dissipation. The output voltage can be adjusted to any voltage over the range, 0.9 V to 5.5 V, using a single external resistor. This series includes Auto-TrackTM sequencing. This feature simplifies the task of supply voltage sequencing in a power system by enabling modules to track each other, or any external voltage, during power up and power down. Operating features include an undervoltage lockout (UVLO), on/off inhibit, overcurrent protection, and overtemperature protection. Target applications include telecommunications, test and measurement applications, and high-end consumer products. This product is available in both through-hole and surface-mount package options, including tape and reel. The PTH08000W is compatible with TI's roadmap for RoHS and lead-free compliance. STANDARD APPLICATION 1 Track VO 6 2 VI Inhibit 3 CI* + 100 F (Required) PTH08000W (Top View) 4 5 + CO* 100 F (Optional) RSET# 1%, 0.05 W (Required) GND GND * See the Application Information section for capacitor recommendations. # See the Application Information section for RSET values. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Auto-Track, POLA, TMS320 are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2005-2008, Texas Instruments Incorporated PTH08000W www.ti.com SLTS248B - JUNE 2005 - REVISED FEBRUARY 2008 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see the TI website at www.ti.com. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted (1) TA Tstg (1) (2) PTH08000W UNIT -40 to 85 C Operating free-air temperature Over VI range Lead temperature (H suffix) 5 seconds 260 Solder reflow temperature (S suffix) Surface temperature of module body or pins 235 Solder reflow temperature (Z suffix) (2) Surface temperature of module body or pins 260 Storage temperature C C -55 to 125 Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability Moisture Sensitivity Level (MSL) Rating Level-3-260C-168HR RECOMMENDED OPERATING CONDITIONS MIN MAX VI Input voltage 4.5 14 UNIT V TA Operating free-air temperature -40 85 C PACKAGE SPECIFICATIONS PTH08000W (Suffix AH, AS, and AZ) Weight Flammability Mechanical shock Mechanical vibration (1) 2 1.5 grams Meets UL 94 V-O Per Mil-STD-883D, Method 2002.3, 1 ms, sine, mounted 500 G Mil-STD-883D, Method 2007.2, 20-2000 Hz 20 G (1) (1) Qualification limit. Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s) :PTH08000W PTH08000W www.ti.com SLTS248B - JUNE 2005 - REVISED FEBRUARY 2008 ELECTRICAL CHARACTERISTICS at 25C free-air temperature, VI = 12 V, VO = 3.3 V, IO = IOmax, CI = 100 F (unless otherwise noted) PARAMETER TEST CONDITIONS MIN MAX UNIT 0 TYP 2.25 A (1) 14 V (2) % IO Output current TA = 85C, natural convection airflow VI Input voltage range Over IO range Set-point voltage tolerance TA = 25C Temperature variation -40C TA 85C Line regulation Over VI range 7 mV Load regulation Over IO range 0.13 %VO Total output voltage variation Includes set-point, line, load, -40C TA 85C Output Voltage Adjust Range Over IO range VO V(ADJ) 4.5 2 0.5 3 0.9 RSET = 346 , VO = 5 V Efficiency TA = 25C, IO = 2 A %VO (2) 5.5 %VO V 93.5% RSET = 1.87 k, VO = 3.3 V 92% RSET = 3.74 k, VO = 2.5 V 90.5% RSET = 6.19 k, VO = 2 V 89.5% RSET = 8.06 k, VO = 1.8 V 88% RSET = 13 k, VO = 1.5 V 86.5% RSET = 27.4 k, VO = 1.2 V 84.5% Output voltage ripple 20-MHz bandwidth 40 Overcurrent threshold Reset, followed by autorecovery 3.5 A Recovery time 50 s Transient response CO = 100 F, 1 A/s load step from 50% to 100% IOmax VO over/undershoot 100 mV IIL track Track input current (pin 2) Pin to GND dVtrack/dt Track slew rate capability CO CO(max) UVLO Undervoltage lockout -130 1 VI = increasing VI = decreasing 4.35 3.6 Input low voltage (VIL) Open -0.2 Input standby current Pins 5 and 2 connected fS Switching frequency Over VI and IO ranges External input capacitance Electrolytic type (CI) 100 Equivalent series resistance (nonceramic) MTBF (1) (2) (3) (4) (5) (6) (7) Calculated reliability Per Telcordia SR-332, 50% stress, TA = 40C, ground benign A mA 300 kHz F 220 100 10 V 1 (4) Nonceramic type (CO) V -5 Ceramic type (CO) External output capacitance A V/ms (3) 0.5 Input low current (IIL) II (stby) 4.5 4 Input high voltage (VIH) Inhibit control (pin 4) mVPP (5) 330 (6) (7) 10.3 F m 106 Hr The minimum input voltage is 4.5 V or (VO + 1.1) V, whichever is greater. The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1% with 100 ppm/C or better temperature stability. This control pin has an internal pull-up to 3 V (TYP). Do not place an external pull-up on this pin. If it is left open-circuit, the module operates when input power is applied. A small, low-leakage (< 100 nA) MOSFET is recommended for control. See the Application section for further guidance. An external 100-F electrolytic capacitor is required across the input (VI and GND) for proper operation. Locate the capacitor close to the module. An external output capacitor is not required for proper operation. Adding 100 F of distributed capacitance at the load improves the transient response. This is the calculated maximum capacitance. The minimum ESR limitation often results in a lower value. See the capacitor application information for further guidance. This is the minimum ESR for all the electrolytic (nonceramic) capacitance. Use 14 m as the minimum when calculating the total equivalent series resistance (ESR) using the maximum ESR values specified by the capacitor manufacturer. Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s) :PTH08000W 3 PTH08000W www.ti.com SLTS248B - JUNE 2005 - REVISED FEBRUARY 2008 PIN ASSIGNMENT 1 2 3 6 PTH08000W (Top View) 5 4 TERMINAL FUNCTIONS TERMINAL NAME NO. GND I/O This is the common ground connection for the VI and VO power connections. It is also the 0-VDC reference for the Inhibit , VO Adjust, and Track control inputs. 1 Track 2 DESCRIPTION I This is an analog control input that enables the output voltage to follow an external voltage. This pin becomes active typically 20 ms after the input voltage has been applied, and allows direct control of the output voltage from 0 V up to the nominal set-point voltage. Within this range, the output voltage follows the voltage at the Track pin on a volt-for-volt basis. When the control voltage is raised above this range, the module regulates at its set-point voltage. The feature allows the output voltage to rise simultaneously with other modules powered from the same input bus. If unused, this input should be connected to VI. NOTE: Due to the undervoltage lockout feature, the output of the module cannot follow its own input voltage during power up. For more information, consult the related application section. VI 3 I The positive input voltage power node to the module, which is referenced to common GND. Inhibit 4 I The Inhibit pin is an open-collector/drain-negative logic input that is referenced to GND. Applying a low-level ground signal to this input disables the module's output. When the Inhibit control is active, the input current drawn by the regulator is significantly reduced. If the Inhibit pin is left open-circuit, the module produces an output voltage whenever a valid input source is applied. Do not place an external pull-up on this pin. VO Adjust 5 I A 1% resistor must be connected between this pin and GND (pin 1) to set the output voltage of the module higher than 0.9 V. If left open-circuit, the output voltage defaults to this value. The temperature stability of the resistor should be 100 ppm/C (or better). The set-point range is from 0.9 V to 5.5 V. The electrical specification table gives the standard resistor value for a number of common output voltages. See the application information for further guidance. VO 6 O The regulated positive power output with respect to the GND node. 4 Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s) :PTH08000W PTH08000W www.ti.com SLTS248B - JUNE 2005 - REVISED FEBRUARY 2008 TYPICAL CHARACTERISTICS (5-V INPUT) (1) (2) EFFICIENCY vs OUTPUT CURRENT 100 50 VO- Output Voltage Ripple - mVPP VO = 2.5 V VO = 3.3 V 95 OUTPUT RIPPLE vs OUTPUT CURRENT Efficiency - % 90 85 80 VO = 1.5 V 75 VO = 1.8 V 70 VO = 1.2 V VO = 1 V 65 60 VO = 0.9 V 55 50 0 0.5 1 1.5 2 40 VO = 0.9 V 30 VO = 1.8 V 20 VO = 1.5 V 10 2.25 0 0.5 1.5 2 2.25 Figure 2. POWER DISSIPATION vs OUTPUT CURRENT TEMPERATURE DERATING vs OUTPUT CURRENT 1 90 VO = 1.2 V 0.8 TA - Ambient Temperature - oC PD - Power Dissipation - W 1 Figure 1. 0.9 VO = 1.5 V 0.7 VO = 1.8 V 0.6 VO = 2.5 V 0.5 0.4 VO = 3.3 V 0.3 0.2 VO = 1 V VO = 0.9 V 0.1 0 0 0.5 1 1.5 2 80 Nat Conv Airflow 70 60 50 40 30 20 2.25 0 0.5 1 1.5 2 2.25 IO - Output Current - A IO - Output Current - A Figure 3. (2) VO = 3.3 V VO = 1.2 V IO - Output Current - A IO - Output Current - A (1) VO = 1 V VO = 2.5 V Figure 4. The electrical characteristic data has been developed from actual products tested at 25C. This data is considered typical for the converter. Applies to Figure 1, Figure 2, and Figure 3. The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a 100-mm x 100-mm, double-sided PCB with 2-oz. copper. Applies to Figure 4. Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s) :PTH08000W 5 PTH08000W www.ti.com SLTS248B - JUNE 2005 - REVISED FEBRUARY 2008 TYPICAL CHARACTERISTICS (12-V INPUT) (1) (2) EFFICIENCY vs OUTPUT CURRENT OUTPUT RIPPLE vs OUTPUT CURRENT 100 100 VO - Output Voltage Ripple - mVPP VO = 3.3 V VO = 5 V Efficiency - % 90 80 VO = 1.8 V 70 VO = 1.5 V VO = 2.5 V 60 VO = 1.2 V 50 40 0 0.5 1 1.5 2 VO = 1.8 V 85 VO = 1.2 V 55 40 25 10 2.25 0 0.5 2 2.25 POWER DISSIPATION vs OUTPUT CURRENT TEMPERATURE DERATING vs OUTPUT CURRENT 90 VO = 5 V 0.8 VO = 3.3 V 0.7 0.6 VO = 2.5 V 0.5 0.4 0.3 VO = 1.5 V 0.2 VO = 1.8 V 0.1 VO = 1.2 V 0 TA - Ambient Temperature - oC PD - Power Dissipation - W 1.5 Figure 6. 1 80 0.5 1 1.5 2 Nat Conv Airflow 70 60 50 40 30 20 0 2.25 0 0.5 1 1.5 2 2.25 IO - Output Current - A IO - Output Current - A Figure 7. 6 1 IO - Output Current - A Figure 5. 0.9 (2) VO = 3.3 V VO = 1.5 V 70 IO - Output Current - A (1) VO = 5 V VO = 2.5 V Figure 8. The electrical characteristic data has been developed from actual products tested at 25C. This data is considered typical for the converter. Applies to Figure 5, Figure 6, and Figure 7. The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a 100-mm x 100-mm, double-sided PCB with 2-oz. copper. Applies to Figure 8. Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s) :PTH08000W PTH08000W www.ti.com SLTS248B - JUNE 2005 - REVISED FEBRUARY 2008 APPLICATION INFORMATION Adjusting the Output Voltage of the PTH08000W Wide-Output Adjust Power Modules The VO Adjust control (pin 5) sets the output voltage of the PTH08000W product. The adjustment range is from 0.9 V to 5.5 V. The adjustment method requires the addition of a single external resistor, RSET, that must be connected directly between the VO Adjust and GND (pin 1). Table 1 gives the standard external resistor for a number of common bus voltages, along with the actual voltage the resistance produces. For other output voltages, the value of the required resistor can either be calculated using the following formula, or simply selected from the range of values given in Table 2. Figure 9 shows the placement of the required resistor. 0.891 V RSET = 10 kW x - 1.82 kW VO - 0.9 V Table 1. Standard Values of RSET for Common Output Voltages VO (V) (Required) VO (V) (Actual) (1) 5 (1) RSET (k) (Standard Value) 0.348 5.010 3.3 1.87 3.315 2.5 3.74 2.503 2 6.19 2.012 1.8 8.06 1.802 1.5 13.0 1.501 1.2 27.4 1.205 1 86.6 1.001 0.9 Open 0.9 The minimum input voltage is 4.5 V or (VO + 1.1) V, whichever is greater. 2 Track VI 3 VI PTH08000W Inhibit 4 CI 100 mF (Required) GND VO 6 VO VOAdj 1 5 RSET 0.05 W 1% GND CO 100 mF (Optional) GND (1) A 0.05-W rated resistor may be used. The tolerance should be 1%, with a temperature stability of 100 ppm/C (or better). Place the resistor as close to the regulator as possible. Connect the resistor directly between pins 5 and 1 using dedicated PCB traces. (2) Never connect capacitors from VO Adjust to either GND or VO. Any capacitance added to the VO Adjust pin affects the stability of the regulator. Figure 9. VO Adjust Resistor Placement Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s) :PTH08000W 7 PTH08000W www.ti.com SLTS248B - JUNE 2005 - REVISED FEBRUARY 2008 Table 2. Calculated Set-Point Resistor Values 8 VO Required RSET VO Required RSET VO Required RSET 0.900 Open 1.800 8.08 k 3.700 1.36 k 0.925 355 k 1.850 7.56 k 3.750 1.32 k 0.950 176 k 1.900 7.09 k 3.800 1.25 k 0.975 117 k 1.950 6.67 k 3.850 1.20 k 1.000 87.2 k 2.000 6.28 k 3.900 1.15 k 1.025 69.5 k 2.050 5.92 k 3.950 1.10 k 1.050 57.6 k 2.100 5.61 k 4.000 1.05 k 1.075 49.1 k 2.150 5.31 k 4.050 1.01 k 1.100 42.7 k 2.200 5.03 k 4.100 964 1.125 37.8 k 2.250 4.78 k 4.150 922 1.150 33.8 k 2.300 4.54 k 4.200 880 1.175 30.6 k 2.350 4.33 k 4.250 840 1.200 27.9 k 2.400 4.12 k 4.300 801 1.225 25.6 k 2.450 3.93 k 4.350 763 1.250 23.6 k 2.500 3.75 k 4.400 726 1.275 21.9 k 2.550 3.58 k 4.450 690 1.300 20.5 k 2.600 3.42 k 4.500 655 1.325 19.1 k 2.650 3.27 k 4.550 621 1.350 17.9 k 2.700 3.13 k 4.600 588 1.375 16.9 k 2.750 2.99 k 4.650 556 1.400 14.6 k 2.800 2.87 k 4.700 525 1.425 13.7 k 2.850 2.75 k 4.750 494 1.450 13.0 k 2.900 2.64 k 4.800 465 1.475 13.7 k 2.950 2.53 k 4.850 436 1.500 13.0 k 3.000 2.42 k 4.900 408 1.525 12.4 k 3.050 2.32 k 4.950 380 1.550 11.9 k 3.100 2.23 k 5.000 353 1.575 11.4 k 3.150 2.14 k 5.050 327 1.600 10.9 k 3.200 2.05 k 5.100 301 1.625 10.5 k 3.250 1.97 k 5.150 276 1.650 10.0 k 3.300 1.89 k 5.200 252 1.675 9.68 k 3.350 1.82 k 5.250 228 1.700 9.32 k 3.400 1.74 k 5.300 205 1.725 8.98 k 3.450 1.67 k 5.350 182 1.750 8.66 k 3.500 1.61 k 5.400 160 1.775 8.36 k 3.550 1.54 k 5.450 138 1.800 8.08 k 3.600 1.48 k 5.500 117 1.825 7.81 k 3.650 1.42 k Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s) :PTH08000W PTH08000W www.ti.com SLTS248B - JUNE 2005 - REVISED FEBRUARY 2008 CAPACITOR RECOMMENDATIONS FOR THE PTH08000W WIDE-OUTPUT ADJUST POWER MODULES Input Capacitor The minimum required input capacitor is 100 F of capacitance. When VO > 3.4 V, the 100-F electrolytic capacitance must be rated for 650-mArms ripple current . For VO < 3.4 V, the ripple current rating must be at least 500 mArms. The ripple current rating of electrolytic capacitors is a major consideration when they are used at the input. When specifying regular tantalum capacitors for use at the input, a minimum voltage rating of 2 x (maximum dc voltage + ac ripple) is highly recommended. This is standard practice to ensure reliability. Polymer-tantalum capacitors are not affected by this requirement. For improved ripple reduction on the input bus, ceramic capacitors can also be added to complement the required electrolytic capacitance. Output Capacitors (Optional) No output capacitance is required for normal operation. However, applications with load transients (sudden changes in load current) can benefit by adding external output capacitance. A 100-F electrolytic or ceramic capacitor can be used to improve transient response. Adding a 100-F nonceramic capacitor allows the module to meet its transient response specification. A high-quality computer-grade electrolytic capacitor should be adequate. Electrolytic capacitors should be located close to the load circuit. These capacitors provide decoupling over the frequency range, 2 kHz to 150 kHz. Aluminum electrolytic capacitors are suitable for ambient temperatures above 0C. For operation below 0C, tantalum or Os-Con-type capacitors are recommended. When using one or more nonceramic capacitors, the calculated equivalent ESR should be no lower than 10m (14m using the manufacturer's maximum ESR for a single capacitor). A list of preferred low-ESR-type capacitors are identified in Table 3. Ceramic Capacitors Above 150 kHz, the performance of aluminum electrolytic capacitors becomes less effective. To further improve the reflected input ripple current, or the output transient response, multilayer ceramic capacitors must be added. Ceramic capacitors have low ESR and their resonant frequency is higher than the bandwidth of the regulator. When placed at the output, their combined ESR is not critical as long as the total value of ceramic capacitance does not exceed 220 F. Also, to prevent the formation of local resonances, do not exceed the maximum number of capacitors specified in the capacitor table. Tantalum Capacitors Additional tantalum-type capacitors can be used at both the input and output, and are recommended for applications where the ambient operating temperature can be less than 0C. The AVX TPS, Sprague 593D/594/595, and Kemet T495/T510/T520 capacitors series are suggested over many other tantalum types due to their rated surge, power dissipation, and ripple current capability. As a caution, many general-purpose tantalum capacitors have considerably higher ESR and lower ripple current capability. These capacitors are also less reliable as they have lower power dissipation capability and surge current ratings. Tantalum capacitors that do not have a stated ESR or surge current rating are not recommended for power applications. When specifying Os-Con and polymer-tantalum capacitors for the output, the minimum ESR limit is encountered well before the maximum capacitance value is reached. Capacitor Table The capacitor table, Table 3, identifies the characteristics of capacitors from a number of vendors with acceptable ESR and ripple current (rms) ratings. The recommended number of capacitors required at both the input and output buses is identified for each capacitor type. This is not an extensive capacitor list. Capacitors from other vendors are available with comparable specifications. Those listed are for guidance. The rms rating and ESR (at 100 kHz) are critical parameters necessary to ensure both optimum regulator performance and long capacitor life. Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s) :PTH08000W 9 PTH08000W www.ti.com SLTS248B - JUNE 2005 - REVISED FEBRUARY 2008 Table 3. Recommended Input/Output Capacitors CAPACITOR CHARACTERISTICS (1) QUANTITY WORKING VOLTAGE (V) VALUE (F) EQUIVALENT SERIES RESISTANCE (ESR) () 85C MAXIMUM RIPPLE CURRENT (IRMS) (mA) Panasonic WA (SMT) FC (SMT) 20 25 150 220 0.026 0.150 3700 670 10 x 10,2 10 x 10,2 1 1 2 1 EEFWA1D151P EEVFC1E221P Panasonic SL SP-cap(SMT) 6.3 6.3 47 120 0.018 0.007 2500 3500 7,3 x 4,3 7,3 x 4,3 N/R (3) N/R (3) 3 1 EEFCD0J470R EEFSD0J121R PXA (SMT) PS LXZ MVY (SMT) 16 25 35 35 150 100 220 333 0.026 0.020 0.180 0.150 3400 4300 760 670 10 x 7,7 10 x 12,5 10 x 12,5 10 x 10 1 1 1 1 2 2 1 1 PXA16VC151MJ80TP 25PS100MJ12 LXZ35VB221M10X12LL MVY35VC331MJ10TP Nichicon UWG (SMT) F559(Tantalum) HD 35 10 25 100 100 220 0.150 0.055 0.072 670 2000 760 10 x 10 7,7 x 4,3 8 x 11,5 1 N/R (4) 1 1 3 1 UWG1V101MNR1GS F551A107MN UHD1E221MPR Sanyo Os-con\ POS-Cap SVP (SMT) SP 10 20 20 68 150 120 0.025 0.020 0.024 2400 4320 3110 7,3 x 4,3 10 x 12,7 8 x 10,5 N/R (4) 1 1 2 1 2 10TPE68M 20SVP150M 20SP120M AVX Tantalum TPS (SMD) 35 25 47 47 0.100 0.100 1430 1150 7,3 x 4,3 x 4,1 7,3 x 4,3 x 4,1 2 2 4 4 TPSV476M035R0100 TPSE476M025R0100 (VI<13V) Kemet T520 (SMD) AO-CAP 10 6.3 100 100 0.025 0.018 > 2000 > 2900 7,3 x 5,7 x 4 7,3 x 5,7 x 4 N/R (4) N/R (4) 1 1 T520V107M010ASE025 A700V107M006AT Vishay/Sprague 594D/SVP(SMD) 35 20 47 100 0.280 0.025 > 1000 3200 7,3 x 6 x 4,1 8 x 12 2 1 5 2 595D476X0035R2T 94SVP107X0020E12 94SS 20 150 0.030 3200 10 x 10,5 1 2 94SS157X0020FBP Murata Ceramic X5R 16 47 0.002 > 1400 3225 3 GRM32ER61C476M TDK ceramic X5R 6.3 47 0.002 > 1400 3225 N/R (4) 3 C3225X5R0J476MT (VO<5.5V) Kemet Ceramic X5R 6.3 47 0.002 > 1400 3225 N/R (4) 3 C1210C476K9PAC (VO<5.5V) TDK Ceramic X7R Murata Ceramic X5R Kemet 25 25 16 10 10 10 0.002 0.002 0.002 > 1400 > 1400 > 1400 3225 1 (5) 1 (5) 1 (5) 4 4 4 C3225X7R1E106K GRM32DR61E106KA12 C1210C106M4PAC TDK Ceramic X7R Murata Ceramic X7R Kemet 25 25 25 2.2 2.2 2.2 0.002 0.002 0.002 > 1400 > 1400 > 1400 3225 1 1 1 1 1 1 C3225X7R1E225KT/MT GRM32RR71J225KC01L C1210C225K3RAC CAPACITOR VENDOR/ COMPONENT SERIES PHYSICAL SIZE (mm) INPUT BUS (2) OUTPUT BUS VENDOR NUMBER United Chemi-con (1) (2) (3) (4) (5) 1 (5) Check with capacitor manufacturers for availability and lead-free status. The voltage rating of the input capacitor must be selected for the desired operating input voltage range of the regulator. To operate the regulator at a higher input voltage, select a capacitor with a higher voltage rating. Not Recommended (N/R). The voltage rating of this capacitor does not meet the minimum operating limit in most applications. Not Recommended (N/R). The voltage rating of this capacitor does not meet the minimum operating limit in most applications. Ceramic capacitors can be used to complement electrolytic types at the input bus by reducing high-frequency ripple current. Designing for Load Transients The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of 1A/s. The typical voltage deviation for this load transient is given in the data-sheet specification table using the optional value of output capacitance. As the di/dt of a transient is increased, the response of a converter's regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation with any dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target application specifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional output capacitor decoupling. In these cases, special attention must be paid to the type, value, and ESR of the capacitors selected. If the transient performance requirements exceed those specified in the data sheet, the selection of output capacitors becomes more important. Review the minimum ESR in the characteristic data sheet for details on the capacitance maximum. 10 Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s) :PTH08000W PTH08000W www.ti.com SLTS248B - JUNE 2005 - REVISED FEBRUARY 2008 Features of the PTH/PTV Family of Nonisolated, Wide-Output Adjustable Power Modules POLATM Compatibility The PTH/PTV family of nonisolated, wide-output adjustable power modules from Texas Instruments are optimized for applications that require a flexible, high-performance module that is small in size. Each of these products are POLATM compatible. POLA-compatible products are produced by a number of manufacturers, and offer customers advanced, nonisolated modules with the same footprint and form factor. POLA parts are also ensured to be interoperable, thereby providing customers with true second-source availability. Soft-Start Power Up The Auto-Track feature allows the power up of multiple PTH/PTV modules to be directly controlled from the Track pin. However, in a stand-alone configuration, or when the Auto-Track feature is not being used, the Track pin should be directly connected to the input voltage, VI (see Figure 10). 5 2 Track 3 VI PTH08000W Inhibit CI 100 F (Required) VO Adj 4 VO VO = 3.3 V 6 GND 1 + VI = 12 V 1.87 kW 0.05 W, 1% CO 100 F (Optional) GND + GND Figure 10. Power-Up Application Circuit When the Track pin is connected to the input voltage, the Auto-Track function is permanently disengaged. This allows the module to power up entirely under the control of its internal soft-start circuitry. When power up is under soft-start control, the output voltage rises to the set-point at a quicker and more linear rate. VI (5 V/div) VO (2 V/div) II (500 mA/div) t - Time = 4 ms/div Figure 11. Power-Up Waveform From the moment a valid input voltage is applied, the soft-start control introduces a short time delay (typically Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s) :PTH08000W 11 PTH08000W www.ti.com SLTS248B - JUNE 2005 - REVISED FEBRUARY 2008 less than 5 ms) before allowing the output voltage to rise. The output then progressively rises to the module set-point voltage. Figure 11 shows the soft-start power-up characteristic of the PTH08000W, operating from a 12-V input bus and configured for a 3.3-V output. The waveforms were measured with a 2-A resistive load and the Auto-Track feature disabled. The initial rise in input current when the input voltage first starts to rise is the charge current drawn by the input capacitors. Power up is complete within 25 ms. Current Limit Protection The PTH08000W modules protect against load faults with an output overcurrent trip. Under a load fault condition, the output current cannot exceed the current limit value. Attempting to draw current that exceeds the current limit value causes the output voltage to enter into a hiccup mode of operation, whereby the module continues in a cycle of successive shutdown and power up until the load fault is removed. On removal of the fault, the output voltage promptly recovers. Thermal Shutdown Thermal shutdown protects the module internal circuitry against excessively high temperatures. A rise in temperature may be the result of a drop in airflow, a high ambient temperature, or a higher than normal output current. If the junction temperature of the internal components exceeds 165C, the module shuts down. This reduces the output voltage to zero. The module starts up automatically, by initiating a soft-start power up when the sensed temperature decreases 10C below the thermal shutdown trip-point. Output On/Off Inhibit For applications requiring output voltage on/off control, the PTH08000 power module incorporates an output on/off Inhibit control (pin 4). The inhibit feature can be used wherever there is a requirement for the output voltage from the regulator to be turned off. The power module functions normally when the Inhibit pin is left open-circuit, providing a regulated output whenever a valid source voltage is connected to VI with respect to GND. Figure 12 shows the typical application of the inhibit function. Note the discrete transistor (Q1). The Inhibit control has its own internal pull-up to 3 V. An open-collector or open-drain device is recommended to control this input. Do not place an external pull-up on this pin. Turning Q1 on applies a low voltage to the Inhibit control pin and disables the output of the module. If Q1 is then turned off, the module executes a soft-start power-up sequence. A regulated output voltage is produced within 20 ms. Figure 13 shows the typical rise in the output voltage, following the turn off of Q1. The turn off of Q1 corresponds to the rise in the waveform, Q1 VDS. The waveforms were measured with a 2-A resistive load. 2 5 Track VI = 12 V 3 PTH08000W VI Inhibit 4 CI 100 mF (Required) Inhibit VO Adj VO VO = 3.3 V 6 GND 1 1.87 kW 0.05 W, 1% CO 100 mF (Optional) L O A D Q1 BSS138 GND GND Figure 12. On/Off Inhibit Control Circuit 12 Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s) :PTH08000W PTH08000W www.ti.com SLTS248B - JUNE 2005 - REVISED FEBRUARY 2008 VO (2 V/div) II (500 mA/div) VINH (2 V/div) t - Time = 4 ms/div Figure 13. Power-Up Response From Inhibit Control Auto-TrackTM Function The Auto-Track function is unique to the PTH/PTV family, and is available with all POLA products. Auto-Track was designed to simplify the amount of circuitry required to make the output voltage from each module power up and power down in sequence. The sequencing of two or more supply voltages during power up is a common requirement for complex mixed-signal applications that use dual-voltage VLSI ICs such as the TMS320TM DSP family, microprocessors, and ASICs. How Auto-TrackTM Works Auto-Track works by forcing the module output voltage to follow a voltage presented at the Track control pin (1). This control range is limited to between 0 V and the module set-point voltage. Once the track-pin voltage is raised above the set-point voltage, the module output remains at its set-point (2). As an example, if the Track pin of a 2.5-V regulator is at 1 V, the regulated output is 1 V. If the voltage at the Track pin rises to 3 V, the regulated output does not go higher than 2.5 V. When under Auto-Track control, the regulated output from the module follows the voltage at its Track pin on a volt-for-volt basis. By connecting the Track pin of a number of these modules together, the output voltages follow a common signal during power up and power down. The control signal can be an externally generated master ramp waveform, or the output voltage from another power supply circuit (3). For convenience, the Track input incorporates an internal RC-charge circuit. This operates off the module input voltage to produce a suitable rising waveform at power up. Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s) :PTH08000W 13 PTH08000W www.ti.com SLTS248B - JUNE 2005 - REVISED FEBRUARY 2008 U1 2 5 VOAdj Track VO1 = 3.3 V 12 V 3 6 Inhibit GND 4 C1 VO PTH08000W VI 1 C2 1.89 kW U3* TL7712A 8 VCC 7 SENSE 5 RESET 2 RESIN 3 U2 REF RESET CT 3.3 mF 5 VOAdj Track CT GND CREF 0.1 mF 2 6 4 3 RRST 10 kW VI PTH08000W Inhibit + C5 VO VO2 = 2.5 V 6 GND + 1 1 4 C6 3.75 kW *Use TPS3808G50 with 5-V input bus modules. Figure 14. Auto-Track Circuit VTRK (1 V/div) VTRK (1 V/div) VO1 (1 V/div) VO2 (1 V/div) VO1 (1 V/div) VO2 (1 V/div) t - Time = 4 ms/div Figure 15. Simultaneous Power Up With Auto-Track Control 14 t - Time = 400 ms/div Figure 16. Simultaneous Power Down With Auto-Track Control Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s) :PTH08000W PTH08000W www.ti.com SLTS248B - JUNE 2005 - REVISED FEBRUARY 2008 Typical Application The basic implementation of Auto-Track allows for simultaneous voltage sequencing of a number of Auto-Track compliant modules. Connecting the Track inputs of two or more modules forces their track input to follow the same collective RC-ramp waveform, and allows their power-up sequence to be coordinated from a common Track control signal. This can be an open-collector (or open-drain) device, such as a power-up reset voltage supervisor IC. See U3 in Figure 14. To coordinate a power-up sequence, the Track control must first be pulled to ground potential. This should be done at or before input power is applied to the modules. The ground signal should be maintained for at least 20 ms after input power has been applied. This brief period gives the modules time to complete their internal soft-start initialization (4), enabling them to produce an output voltage. A low-cost supply voltage supervisor IC, that includes a built-in time delay, is an ideal component for automatically controlling the Track inputs at power up. Figure 14 shows how the TPS3808G50 supply voltage supervisor IC (U3) can be used to coordinate the sequenced power up of two 5-V input Auto-Track modules. The output of the TPS3808G50 supervisor becomes active above an input voltage of 0.8 V, enabling it to assert a ground signal to the common track control well before the input voltage has reached the module's undervoltage lockout threshold. The ground signal is maintained until approximately 27 ms after the input voltage has risen above U3's voltage threshold, which is 4.65 V. The 27-ms time period is controlled by the capacitor C3. The value of 4700 pF provides sufficient time delay for the modules to complete their internal soft-start initialization. The output voltage of each module remains at zero until the track control voltage is allowed to rise. When U3 removes the ground signal, the track control voltage automatically rises. This causes the output voltage of each module to rise simultaneously with the other modules, until each reaches its respective set-point voltage. Figure 15 shows the output voltage waveforms from the circuit of Figure 14 after input voltage is applied to the circuit. The waveforms, VO1 and VO2, represent the output voltages from the two power modules, U1 (3.3 V) and U2 (2.5 V), respectively. VO1 and VO2 are shown rising together to produce the desired simultaneous power-up characteristic. The same circuit also provides a power-down sequence. When the input voltage falls below U3's voltage threshold, the ground signal is re-applied to the common track control. This pulls the track inputs to zero volts, forcing the output of each module to follow. Power down is normally complete before the input voltage has fallen below the modules' undervoltage lockout. This is an important constraint. Once the modules recognize that an input voltage is no longer present, their outputs can no longer follow the voltage applied at their track input. During a power-down sequence, the fall in the output voltage from the modules is limited by the Auto-Track slew rate capability. Notes on Use of Auto-TrackTM 1. The Track pin voltage must be allowed to rise above the module set-point voltage before the module regulates at its adjusted set-point voltage. 2. The Auto-Track function tracks almost any voltage ramp during power up, and is compatible with ramp speeds of up to 1 V/ms. 3. The absolute maximum voltage that may be applied to the Track pin is the input voltage VI. 4. The module cannot follow a voltage at its track control input until it has completed its soft-start initialization. This takes about 20 ms from the time that a valid voltage has been applied to its input. During this period, it is recommended that the Track pin be held at ground potential. 5. The Auto-Track function is disabled by connecting the Track pin to the input voltage (VI). When Auto-Track is disabled, the output voltage rises at a quicker and more linear rate after input power has been applied. Submit Documentation Feedback Copyright (c) 2005-2008, Texas Instruments Incorporated Product Folder Link(s) :PTH08000W 15 PACKAGE OPTION ADDENDUM www.ti.com 13-Nov-2010 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish PTH08000WAH ACTIVE ThroughHole Module EUS 6 56 Pb-Free (RoHS) SN PTH08000WAS ACTIVE Surface Mount Module EUT 6 49 TBD PTH08000WAST ACTIVE Surface Mount Module EUT 6 250 PTH08000WAZ ACTIVE Surface Mount Module EUT 6 PTH08000WAZT ACTIVE Surface Mount Module EUT 6 MSL Peak Temp (3) Samples (Requires Login) N / A for Pkg Type Request Free Samples SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS Request Free Samples TBD SNPB Level-1-235C-UNLIM/ Level-3-260C-168HRS Purchase Samples 49 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR Request Free Samples 250 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR Purchase Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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