LT1460
1
1460f
OUTPUT VOLTAGE ERROR (%)
0.10
UNITS (%)
0.06 0.02 0
1460 TA02
0.060.02
20
18
16
14
12
10
8
6
4
2
0
0.10
1400 PARTS
FROM 2 RUNS
Micropower Precision
Series Reference Family
The LT
®
1460 is a micropower bandgap reference that
combines very high accuracy and low drift with low power
dissipation and small package size. This series reference
uses curvature compensation to obtain low temperature
coeffi cient and trimmed precision thin-fi lm resistors to
achieve high output accuracy. The reference will supply
up to 20mA with excellent line regulation characteristics,
making it ideal for precision regulator applications.
This series reference provides supply current and power
dissipation advantages over shunt references that must idle
the entire load current to operate. Additionally, the LT1460
does not require an output compensation capacitor, yet
is stable with capacitive loads. This feature is important
where PC board space is a premium or fast settling is
demanded. In the event of a reverse battery connection,
these references will not conduct current, and are therefore
protected from damage.
The LT1460 is available in the 8-lead MSOP, SO, PDIP and
the 3-lead TO-92 and SOT23 packages.
Handheld Instruments
Precision Regulators
A/D and D/A Converters
Power Supplies
Hard Disk Drives
Trimmed to High Accuracy: 0.075% Max
Low Drift: 10ppm/°C Max
Industrial Temperature Range
Temperature Coeffi cient Guaranteed to 125°C
Low Supply Current: 130µA Max (LT1460-2.5)
Minimum Output Current: 20mA
No Output Capacitor Required
Reverse Battery Protection
Minimum Input/Output Differential: 0.9V
Available in S0-8, MSOP-8, PDIP-8, TO-92 and
SOT- 23 Package
Basic Connection
APPLICATIO S
U
FEATURES DESCRIPTIO
U
TYPICAL APPLICATIO
U
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Typical Distribution of Output Voltage
S8 Package
LT1460-2.5
GND
IN OUT
1460 TA01
C1
0.1µF
2.5V
3.4V
TO 20V
LT1460
2
1460f
Input Voltage .............................................................30V
Reverse Voltage ......................................................–15V
Output Short-Circuit Duration, TA = 25°C
V
IN > 10V ............................................................5 sec
V
IN ≤ 10V ..................................................... Indefi nite
(Note 1)
ABSOLUTE AXI U RATI GS
W
WW
U
PACKAGE/ORDER I FOR ATIO
UUW
Specifi ed Temperature Range
Commercial (C) ........................................ 0°C to 70°C
Industrial (I) ......................................... –40°C to 85°C
High (H) ............................................. –40°C to 125°C
Storage Temperature Range (Note 2) ..... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
3 GND
IN 1
TOP VIEW
S3 PACKAGE
3-LEAD PLASTIC SOT-23
OUT 2
TJMAX = 125°C, θJA = 325°C/W
ORDER PART NUMBER S3 PART MARKING
LT1460HCS3-2.5
LT1460JCS3-2.5
LT1460KCS3-2.5
LT1460HCS3-3
LT1460JCS3-3
LT1460KCS3-3
LT1460HCS3-3.3
LT1460JCS3-3.3
LT1460KCS3-3.3
LT1460HCS3-5
LT1460JCS3-5
LT1460KCS3-5
LT1460HCS3-10
LT1460JCS3-10
LT1460KCS3-10
LTAC
LTAD
LTAE
LTAN
LTAP
LTAQ
LTAR
LTAS
LTAT
LTAK
LTAL
LTAM
LTAU
LTAV
LTAW
}
OR LTH8*
}
OR LTH9*
}
OR LTJ1*
}
OR LTJ2*
}
OR LTJ3*
*The temperature grades and parametric grades are identifi ed by a label on the shipping container. Product may be identifi ed with either part marking.
LT1460
3
1460f
PACKAGE/ORDER I FOR ATIO
UUW
1
2
3
4
8
7
6
5
TOP VIEW
DNC*
VIN
DNC*
GND
DNC*
DNC*
VOUT
DNC*
N8 PACKAGE
8-LEAD PLASTIC DIP
*CONNECTED INTERNALLY.
DO NOT CONNECT EXTERNAL CIRCUITRY TO THESE PINS
TJMAX = 150°C, θJA = 130°C/W
ORDER PART NUMBER
LT1460ACN8-2.5
LT1460BIN8-2.5
LT1460DCN8-2.5
LT1460EIN8-2.5
LT1460ACN8-5
LT1460BIN8-5
LT1460DCN8-5
LT1460EIN8-5
LT1460ACN8-10
LT1460BIN8-10
LT1460DCN8-10
LT1460EIN8-10
1
2
3
4
8
7
6
5
TOP VIEW
DNC*
DNC*
VOUT
DNC*
DNC*
VIN
DNC*
GND
S8 PACKAGE
8-LEAD PLASTIC SO
*CONNECTED INTERNALLY.
DO NOT CONNECT EXTERNAL CIRCUITRY TO THESE PINS
TJMAX = 150°C, θJA = 190°C/W
ORDER PART NUMBER S8 PART MARKING
LT1460ACS8-2.5
LT1460BIS8-2.5
LT1460DCS8-2.5
LT1460EIS8-2.5
LT1460LHS8-2.5
LT1460MHS8-2.5
1460A2
460BI2
1460D2
460EI2
60LH25
60MH25
LT1460ACS8-5
LT1460BIS8-5
LT1460DCS8-5
LT1460EIS8-5
LT1460LHS8-5
LT1460MHS8-5
1460A5
460BI5
1460D5
460EI5
460LH5
460MH5
LT1460ACS8-10
LT1460BIS8-10
LT1460DCS8-10
LT1460EIS8-10
1460A1
460BI1
1460D1
460EI1
LT1460
4
1460f
1
2
3
4
DNC*
VIN
DNC*
GND
8
7
6
5
DNC*
DNC*
VOUT
DNC*
TOP VIEW
MS8 PACKAGE
8-LEAD PLASTIC MSOP
*CONNECTED INTERNALLY.
DO NOT CONNECT EXTERNAL
CIRCUITRY TO THESE PINS
TJMAX = 150°C, θJA = 250°C/W
12
3
BOTTOM VIEW
VIN VOUT GND
Z PACKAGE
3-LEAD TO-92 PLASTIC
TJMAX = 150°C, θJA = 160°C/W
ORDER PART NUMBER MS8 PART MARKING ORDER PART NUMBER
LT1460CCMS8-2.5
LT1460FCMS8-2.5
LT1460CCMS8-5
LT1460FCMS8-5
LT1460CCMS8-10
LT1460FCMS8-10
LTAA
LTAB
LTAF
LTAG
LTAH
LTAJ
LT1460GCZ-2.5
LT1460GIZ-2.5
LT1460GCZ-5
LT1460GIZ-5
LT1460GCZ-10
LT1460GIZ-10
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
PACKAGE/ORDER I FOR ATIO
UUW
TEMPERATURE
ACCURACY
(%)
TEMPERATURE
COEFFICIENT
(ppm/°C)
PACKAGE TYPE
N8 S8 MS8 Z S3
0°C to 70°C 0.075 10 LT1460ACN8 LT1460ACS8
–40°C to 85°C 0.10 10 LT1460BIN8 LT1460BIS8
0°C to 70°C 0.10 15 LT1460CCMS8
0°C to 70°C 0.10 20 LT1460DCN8 LT1460DCS8
–40°C to 85°C 0.125 20 LT1460EIN8 LT1460EIS8
0°C to 70°C 0.15 25 LT1460FCMS8
0°C to 70°C 0.25 25 LT1460GCZ
–40°C to 85°C 0.25 25 LT1460GIZ
–40°C to 85°C/125°C 0.20 20/50 LT1460LHS8
–40°C to 125°C 0.20 50 LT1460MHS8
0°C to 70°C 0.20 20 LT1460HCS3
0°C to 70°C 0.40 20 LT1460JCS3
0°C to 70°C 0.50 50 LT1460KCS3
AVAILABLE OPTIONS
LT1460
5
1460f
PARAMETER CONDITIONS MIN TYP MAX UNITS
Output Voltage LT1460ACN8-2.5, ACS8-2.5 2.49813
–0.075
2.50188
0.075
V
%
LT1460BIN8-2.5, BIS8-2.5, CCMS8-2.5,
DCN8-2.5, DCS8-2.5
2.4975
–0.10
2.5025
0.10
V
%
LT1460EIN8-2.5, EIS8-2.5 2.49688
–0.125
2.50313
0.125
V
%
LT1460FCMS8-2.5 2.49625
–0.15
2.50375
0.15
V
%
LT1460GCZ-2.5, GIZ-2.5 2.49375
–0.25
2.50625
0.25
V
%
LT1460LHS8-2.5, MHS8-2.5 2.495
–0.20
2.505
0.20
V
%
LT1460ACN8-5, ACS8-5 4.99625
–0.075
5.00375
0.075
V
%
LT1460BIN8-5, BIS8-5, CCMS8-5,
DCN8-5, DCS8-5
4.995
–0.10
5.005
0.10
V
%
LT1460EIN8-5, EIS8-5 4.99375
–0.125
5.00625
0.125
V
%
LT1460FCMS8-5 4.9925
–0.15
5.0075
0.15
V
%
LT1460GCZ-5, GIZ-5 4.9875
–0.25
5.0125
0.25
V
%
LT1460LHS8-5, MHS8-5 4.990
–0.20
5.010
0.20
V
%
LT1460ACN8-10, ACS8-10 9.9925
–0.075
10.0075
0.075
V
%
LT1460BIN8-10, BIS8-10, CCMS8-10,
DCN8-10, DCS8-10
9.990
–0.10
10.010
0.10
V
%
LT1460EIN8-10, EIS8-10 9.9875
–0.125
10.0125
0.125
V
%
LT1460FCMS8-10 9.985
–0.15
10.0015
0.15
V
%
LT1460GCZ-10, GIZ-10 9.975
–0.25
10.025
0.25
V
%
LT1460HC
LT1460JC
LT1460KC
–0.2
–0.4
–0.5
0.2
0.4
0.5
%
%
%
Output Voltage Temperature Coeffi cient (Note 3) TMIN ≤ TJ ≤ TMAX
LT1460ACN8, ACS8, BIN8, BIS8
LT1460CCMS8
LT1460DCN8, DCS8, EIN8, EIS8
LT1460FCMS8, GCZ, GIZ
LT1460LHS8 –40°C to 85°C
–40°C to 125°C
LT1460MHS8 –40°C to 125°C
5
7
10
12
10
25
25
10
15
20
25
20
50
50
ppm/°C
ppm/°C
ppm/°C
ppm/°C
ppm/°C
ppm/°C
ppm/°C
LT1460HC
LT1460JC
LT1460KC
10
10
25
20
20
50
ppm/°C
ppm/°C
ppm/°C
The denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. VIN = VOUT + 2.5V, IOUT = 0 unless otherwise specifi ed.
ELECTRICAL CHARACTERISTICS
LT1460
6
1460f
The denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. VIN = VOUT + 2.5V, IOUT = 0 unless otherwise specifi ed.
ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
Line Regulation
LT1460A, LT1460B, LT1460C, LT1460D, LT1460E,
LT1460F, LT1460G, LT1460H, LT1460L, LT1460M
VOUT + 0.9V ≤ VIN ≤ VOUT + 2.5V
30 60
80
ppm/V
ppm/V
VOUT + 2.5V ≤ VIN ≤ 20V
10 25
35
ppm/V
ppm/V
LT1460HC, LT1460JC, LT1460KC VOUT + 0.9V ≤ VIN ≤ VOUT + 2.5V
150 800
1000
ppm/V
ppm/V
VOUT + 2.5V ≤ VIN ≤ 20V
50 100
130
ppm/V
ppm/V
Load Regulation Sourcing (Note 4)
LT1460A, LT1460B, LT1460C, LT1460D, LT1460E,
LT1460F, LT1460G, LT1460H, LT1460L, LT1460M
IOUT = 100µA
1500 2800
3500
ppm/mA
ppm/mA
IOUT = 10mA
80 135
180
ppm/mA
ppm/mA
IOUT = 20mA
0°C to 70°C
70 100
140
ppm/mA
ppm/mA
LT1460HC, LT1460JC, LT1460KC IOUT = 100µA
1000 3000
4000
ppm/mA
ppm/mA
IOUT = 10mA
50 200
300
ppm/mA
ppm/mA
IOUT = 20mA
20 70
100
ppm/mA
ppm/mA
Thermal Regulation (Note 5)
LT1460A, LT1460B, LT1460C, LT1460D, LT1460E,
LT1460F, LT1460G, LT1460H, LT1460L, LT1460M
ΔP = 200mW 0.5 2.5 ppm/mW
LT1460HC, LT1460JC, LT1460KC ΔP = 200mW 2.5 10 ppm/mW
Dropout Voltage (Note 6) VIN – VOUT, IOUT = 0 0.9 V
VIN – VOUT, IOUT = 10mA
1.3
1.4
V
V
Output Current Short VOUT to GND 40 mA
Reverse Leakage VIN = –15V 0.5 10 µA
Supply Current LT1460-2.5
100 130
165
µA
µA
LT1460-5
125 175
225
µA
µA
LT1460-10
190 270
360
µA
µA
LT1460S3-2.5
115 145
175
µA
µA
LT1460S3-3
145 180
220
µA
µA
LT1460S3-3.3
145 180
220
µA
µA
LT1460S3-5
160 200
240
µA
µA
LT1460S3-10
215 270
350
µA
µA
LT1460
7
1460f
PARAMETER CONDITIONS MIN TYP MAX UNITS
Output Voltage Noise (Note 7)
LT1460A, LT1460B, LT1460C, LT1460D, LT1460E,
LT1460F, LT1460G, LT1460H, LT1460L, LT1460M
LT1460-2.5 0.1Hz ≤ f ≤ 10Hz
10Hz ≤ f ≤ 1kHz
10
10
µVP-P
µVRMS
LT1460-5 0.1Hz ≤ f ≤ 10Hz
10Hz ≤ f ≤ 1kHz
20
20
µVP-P
µVRMS
LT1460-10 0.1Hz ≤ f ≤ 10Hz
10Hz ≤ f ≤ 1kHz
40
35
µVP-P
µVRMS
LT1460HC, LT1460JC, LT1460KC 0.1Hz ≤ f ≤ 10Hz
10Hz ≤ f ≤ 1kHz
4
4
ppm (P-P)
ppm (RMS)
Long-Term Stability of Output Voltage (Note 8)
S8 Pkg
40 ppm/√kHr
LT1460HC, LT1460JC, LT1460KC 100 ppm/√kHr
Hysteresis (Note 9)
LT1460A, LT1460B, LT1460C, LT1460D, LT1460E,
LT1460F, LT1460G, LT1460H, LT1460L, LT1460M
ΔT = 0°C to 70°C
ΔT = –40°C to 85°C
25
160
ppm
ppm
LT1460HC, LT1460JC, LT1460KC ΔT = 0°C to 70°C
ΔT = –40°C to 85°C
50
250
ppm
ppm
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: If the part is stored outside of the specifi ed temperature range, the
output may shift due to hysteresis.
Note 3: Temperature coeffi cient is measured by dividing the change in
output voltage by the specifi ed temperature range. Incremental slope is
also measured at 25°C.
Note 4: Load regulation is measured on a pulse basis from no load to the
specifi ed load current. Output changes due to die temperature change
must be taken into account separately.
Note 5: Thermal regulation is caused by die temperature gradients created
by load current or input voltage changes. This effect must be added to
normal line or load regulation. This parameter is not 100% tested.
Note 6: Excludes load regulation errors. For LT1460S3, ΔVOUT ≤ 0.2%. For
all other packages, ΔVOUT ≤ 0.1%.
Note 7: Peak-to-peak noise is measured with a single highpass fi lter at
0.1Hz and 2-pole lowpass fi lter at 10Hz. The unit is enclosed in a still-air
environment to eliminate thermocouple effects on the leads. The test time
is 10 sec. RMS noise is measured with a single highpass fi lter at 10Hz and
The denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. VIN = VOUT + 2.5V, IOUT = 0 unless otherwise specifi ed.
ELECTRICAL CHARACTERISTICS
a 2-pole lowpass fi lter at 1kHz. The resulting output is full wave rectifi ed
and then integrated for a fi xed period, making the fi nal reading an average
as opposed to RMS. A correction factor of 1.1 is used to convert from
average to RMS and a second correction of 0.88 is used to correct for the
nonideal pass band of the fi lters.
Note 8: Long-term stability typically has a logarithmic characteristic and
therefore, changes after 1000 hours tend to be much smaller than before
that time. Total drift in the second thousand hours is normally less than
one third that of the fi rst thousand hours with a continuing trend toward
reduced drift with time. Signifi cant improvement in long-term drift can
be realized by preconditioning the IC with a 100 hour to 200 hour, 125°C
burn-in. Long-term stability will also be affected by differential stresses
between the IC and the board material created during board assembly. See
PC Board Layout in the Applications Information section.
Note 9: Hysteresis in output voltage is created by package stress that
differs depending on whether the IC was previously at a higher or lower
temperature. Output voltage is always measured at 25°C, but the IC is
cycled to 85°C or –40°C before successive measurements. Hysteresis
is roughly proportional to the square of the temperature change. For
instruments that are stored at reasonably well-controlled temperatures
(within 20 or 30 degrees of operating temperature) hysteresis is generally
not a problem.
LT1460
8
1460f
IOUT = 10mA
LOAD CAPACITANCE (µF)
10
1
0.1
0
1460 G09
INPUT VOLTAGE (V)
0
175
150
125
100
75
50
25
0
15
1460 G05
510 20
SUPPLY CURRENT (µA)
125°C
25°C
–55°C
TEMPERATURE (°C)
–50
OUTPUT VOLTAGE (V)
2.503
2.502
2.501
2.500
2.499
2.498
–25 02550
1460 G04
75 100
3 TYPICAL PARTS
OUTPUT CURRENT (mA)
0 0.5
OUTPUT VOLTAGE CHANGE (mV)
1.0 1.5
1460 G03
80
70
60
50
40
30
20
10
0
–55°C
125°C
25°C
OUTPUT CURRENT (mA)
0.1
OUTPUT VOLTAGE CHANGE (mV)
6
5
4
3
2
1
01 10 100
1460 G02
125°C
25°C
–55°C
INPUT-OUTPUT VOLTAGE (V)
0
OUTPUT CURRENT (mA)
100
10
1
0.1
1.00.5 1.5 2.0 2.5
1460 G01
125°C
–55°C
25°C
INPUT VOLTAGE (V)
0
OUTPUT VOLTAGE (V)
4810 20
1460 G06
26 12 14 16 18
2.5014
2.5010
2.5006
2.5002
2.4998
2.4994
2.4990
125°C
25°C
–55°C
FREQUENCY (Hz)
POWER SUPPLY REJECTION RATIO (dB)
90
80
70
60
50
40
30
20
10
0
–10
100 10k 100k 1M
1460 G07
1k
FREQUENCY (Hz)
10
OUTPUT IMPEDANCE ()
1k
100
10
1
1k100 10k 100k 1M
1460 G08
CL = 0
CL= 0.1µF
CL= 1µF
2.5V Minimum Input-Output
Voltage Differential 2.5V Load Regulation, Sourcing 2.5V Load Regulation, Sinking
2.5V Output Voltage
Temperature Drift
2.5V Supply Current vs Input
Voltage 2.5V Line Regulation
2.5V Power Supply Rejection
Ratio vs Frequency
2.5V Output Impedance vs
Frequency 2.5V Transient Responses
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LT1460-2.5 (N8, S8, MS8, Z Packages)
LT1460
9
1460f
TEMPERATURE (°C)
–50
OUTPUT VOLTAGE (V)
5.004
5.002
5.000
4.998
4.996
4.994
–25 02550
1460 G16
75 100
3 TYPICAL PARTS
INPUT VOLTAGE (V)
0
200
180
160
140
120
100
80
60
40
20
0
1460 G17
1642610812141820
SUPPLY CURRENT (µA)
125°C
–55°C
25°C
INPUT VOLTAGE (V)
0
OUTPUT VOLTAGE (V)
4810 20
1460 G18
26 12 14 16 18
5.002
5.000
4.998
4.996
4.994
4.992
125°C
25°C
–55°C
INPUT-OUTPUT VOLTAGE (V)
0
OUTPUT CURRENT (mA)
100
10
1
0.1
1.00.5 1.5 2.0 2.5
1460 G13
125°C
–55°C
25°C
OUTPUT CURRENT (mA)
0.1
OUTPUT VOLTAGE CHANGE (mV)
6
5
4
3
2
1
01 10 100
1460 G14
125°C25°C
–55°C
FREQUENCY (Hz)
100
1000
10 1k 10k
1460 G10
100 100k
NOISE VOLTAGE (nV/Hz)
TIME (SEC)
012345 678910
OUTPUT NOISE (10µV/DIV)
1460 G11
TIME (HOURS)
0
OUTPUT VOLTAGE (V)
2.5000
2.4998
2.4996
2.4994
2.4992
2.4990 800
1460 G12
200 400 600 1000
2.5V Output Voltage Noise
Spectrum 2.5V Output Noise 0.1Hz to 10Hz
2.5V Long-Term Drift
Three Typical Parts (S8 Package)
5V Minimum Input-Output Voltage
Differential 5V Load Regulation, Sourcing 5V Load Regulation, Sinking
5V Output Voltage
Temperature Drift
5V Supply Current vs Input
Voltage 5V Line Regulation
TYPICAL PERFOR A CE CHARACTERISTICS
UW
OUTPUT CURRENT (mA)
012
OUTPUT VOLTAGE CHANGE (mV)
345
1460 G15
100
90
80
70
60
50
40
30
20
10
0
25°C
–55°C
125°C
LT1460-5 (N8, S8, MS8, Z Packages)
LT1460
10
1460f
OUTPUT CURRENT (mA)
0.1
4
OUTPUT VOLTAGE CHANGE (mV)
5
6
7
8
1 10 100
1460 G25
3
2
1
0
9
10
–55°C
25°C125°C
INPUT/OUTPUT VOLTAGE (V)
0
0.1
OUTPUT CURRENT (mA)
100
0.5 1.0 1.5 2.0 2.5
1460 G24
10
1–55°C
125°C
25°C
OUTPUT CURRENT (mA)
0
OUTPUT VOLTAGE CHANGE (mV)
60
80
100
4
1460 G26
40
20
50
70
90
30
10
01235
–55°C125°C
25°C
FREQUENCY (Hz)
POWER SUPPLY REJECTION RATIO (dB)
90
80
70
60
50
40
30
20
10
0
100 10k 100k 1M
1460 G19
1k
FREQUENCY (Hz)
10
OUTPUT IMPEDANCE ()
1k
100
10
1
0.1
1k100 10k 100k 1M
1460 G20
CL = 0
CL= 0.1µF
CL= 1µF
IOUT = 10mA
0.2ms/DIV
LOAD CAPACITANCE (µF)
10
1
0.1
0
1460 G21
FREQUENCY (Hz)
100
1000
2000
3000
10 1k 10k
1460 G22
100 100k
NOISE VOLTAGE (nV/Hz)
TIME (SEC)
012345 678910
OUTPUT NOISE (10µV/DIV)
1460 G23
5V Power Supply Rejection Ratio
vs Frequency
5V Output Impedance vs
Frequency 5V Transient Responses
5V Output Voltage Noise
Spectrum 5V Output Noise 0.1Hz to 10Hz
10V Minimum Input/Output
Voltage Differential 10V Load Regulation, Sourcing 10V Load Regulation, Sinking
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LT1460-10 (N8, S8, MS8, Z Packages)
LT1460-5 (N8, S8, MS8, Z Packages)
LT1460
11
1460f
FREQUENCY (kHz)
0.01
0.1
1
10
1100.1 100
1460 G33
NOISE VOLTAGE (µV/Hz)
TIME (SEC)
0
OUTPUT NOISE (50µV/DIV)
8
1460 G34
24610 12 14
INPUT FREQUENCY (kHz)
20
POWER SUPPLY REJECTION RATIO (dB)
40
60
50
80
100
10
30
70
90
0.1 10 100 1000
1460 G30
0
1
FREQUENCY (kHz)
1
OUTPUT IMPEDANCE ()
10
100
1000
0.01 1 10 100
0.1
0.1 1000
1460 G31
CL = 0µF
CL = 1µF
CL = 0.1µF
IOUT = 10mA
200µs/DIV
LOAD CAPACITANCE (µF)
10
1
0.1
0
1460 G32
TEMPERATURE (°C)
–50
9.982
OUTPUT VOLTAGE (V)
9.986
9.990
9.994
9.998
10.006
–25 02550
1460 G27
75 100
10.002
3 TYPICAL PARTS
INPUT VOLTAGE (V)
0
SUPPLY CURRENT (µA)
240
320
400
16
1460 G28
160
80
200
280
360
120
40
04812
218
610 14 20
–55°C
125°C
25°C
INPUT VOLTAGE (V)
6
9.980
OUTPUT VOLTAGE (V)
9.984
9.988
9.992
9.996
10.004
10 14 18
1460 G29
812 16 20
10.000
–55°C
125°C
25°C
10V Output Voltage
Temperature Drift
10V Supply Current vs Input
Voltage 10V Line Regulation
10V Power Supply Rejection
Ratio vs Frequency
10V Output Impedance vs
Frequency 10V Transient Responses
10V Output Voltage Noise
Spectrum 10V Output Noise 0.1Hz to 10Hz
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LT1460
12
1460f
TEMPERATURE (°C)
–50
OUTPUT VOLTAGE (V)
2.501
2.502
2.503
25 75
1460 G38
2.500
2.499
–25 0 50 100 125
2.498
2.497
THREE TYPICAL PARTS
INPUT VOLTAGE (V)
0
SUPPLY CURRENT (µA)
100
150
125°C
25°C
–55°C
20
1460 G39
50
0510 15
250
200
INPUT VOLTAGE (V)
0
OUTPUT VOLTAGE (V)
2.502
2.501
2.500
2.499
2.498
2.497
2.496
2.495
2.494
16
1460 G40
4 8 12 20142 6 10 18
25°C
125°C
–55°C
INPUT-OUTPUT VOLTAGE (V)
0
0.1
OUTPUT CURRENT (mA)
10 125°C
25°C
100
0.5 1.0 1.5 2.0 2.5
1460 G35
1–55°C
OUTPUT CURRENT (mA)
0.1
2.0
OUTPUT VOLTAGE CHANGE (mV)
1.0
0
1 10 100
1460 G36
3.0
2.5
1.5
0.5
3.5
4.0
–55°C
25°C
125°C
OUTPUT CURRENT (mA)
0
0
OUTPUT VOLTAGE CHANGE (mV)
20
40
60
80
100
120
1234
–55°C
1460 G37
5
125°C
25°C
FREQUENCY (kHz)
20
POWER SUPPLY REJECTION RATIO (dB)
40
50
70
80
0.1 10 100 1000
1460 G41
0
1
60
30
10
FREQUENCY (kHz)
1
OUTPUT IMPEDANCE ()
10
100
1000
0.01 1 10 100
0.1
0.1 1000
1460 G42
CL = 0µF
CL = 0.1µF
CL = 1µF
CLOAD = 0µF
200µs/DIV
LOAD CURRENT (mA)
10
20
1
0.1
1460 G43
Characteristic curves are similar for all voltage
options of the LT1460S3. Curves from the LT1460S3-2.5 and the LT1460S3-10 represent the extremes of the voltage options.
Characteristic curves for other output voltages fall between these curves, and can be estimated based on their voltage output.
LT1460S3-2.5V Minimum Input-
Output Voltage Differential
LT1460S3-2.5V Load Regulation,
Sourcing
LT1460S3-2.5V Load Regulation,
Sinking
LT1460S3-2.5V Output Voltage
Temperature Drift
LT1460S3-2.5V Supply Current
vs Input Voltage LT1460S3-2.5V Line Regulation
LT1460S3-2.5V Power Supply
Rejection Ratio vs Frequency
LT1460S3-2.5V Output Impedance
vs Frequency
LT1460S3-2.5V Transient
Response
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LT1460
13
1460f
OUTPUT CURRENT (mA)
0.1
15
OUTPUT VOLTAGE CHANGE (mV)
20
25
30
35
1 10 100
1460 G47
10
5
–5
–10
0
125°C 25°C
–55°C
OUTPUT CURRENT (mA)
0
OUTPUT VOLTAGE CHANGE (mV)
150
200
250
4
1460 G48
100
50
01235
125°C
–55°C
25°C
TEMPERATURE (°C)
–50
OUTPUT VOLTAGE (V)
10.002
10.004
10.006
050 75
1460 G49
9.998
10.000
9.996
9.994
9.992
9.990
9.988
9.986
9.984
9.982
–25 25 100 125
THREE TYPICAL PARTS
FREQUENCY (Hz)
100
1000
10 1k 10k
1460 G44
100 100k
NOISE VOLTAGE (nV/Hz)
TIME (2 SEC/DIV)
OUTPUT NOISE (20µV/DIV)
1460 G45
INPUT-OUTPUT VOLTAGE (V)
0
0.1
OUTPUT CURRENT (mA)
10 125°C
25°C
100
0.5 1.0 1.5 2.0 2.5
1460 G46
1–55°C
INPUT VOLTAGE (V)
0
0
SUPPLY CURRENT (µA)
50
150
200
250
350
210 14
1460 G50
100
300
818 20
4612 16
125°C
–55°C
25°C
INPUT VOLTAGE (V)
6
OUTPUT VOLTAGE (V)
10.000
10.005
10.010
12 16
1460 G51
9.995
9.990
810 14 18 20
9.985
9.980
125°C
–55°C
25°C
Characteristic curves are similar for all voltage
options of the LT1460S3. Curves from the LT1460S3-2.5 and the LT1460S3-10 represent the extremes of the voltage options.
Characteristic curves for other output voltages fall between these curves, and can be estimated based on their voltage output.
LT1460S3-2.5V Output Voltage
Noise Spectrum
LT1460S3-2.5V Output Noise
0.1Hz to 10Hz
LT1460S3-10V Minimum Input-
Output Voltage Differential
LT1460S3-10V Load Regulation,
Sourcing
LT1460S3-10V Load Regulation,
Sinking
LT1460S3-10V Output Voltage
Temperature Drift
LT1460S3-10V Supply Current
vs Input Voltage LT1460S3-10V Line Regulation
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LT1460
14
1460f
FREQUENCY (kHz)
0.01
0.1
1
10
1100.1 100
1460 G55
NOISE VOLTAGE (µV/Hz)
TIME (2 SEC/DIV)
OUTPUT NOISE (20µV/DIV)
1460 G56
FREQUENCY (kHz)
30
POWER SUPPLY REJECTION RATIO (dB)
90
100
20
10
80
50
70
60
40
0.1 10 100 1000
1460 G52
0
1
FREQUENCY (kHz)
1
OUTPUT IMPEDANCE ()
10
100
1000
0.01 1 10 100
0.1
0.1 1000
1460 G53
CL = 0µF
CL = 0.1µF
CL = 1µF
CLOAD = 0µF
200µs/DIV
LOAD CURRENT (mA)
10
20
1
0.1
1460 G54
Characteristic curves are similar for all voltage
options of the LT1460S3. Curves from the LT1460S3-2.5 and the LT1460S3-10 represent the extremes of the voltage options.
Characteristic curves for other output voltages fall between these curves, and can be estimated based on their voltage output.
LT1460S3-10V Power Supply
Rejection Ratio vs Frequency
LT1460S3-10V Output Impedance
vs Frequency
LT1460S3-10V Transient
Response
LT1460S3-10V Output Voltage
Noise Spectrum
LT1460S3-10V Output Noise
0.1Hz to 10Hz
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LT1460
15
1460f
APPLICATIO S I FOR ATIO
WUUU
Longer Battery Life
Series references have a large advantage over older shunt
style references. Shunt references require a resistor from
the power supply to operate. This resistor must be chosen
to supply the maximum current that can ever be demanded
by the circuit being regulated. When the circuit being
controlled is not operating at this maximum current, the
shunt reference must always sink this current, resulting
in high dissipation and short battery life.
The LT1460 series reference does not require a current set-
ting resistor and can operate with any supply voltage from
VOUT + 0.9V to 20V. When the circuitry being regulated does
not demand current, the LT1460 reduces its dissipation and
battery life is extended. If the reference is not delivering load
current it dissipates only a few mW, yet the same confi gura-
tion can deliver 20mA of load current when demanded.
Capacitive Loads
The LT1460 is designed to be stable with capacitive loads.
With no capacitive load, the reference is ideal for fast set-
tling, applications where PC board space is a premium,
or where available capacitance is limited.
The test circuit for the LT1460-2.5 shown in Figure 1 is
used to measure the response time for various load cur-
rents and load capacitors. The 1V step from 2.5V to 1.5V
produces a current step of 1mA or 100µA for RL = 1k or
RL = 10k. Figure 2 shows the response of the reference
with no load capacitance.
The reference settles to 2.5mV (0.1%) in less than 1µs
for a 100µA pulse and to 0.1% in 1.5µs with a 1mA step.
When load capacitance is greater than 0.01µF, the refer-
ence begins to ring due to the pole formed with the output
impedance. Figure 3 shows the response of the reference
to a 1mA and 100µA load current step with a 0.01µF load
capacitor. The ringing can be greatly reduced with a DC
load as small as 200µA. With large output capacitors, ≥
Figure 5. Effect of RS for CL = 1µF
Figure 1. Response Time Test Circuit
Figure 2. CL = 0
Figure 3. CL = 0.01µF
Figure 4. Isolation Resistor Test Circuit
LT1460-2.5
RL
VOUT
VGEN
1460 F01
CIN
0.1µF
2.5V
1.5V
CL
VIN = 5V
LT1460-2.5
RL
VGEN
1460 F04
CIN
0.1µF
2.5V
1.5V
CL
VIN = 5V
VOUT
RS
1µs/DIV
2.5V
1.5V
RL = 10k
RL = 1k
1460 F02
VGEN
VOUT
VOUT
20µs/DIV
VGEN
VOUT
VOUT
2.5V
1.5V
RL = 10k
RL = 1k
1460 F03
0.1ms/DIV
2.5V
1.5V
RL = 1k
RS = 0
RL = 1k
RS = 2
1460 F05
VGEN
VOUT
VOUT
1µF, the ringing can be reduced with a small resistor in
series with the reference output as shown in Figure 4.
Figure 5 shows the response of the LT1460-2.5 with a
LT1460
16
1460f
LT1460-5
RL
VOUT
VGEN
1460 F06
CIN
0.1µF
5V
4V
CL
VIN = 5V
2µs/DIV
5V
4V
RL = 10k
RL = 1k
1460 F07
VGEN
VOUT
VOUT
10µs/DIV
5V
4V
RL = 10k
RL = 1k
1460 F08
VGEN
VOUT
VOUT
APPLICATIO S I FOR ATIO
WUUU
RS = 2Ω and CL = 1µF. RS should not be made arbitrarily
large because it will limit the load regulation.
Figure 6 to Figure 8 illustrate response in the LT1460-5.
The 1V step from 5V to 4V produces a current step of
1mA or 100µA for RL = 1k or RL = 10k. Figure 7 shows
the response of the reference with no load capacitance.
The reference settles to 5mV (0.1%) in less than 2µs for
a 100µA pulse and to 0.1% in 3µs with a 1mA step. When
load capacitance is greater than 0.01µF, the reference begins
to ring due to the pole formed with the output impedance.
Figure 8 shows the response of the reference to a 1mA
Figure 6. Response Time Test Circuit
Figure 8. CL = 0.01µF
Figure 7. CL = 0
and 100µA load current step with a 0.01µF load capacitor.
Figure 9 to Figure 11 illustrate response of the LT1460-10.
The 1V step from 10V to 9V produces a current step of
1mA or 100µA for RL = 1k or RL = 10k. Figure 10 shows
the response of the reference with no load capacitance.
The reference settles to 10mV (0.1%) in 0.4µs for a 100µA
pulse and to 0.1% in 0.8µs with a 1mA step. When load
capacitance is greater than 0.01µF, the reference begins
to ring due to the pole formed with the output impedance.
Figure 11 shows the response of the reference to a 1mA and
100µA load current step with a 0.01µF load capacitor.
Figure 11. CL = 0.01µF
Figure 10. CL = 0
Figure 9. Response Time Test Circuit
LT1460-10
RL
VOUT
VGEN
1460 F09
CIN
0.1µF
10V
9V
CL
VIN = 12.5V
2µs/DIV
10V
9V
RL = 10k
RL = 1k
1460 F10
VGEN
VOUT
VOUT
10µs/DIV
10V
9V
RL = 10k
RL = 1k
1460 F11
VGEN
VOUT
VOUT
LT1460
17
1460f
APPLICATIO S I FOR ATIO
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Table 1 gives the maximum output capacitance for vari-
ous load currents and output voltages to avoid instability.
Load capacitors with low ESR (effective series resistance)
cause more ringing than capacitors with higher ESR such
as polarized aluminum or tantalum capacitors.
Table 1. Maximum Output Capacitance
VOLTAGE
OPTION IOUT = 100µA IOUT = 1mA IOUT = 10mA IOUT = 20mA
2.5V >10µF >10µF 2µF 0.68µF
3V >10µF >10µF 2µF 0.68µF
3.3V >10µF >10µF 1µF 0.68µF
5V >10µF >10µF 1µF 0.68µF
10V >10µF 1µF 0.15µF 0.1µF
Long-Term Drift
Long-term drift cannot be extrapolated from accelerated
high temperature testing. This erroneous technique gives
drift numbers that are wildly optimistic. The only way
long-term drift can be determined is to measure it over
the time interval of interest. The LT1460S3 long-term
drift data was taken on over 100 parts that were soldered
into PC boards similar to a “real world” application. The
boards were then placed into a constant temperature oven
with TA = 30°C, their outputs were scanned regularly and
measured with an 8.5 digit DVM. Figure 12 shows typical
long-term drift of the LT1460S3s.
Hysteresis
Hysteresis data shown in Figure 13 and Figure 14 represents
the worst-case data taken on parts from 0°C to 70°C and
from –40°C to 85°C. The device is capable of dissipating
relatively high power, i.e., for the LT1460S3-2.5, PD =
17.5V • 20mA = 350mW. The thermal resistance of the
SOT-23 package is 325°C/W and this dissipation causes
a 114°C internal rise producing a junction temperature of
TJ = 25°C + 114°C = 139°C. This elevated temperature will
cause the output to shift due to thermal hysteresis. For
highest performance in precision applications, do not
let the LT1460S3’s junction temperature exceed 85°C.
Figure 12. Typical Long-Term Drift
Figure 13. 0°C to 70°C Hysteresis
Figure 14. –40°C to 85°C Hysteresis
HOURS
–150
ppm
–50
50
150
–100
0
100
200 400 600 800
1460 F12
10001000 300 500 700 900
HYSTERESIS (ppm)
–240 –160 80 0
NUMBER OF UNITS
870°C TO 25°C0°C TO 25°C
10
12
1460 F13
6
4
80 160
–200 –120 40 40 120 200
2
0
18
16
14
240
WORST-CASE HYSTERESIS
ON 40 UNITS
HYSTERESIS (ppm)
600 400 200 0
NUMBER OF UNITS
4
85°C TO 25°C–40°C TO 25°C
5
6
1460 F14
3
2
200 400
500 300 100 100 300 500
1
0
9
8
7
600
WORST-CASE HYSTERESIS
ON 34 UNITS
LT1460
18
1460f
APPLICATIO S I FOR ATIO
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Input Capacitance
It is recommended that a 0.1µF or larger capacitor be
added to the input pin of the LT1460. This can help with
stability when large load currents are demanded.
Output Accuracy
Like all references, either series or shunt, the error budget of
the LT1460-2.5 is made up of primarily three components:
initial accuracy, temperature coeffi cient and load regulation.
Line regulation is neglected because it typically contrib-
utes only 30ppm/V, or 75µV for a 1V input change. The
LT1460-2.5 typically shifts less than 0.01% when soldered
into a PCB, so this is also neglected (see PC Board Layout
section). The output errors are calculated as follows for a
100µA load and 0°C to 70°C temperature range:
LT1460AC
Initial accuracy = 0.075%
For IO = 100µA, and using the LT1460-2.5 for calculation,
Vppm
mA mA V V
OUT =
()()
=
3500 01 25 875.. µ
which is 0.035%.
For temperature 0°C to 70°C the maximum ΔT = 70°C,
Vppm
CCV mV
OUT =°
°
()()
=
10 70 25 175..
which is 0.07%.
Total worst-case output error is:
0.075% + 0.035% + 0.070% = 0.180%.
Table 1 gives worst-case accuracy for the LT1460AC, CC,
DC, FC, GC from 0°C to 70°C and the LT1460BI, EI, GI
from –40°C to 85°C.
Note that the LT1460-5 and LT1460-10 give identical ac-
curacy as a fraction of their respective output voltages.
PC Board Layout
In 13- to 16-bit systems where initial accuracy and tem-
perature coeffi cient calibrations have been done, the me-
chanical and thermal stress on a PC board (in a cardcage
for instance) can shift the output voltage and mask the
true temperature coeffi cient of a reference. In addition,
the mechanical stress of being soldered into a PC board
can cause the output voltage to shift from its ideal value.
Surface mount voltage references (MS8 and S8) are the
most susceptible to PC board stress because of the small
amount of plastic used to hold the lead frame.
A simple way to improve the stress-related shifts is to
mount the reference near the short edge of the PC board,
or in a corner. The board edge acts as a stress boundary,
or a region where the fl exure of the board is minimum.
The package should always be mounted so that the leads
absorb the stress and not the package. The package is
generally aligned with the leads parallel to the long side
of the PC board as shown in Figure 16a.
A qualitative technique to evaluate the effect of stress on
voltage references is to solder the part into a PC board and
Table 1. Worst-Case Output Accuracy Over Temperature
IOUT LT1460AC LT1460BI LT1460CC LT1460DC LT1460EI LT1460FC LT1460GC LT1460GI LT1460HC LT1460JC LT1460KC
0 0.145% 0.225% 0.205% 0.240% 0.375% 0.325% 0.425% 0.562% 0.340% 0.540% 0.850%
100µA 0.180% 0.260% 0.240% 0.275% 0.410% 0.360% 0.460% 0.597% 0.380% 0.580% 0.890%
10mA 0.325% 0.405% 0.385% 0.420% 0.555% 0.505% 0.605% 0.742% 0.640% 0.840% 1.15%
20mA 0.425% N/A 0.485% 0.520% N/A 0.605% 0.705% N/A 0.540% 0.740% 1.05%
LT1460
19
1460f
1
2
3
41460 F15
LONG DIMENSION
2
1
0
040
3020
FLEXURE NUMBER
10
1460 F16a
–1
OUTPUT DEVIATION (mV)
FLEXURE NUMBER 1460 F16b
LONG DIMENSION
2
1
0
040
302010
–1
OUTPUT DEVIATION (mV)
APPLICATIO S I FOR ATIO
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deform the board a fi xed amount as shown in Figure 15.
The fl exure #1 represents no displacement, fl exure #2 is
concave movement, fl exure #3 is relaxation to no displace-
ment and fi nally, fl exure #4 is a convex movement. This
motion is repeated for a number of cycles and the relative
output deviation is noted. The result shown in Figure 16a
is for two LT1460S8-2.5s mounted vertically and Figure
16b is for two LT1460S8-2.5s mounted horizontally. The
parts oriented in Figure 16a impart less stress into the
package because stress is absorbed in the leads. Figures
16a and 16b show the deviation to be between 125µV and
Figure 15. Flexure Numbers
Figure 16b. Two Typical LT1460S8-2.5s, Horizontal
Orientation Without Slots
Figure 16a. Two Typical LT1460S8-2.5s, Vertical
Orientation Without Slots
250µV and implies a 50ppm and 100ppm change respec-
tively. This corresponds to a 13- to 14-bit system and is
not a problem for most 10- to 12-bit systems unless the
system has a calibration. In this case, as with temperature
hysteresis, this low level can be important and even more
careful techniques are required.
The most effective technique to improve PC board stress
is to cut slots in the board around the reference to serve
as a strain relief. These slots can be cut on three sides of
the reference and the leads can exit on the fourth side. This
“tongue” of PC board material can be oriented in the long
direction of the board to further reduce stress transferred
to the reference.
The results of slotting the PC boards of Figures 16a and
16b are shown in Figures 17a and 17b. In this example
the slots can improve the output shift from about 100ppm
to nearly zero.
SLOT
2
1
0
040
3020
FLEXURE NUMBER
10
1460 F17a
–1
OUTPUT DEVIATION (mV)
SLOT
2
1
0
040
3020
FLEXURE NUMBER
10
1460 F17b
–1
OUTPUT DEVIATION (mV)
Figure 17a. Same Two LT1460S8-2.5s in Figure 16a,
but with Slots
Figure 17b. Same Two LT1460S8-2.5s in Figure 16b,
but with Slots
LT1460
20
1460f
SIMPLIFIED SCHEMATIC
VCC
VOUT
GND
1460 SS
LT1460
21
1460f
S3 Package
3-Lead Plastic SOT-23
(Reference LTC DWG # 05-08-1631)
PACKAGE DESCRIPTIO
U
1.20 – 1.40
(.047 – .060)
2.10 – 2.64
(.083 – .104)
2.74
1.92
0.96 BSC
RECOMMENDED SOLDER PAD LAYOUT
0.764
0.8 ±0.127
0.37 – 0.51
(.015 – .020)
0.09 – 0.18
(.004 – .007) S3 SOT-23 0502
2.80 – 3.04
(.110 – .120)
0.89 – 1.03
(.035 – .041)
0.89 – 1.12
(.035 – .044)
0.01 – 0.10
(.0004 – .004)
0.45 – 0.60
(.017 – .024)
0.55
(.022)
REF
1.78 – 2.05
(.070 – .081)
MILLIMETERS
(INCHES)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
4. DIMENSIONS ARE INCLUSIVE OF PLATING
5. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
6. MOLD FLASH SHALL NOT EXCEED .254mm
7. PACKAGE JEDEC REFERENCE IS TO-236 VARIATION AB
LT1460
22
1460f
PACKAGE DESCRIPTIO
U
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
N8 Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
N8 1002
.065
(1.651)
TYP
.045 – .065
(1.143 – 1.651)
.130 ± .005
(3.302 ± 0.127)
.020
(0.508)
MIN
.018 ± .003
(0.457 ± 0.076)
.120
(3.048)
MIN
12 34
87 65
.255 ± .015*
(6.477 ± 0.381)
.400*
(10.160)
MAX
.008 – .015
(0.203 – 0.381)
.300 – .325
(7.620 – 8.255)
.325 +.035
–.015
+0.889
0.381
8.255
()
NOTE:
1. DIMENSIONS ARE INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
.100
(2.54)
BSC
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)× 45°
0°– 8° TYP
.008 – .010
(0.203 – 0.254)
SO8 0303
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
1234
.150 – .157
(3.810 – 3.988)
NOTE 3
8765
.189 – .197
(4.801 – 5.004)
NOTE 3
.228 – .244
(5.791 – 6.197)
.245
MIN .160 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
.050 BSC
.030 ±.005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
LT1460
23
1460f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
MSOP (MS8) 0204
0.53 ± 0.152
(.021 ± .006)
SEATING
PLANE
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.18
(.007)
0.254
(.010)
1.10
(.043)
MAX
0.22 – 0.38
(.009 – .015)
TYP
0.127 ± 0.076
(.005 ± .003)
0.86
(.034)
REF
0.65
(.0256)
BSC
0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
12
34
4.90 ± 0.152
(.193 ± .006)
8765
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
0.52
(.0205)
REF
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.889 ± 0.127
(.035 ± .005)
RECOMMENDED SOLDER PAD LAYOUT
0.42 ± 0.038
(.0165 ± .0015)
TYP
0.65
(.0256)
BSC
PACKAGE DESCRIPTIO
U
Z Package
3-Lead Plastic TO-92 (Similar to TO-226)
(Reference LTC DWG # 05-08-1410)
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660)
.050
(1.27)
BSC
.060 ± .005
(1.524± 0.127)
DIA
.90
(2.286)
NOM
.180 ± .005
(4.572 ± 0.127)
.180 ± .005
(4.572 ± 0.127)
.500
(12.70)
MIN
.050
(1.270)
MAX
UNCONTROLLED
LEAD DIMENSION
.016 ± .003
(0.406 ± 0.076)
5°
NOM
.015 ± .002
(0.381 ± 0.051)
.060 ± .010
(1.524 ± 0.254)
10° NOM
.140 ± .010
(3.556 ± 0.127)
Z3 (TO-92) 0801
321
.098 +.016/–.04
(2.5 +0.4/–0.1)
2 PLCS
TO-92 TAPE AND REEL
REFER TO TAPE AND REEL SECTION OF
LTC DATA BOOK FOR ADDITIONAL INFORMATION
LT1460
24
1460f
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2006
LT 0106 • PRINTED IN USA
TYPICAL APPLICATIONS
RELATED PARTS
Handling Higher Load Currents
Boosted Output Current with No Current Limit Boosted Output Current with Current Limit
PART NUMBER DESCRIPTION COMMENTS
LT1019 Precision Bandgap Reference 0.05% Max, 5ppm/°C Max
LT1027 Precision 5V Reference 0.02%, 2ppm/°C Max
LT1236 Precision Low Noise Reference 0.05% Max, 5ppm/°C Max, SO Package
LT1461 Micropower Precision Low Dropout 0.04% Max, 3ppm/°C Max, 50mA Output Current
LT1634 Micropower Precision Shunt Reference 1.25V, 2.5V Output 0.05%, 25ppm/°C Max
LT1790 Micropower Precision Series References 0.05% Max, 10ppm/°C Max, 60µA Supply, SOT23 Package
LTC
®
1798 Micropower Low Dropout Reference, Fixed or Adjustable 0.15% Max, 40ppm/°C, 6.5µA Max Supply Current
LT6660 Tiny Micropower Precision Series References 0.075% Max, 10ppm/°C Max, 20mA Output, 2mm × 2mm DFN Package
1460 TA03
RL
40mA
V+
R1*
VOUT
TYPICAL LOAD
CURRENT = 50mA
SELECT R1 TO DELIVER 80% OF TYPICAL LOAD CURRENT.
LT1460 WILL THEN SOURCE AS NECESSARY TO MAINTAIN
PROPER OUTPUT. DO NOT REMOVE LOAD AS OUTPUT WILL
BE DRIVEN UNREGULATED HIGH. LINE REGULATION IS
DEGRADED IN THIS APPLICATION
*
10mA
47µF
+
LT1460
OUT
GND
IN
R1 = V+ – VOUT
40mA
V+ (VOUT + 1.8V)
LT1460
OUT
GND
IN
1460 TA04
2N2905
VOUT
100mA
47µF
2µF
SOLID
TANT
R1
220
+
+
1460 TA05
2N2905
VOUT
100mA
2µF
SOLID
TANT
D1*
LED
V+ VOUT + 2.8V
8.2
R1
220
GLOWS IN CURRENT LIMIT,
DO NOT OMIT
*
47µF
+
+
LT1460
OUT
GND
IN