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FCPF4300N80Z — N-Channel SuperFET® II MOSFET
©2014 Fairchild Semiconductor Corporation
FCPF4300N80Z Rev. 1.1
www.fairchildsemi.com
1
August 2015
FCPF4300N80Z
N-Channel SuperFET® II MOSFET
800 V, 2.2 A, 4.3 Ω
Features
•R
DS(on) = 3.4 Ω (Typ.)
• Ultra Low Gate Charge (Typ. Qg = 6.8 nC)
•Low E
oss (Typ. 0.8 uJ @ 400V)
• Low Effective Output Capacitance (Typ. Coss(eff.) = 36 pF)
• 100% Avalanche Tested
•RoHS Compliant
• ESD Improved Capability
Applications
• AC - DC Power Supply
• LED Lighting
Description
SuperFET® II MOSFET is Fairchild Semiconductor’s brand-new
high voltage super-junction (SJ) MOSFET family that is utilizing
charge balance technology for outstanding low on-resistance
and lower gate charge performance. This technology is tailored
to minimize conduction loss, provide superior switching
performance, dv/dt rate and higher avalanche energy. Conse-
quently, SuperFET II MOSFET is very suitable for the switching
power applications such as Audio, Laptop adapter, Lighting,
ATX power and industrial power applications.
TO-220F
GDS
G
D
S
Absolute Maximum Ratings TC = 25oC unless otherwise noted.
Thermal Characteristics
Symbol Parameter FCPF4300N80Z Unit
VDSS Drain to Source Voltage 800 V
VGSS Gate to Source Voltage - DC ±20 V
- AC (f > 1 Hz) ±30
IDDrain Current - Continuous (TC = 25oC) 2.2* A
- Continuous (TC = 100oC) 1.4*
IDM Drain Current - Pulsed (Note 1) 3.2* A
EAS Single Pulsed Avalanche Energy (Note 2) 8.2 mJ
IAR Avalanche Current (Note 1) 0.32 A
EAR Repetitive Avalanche Energy (Note 1) 0.19 mJ
dv/dt MOSFET dv/dt 100 V/ns
Peak Diode Recovery dv/dt (Note 3) 20
PDPower Dissipation (TC = 25oC) 19.2 W
- Derate Above 25oC0.15W/
oC
TJ, TSTG Operating and Storage Temperature Range -55 to +150 oC
TLMaximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds 300 oC
Symbol Parameter FCPF4300N80Z Unit
RθJC Thermal Resistance, Junction to Case, Max. 6.5 oC/W
RθJA Thermal Resistance, Junction to Ambient, Max. 62.5
*Drain current limited by maximum junction temperature, with heatsink.
FCPF4300N80Z — N-Channel SuperFET® II MOSFET
©2014 Fairchild Semiconductor Corporation
FCPF4300N80Z Rev. 1.1
www.fairchildsemi.com
2
Package Marking and Ordering Information
Electrical Characteristics TC = 25oC unless otherwise noted.
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity
FCPF4300N80Z FCPF4300N80Z TO-220F Tube N/A N/A 50 units
Symbol Parameter Test Conditions Min. Typ. Max. Unit
BVDSS Drain to Source Breakdown Voltage VGS = 0 V, ID = 1 mA, TJ = 25°C 800 - - V
ΔBVDSS
/ ΔTJ
Breakdown Voltage Temperature
Coefficient ID = 1 mA, Referenced to 25oC - 0.85 - V/oC
IDSS Zero Gate Voltage Drain Current VDS = 800 V, VGS = 0 V - - 25 μA
VDS = 640 V, VGS = 0 V, TC = 125oC- - 250
IGSS Gate to Body Leakage Current VGS = ±20 V, VDS = 0 V - - ±10 μA
VGS(th) Gate Threshold Voltage VGS = VDS, ID = 0.16 mA 2.5 - 4.5 V
RDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 0.8 A - 3.4 4.3 Ω
gFS Forward Transconductance VDS = 20 V, ID = 0.8 A -0.52- S
Ciss Input Capacitance VDS = 100 V, VGS = 0 V,
f = 1 MHz
- 267 355 pF
Coss Output Capacitance - 12 16 pF
Crss Reverse Transfer Capacitance - 0.78 - pF
Coss Output Capacitance VDS = 480 V, VGS = 0 V, f = 1 MHz - 6.2 - pF
Coss(eff.) Effective Output Capacitance VDS = 0 V to 480 V, VGS = 0 V - 36 - pF
Qg(tot) Total Gate Charge at 10V VDS = 640 V, ID = 1.6 A,
VGS = 10 V
(Note 4)
-6.88.8nC
Qgs Gate to Source Gate Charge - 1.38 - nC
Qgd Gate to Drain “Miller” Charge - 3.0 - nC
ESR Equivalent Series Resistance f = 1 MHz - 2.9 - Ω
td(on) Turn-On Delay Time
VDD = 400 V, ID = 1.6 A,
VGS = 10 V, Rg = 4.7 Ω
(Note 4)
-1030ns
trTurn-On Rise Time - 6.5 23 ns
td(off) Turn-Off Delay Time - 21 52 ns
tfTurn-Off Fall Time - 16 42 ns
ISMaximum Continuous Drain to Source Diode Forward Current - - 2.2 A
ISM Maximum Pulsed Drain to Source Diode Forward Current - - 3.2 A
VSD Drain to Source Diode Forward Voltage VGS = 0 V, ISD = 1.6 A - - 1.2 V
trr Reverse Recovery Time VGS = 0 V, ISD = 1.6 A,
dIF/dt = 100 A/μs
-209- ns
Qrr Reverse Recovery Charge - 1.2 - μC
Notes:
1. Repetitive rating: pulse width limited by maximum junction temperature.
2. IAS = 0.32 A, RG = 25 Ω, starting TJ = 25°C
3. ISD ≤ 2.2 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25°C
4. Essentially independent of operating temperature typical characteristic.
FCPF4300N80Z — N-Channel SuperFET® II MOSFET
©2014 Fairchild Semiconductor Corporation
FCPF4300N80Z Rev. 1.1
www.fairchildsemi.com
3
Typical Performance Characteristics
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics
Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage
Drain Current and Gate Voltage Variation vs. Source Current
and Temperature
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
0.3 1 10 20
0.1
1
4
*Notes:
1. 250μs Pulse Test
2. TC = 25oC
ID, Drain Current[A]
VDS, Drain-Source Voltage[V]
VGS = 10.0V
8.0V
7.0V
6.5V
6.0V
5.5V
5.0V
234567
0.1
1
10
-55oC
150oC
*Notes:
1. VDS = 20V
2. 250μs Pulse Test
25oC
ID, Drain Current[A]
VGS, Gate-Source Voltage[V]
01234
2
3
4
5
6
7
8
*Note: TC = 25oC
VGS = 20V
VGS = 10V
RDS(ON) [Ω],
Drain-Source On-Resistance
ID, Drain Current [A]
0.00.30.60.91.21.5
0.001
0.01
0.1
1
10
20
*Notes:
1. VGS = 0V
2. 250μs Pulse Test
150oC
IS, Reverse Drain Current [A]
VSD, Body Diode Forward Voltage [V]
25oC
02468
0
2
4
6
8
10
VDS = 640V
VDS = 400V
VDS = 160V
*Note: ID = 1.6A
VGS, Gate-Source Voltage [V]
Qg, Total Gate Charge [nC]
0.1 1 10 100 1000
0.1
1
10
100
1000
10000
Coss
Ciss
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
*Note:
1. VGS = 0V
2. f = 1MHz Crss
Capacitances [pF]
VDS, Drain-Source Voltage [V]
FCPF4300N80Z — N-Channel SuperFET® II MOSFET
©2014 Fairchild Semiconductor Corporation
FCPF4300N80Z Rev. 1.1
www.fairchildsemi.com
4
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation
vs. Temperature vs. Temperature
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
Figure 11. Eoss vs. Drain to Source Voltage
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
*Notes:
1. VGS = 0V
2. ID = 1mA
BVDSS, [Normalized]
Drain-Source Breakdown Voltage
TJ, Junction Temperature [oC]
-100 -50 0 50 100 150 200
0.4
0.8
1.2
1.6
2.0
2.4
2.8
*Notes:
1. VGS = 10V
2. ID = 0.8A
RDS(on), [Normalized]
Drain-Source On-Resistance
TJ, Junction Temperature [oC]
25 50 75 100 125 150
0.0
0.5
1.0
1.5
2.0
2.5
ID, Drain Current [A]
TC, Case Temperature [oC]
1 10 100 1000
0.01
0.1
1
10
10μs
100μs
1ms
10ms
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
Operation in This Area
is Limited by R DS(on)
*Notes:
1. TC = 25oC
2. TJ = 150oC
3. Single Pulse
DC
0 160 320 480 640 800
0
0.6
1.2
1.8
2.4
EOSS, [μJ]
VDS, Drain to Source Voltage [V]
FCPF4300N80Z — N-Channel SuperFET® II MOSFET
©2014 Fairchild Semiconductor Corporation
FCPF4300N80Z Rev. 1.1
www.fairchildsemi.com
5
Typical Performance Characteristics (Continued)
Figure 12. Transient Thermal Response Curve
10-5 10-4 10-3 10-2 10-1 110
100
0.01
0.1
1
10
ZθJC(t), Thermal Response [oC/W]
0.01
0.1
0.2
0.05
0.02
*Notes:
1. ZθJC(t) = 6.5oC/W Max.
2. Duty Factor, D= t1/t2
3. TJM - TC = PDM * ZθJC(t)
0.5
Single pulse
t1, Rectangular Pulse Duration [sec]
t
1
P
DM
t
2
FCPF4300N80Z — N-Channel SuperFET® II MOSFET
©2014 Fairchild Semiconductor Corporation
FCPF4300N80Z Rev. 1.1
www.fairchildsemi.com
6
Figure 13. Gate Charge Test Circuit & Waveform
Figure 14. Resistive Switching Test Circuit & Waveforms
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
VGS
VGS
IG = const.
FCPF4300N80Z — N-Channel SuperFET® II MOSFET
©2014 Fairchild Semiconductor Corporation
FCPF4300N80Z Rev. 1.1
www.fairchildsemi.com
7
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS • dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
L
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS • dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
LL
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
D = Gate Pulse Width
Gate Pulse Period
--------------------------
B
4.90
4.50
16.00
15.60
10.05
9.45
3.40
3.20
3.28
3.08
B
10.36
9.96
1.47
1.24
0.90
0.70
0.45
0.25
30°
2.54 2.54
7.00
2.14
(3.23)
B
13
SEE NOTE "F"
0.50
M
A
A
B
2.66
2.42
B
16.07
15.67
2.96
2.56
B
0.60
0.45
0.70
6.88
6.48
1 X
45°
SEE NOTE "F"
NOTES:
A. EXCEPT WHERE NOTED CONFORMS TO
EIAJ SC91A.
B
DOES NOT COMPLY EIAJ STD. VALUE.
C. ALL DIMENSIONS ARE IN MILLIMETERS.
D. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR PROTRUSIONS.
E. DIMENSION AND TOLERANCE AS PER ASME
Y14.5-1994.
F. OPTION 1 - WITH SUPPORT PIN HOLE.
OPTION 2 - NO SUPPORT PIN HOLE.
G. DRAWING FILE NAME: TO220M03REV5
www.onsemi.com
1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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