LM3478QMMX/NOPB - NATIONAL SEMICONDUCTOR

LM3478,LM3478Q

LM3478/LM3478Q High Efficiency Low-Side N-Channel Controller for Switching

Regulator

Literature Number: SNVS085U

LM3478/LM3478Q

October 17, 2011

High Efficiency Low-Side N-Channel Controller for

Switching Regulator

General Description

The LM3478 is a versatile Low-Side N-Channel MOSFET

controller for switching regulators. It is suitable for use in

topologies requiring a low side MOSFET, such as boost, fly-

back, SEPIC, etc. Moreover, the LM3478 can be operated at

extremely high switching frequency in order to reduce the

overall solution size. The switching frequency of the LM3478

can be adjusted to any value between 100kHz and 1MHz by

using a single external resistor. Current mode control pro-

vides superior bandwidth and transient response, besides

cycle-by-cycle current limiting. Output current can be pro-

grammed with a single external resistor.

The LM3478 has built in features such as thermal shutdown,

short-circuit protection, over voltage protection, etc. Power

saving shutdown mode reduces the total supply current to

5µA and allows power supply sequencing. Internal soft-start

limits the inrush current at start-up.

Key Specifications

■Wide supply voltage range of 2.97V to 40V

■100kHz to 1MHz Adjustable clock frequency

■±2.5% (over temperature) internal reference

■10µA shutdown current (over temperature)

Features

■LM3478Q in MSOP-8 package is AEC-Q100 qualified and

manufactured on an Automotive Grade Flow

■8-lead Mini-SO8 (MSOP-8) and SO-8 packages

■Internal push-pull driver with 1A peak current capability

■Current limit and thermal shutdown

■Frequency compensation optimized with a capacitor and

a resistor

■Internal softstart

■Current Mode Operation

■Undervoltage Lockout with hysteresis

Applications

■Distributed Power Systems

■Battery Chargers

■Offline Power Supplies

■Telecom Power Supplies

■Automotive Power Systems

Typical Application Circuit

10135501

Typical High Efficiency Step-Up (Boost) Converter

LM3478/LM3478Q High Efficiency Low-Side N-Channel Controller for Switching Regulator

Connection Diagram

10135502

8 Lead Mini SO8 Package (MSOP-8 Package)

10135590

8 Lead SO-8 Package (SO-8 Package)

Package Marking and Ordering Information

Order Number Package Type Package Marking Supplied As Feature

LM3478MM MSOP-8 S14B 1000 units on Tape and Reel

LM3478MMX 3500 units on Tape and Reel

LM3478QMM MSOP-8 SSUB 1000 units on Tape and Reel AEC-Q100 (Grade 1) qualified.

Automotive Grade Production Flow*

LM3478QMMX 3500 units on Tape and Reel

LM3478MA SO-8 LM3478MA 1000 units on Tape and Reel

LM3478MAX 2500 units on Tape and Reel

* Automotive Grade (Q) product incorporates enhanced manufacturing and support processes for the automotive market, including defect detection methodologies.

Reliability qualification is compliant with the requirements and temperature grades defined in the AEC-Q100 standard. Automotive grade products are identified

with the letter Q. For more information go to http://www.national.com/automotive.

Pin Descriptions

Pin Name Pin Number Description

ISEN 1Current sense input pin. Voltage generated across an external sense

resistor is fed into this pin.

COMP 2 Compensation pin. A resistor, capacitor combination connected to this

pin provides compensation for the control loop.

FB 3 Feedback pin. The output voltage should be adjusted using a resistor

divider to provide 1.26V at this pin.

AGND 4 Analog ground pin.

PGND 5 Power ground pin.

DR 6 Drive pin. The gate of the external MOSFET should be connected to

this pin.

FA/SD 7 Frequency adjust and Shutdown pin. A resistor connected to this pin

sets the oscillator frequency. A high level on this pin for longer than

30 µs will turn the device off. The device will then draw less than 10µA

from the supply.

VIN 8 Power Supply Input pin.

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LM3478/LM3478Q

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Input Voltage 45V

FB Pin Voltage -0.4V < VFB < 7V

FA/SD Pin Voltage -0.4V < VFA/SD < 7V

Peak Driver Output Current (<10µs) 1.0A

Power Dissipation Internally Limited

Storage Temperature Range −65°C to +150°C

Junction Temperature +150°C

ESD Susceptibilty

Human Body Model (Note 2) 2kV

Lead Temperature

MM Package

Vapor Phase (60 sec.)

Infared (15 sec.)

215°C

260°C

DR Pin Voltage −0.4V ≤ VDR ≤ 8V

ISEN Pin Voltage 500mV

Operating Ratings (Note 1)

Supply Voltage 2.97V ≤ VIN ≤ 40V

Junction Temperature

Range −40°C ≤ TJ ≤ +125°C

Switching Frequency 100kHz ≤ FSW ≤ 1MHz

Electrical Characteristics

Specifications in Standard type face are for TJ = 25°C, and in bold type face apply over the full Operating Temperature

Range. Unless otherwise specified, VIN = 12V, RFA = 40kΩ

Symbol Parameter Conditions Typical Limit Units

VFB Feedback Voltage VCOMP = 1.4V,

2.97 ≤ VIN ≤ 40V

1.26

1.2416/1.228

1.2843/1.292

V(min)

V(max)

ΔVLINE Feedback Voltage Line

Regulation

2.97 ≤ VIN ≤ 40V 0.001

%/V

ΔVLOAD Output Voltage Load

Regulation

IEAO Source/Sink ±0.5

%/A (max)

VUVLO Input Undervoltage Lock-out 2.85

2.97

V(max)

VUV(HYS) Input Undervoltage Lock-out

Hysteresis

170

130

210

mV (min)

mV (max)

Fnom Nominal Switching Frequency RFA = 40KΩ400

350

440

kHz

kHz(min)

kHz(max)

RDS1 (ON) Driver Switch On Resistance

(top)

IDR = 0.2A, VIN= 5V 16 Ω

RDS2 (ON) Driver Switch On Resistance

(bottom)

IDR = 0.2A 4.5 Ω

VDR (max) Maximum Drive Voltage

Swing(Note 6)

VIN < 7.2V VIN V

VIN ≥ 7.2V 7.2

Dmax Maximum Duty Cycle(Note 7) 100 %

Tmin (on) Minimum On Time 325

210

600

nsec

nsec(min)

nsec(max)

ISUPPLY Supply Current (non-

switching)

(Note 9)2.7 3.3

mA (max)

IQQuiescent Current in

Shutdown Mode

VFA/SD = 5V (Note 10),

VIN = 5V

µA

µA (max)

VSENSE Current Sense Threshold

Voltage

VIN = 5V 156

135/ 125

180/ 190

mV (min)

mV (max)

VSC Short-Circuit Current Limit

Sense Voltage

VIN = 5V 343

250

415

mV (min)

mV (max)

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LM3478/LM3478Q

Symbol Parameter Conditions Typical Limit Units

VSL Internal Compensation Ramp

Voltage

VIN = 5V 92

132

mV(min)

mV(max)

VSL ratio VSL/VSENSE 0.49 0.30

0.70

(min)

(max)

VOVP Output Over-voltage

Protection (with respect to

feedback voltage) (Note 8)

VCOMP = 1.4V 50

32/ 25

mV(min)

MM package 78/ 85 mV(max)

MA package 78/100 mV(max)

VOVP(HYS) Output Over-Voltage

Protection Hysteresis(Note 8)

VCOMP = 1.4V 60

110

mV(min)

mV(max)

Gm Error Ampifier

Transconductance

VCOMP = 1.4V

IEAO = 100µA (Source/Sink)

800 600/ 365

1000/ 1265

µmho

µmho (min)

µmho (max)

AVOL Error Amplifier Voltage Gain VCOMP = 1.4V

IEAO = 100µA (Source/Sink)

V/V

V/V (min)

V/V (max)

IEAO Error Amplifier Output Current

(Source/ Sink)

Source, VCOMP = 1.4V, VFB = 0V 110

80/ 50

140/ 180

µA

µA (min)

µA (max)

Sink, VCOMP = 1.4V, VFB = 1.4V −140

−100/ −85

−180/ −185

µA

µA (min)

µA (max)

VEAO Error Amplifier Output Voltage

Swing

Upper Limit

VFB = 0V

COMP Pin = Floating

2.2

1.8

2.4

V(min)

V(max)

Lower Limit

VFB = 1.4V

0.56

0.2

1.0

V(min)

V(max)

TSS Internal Soft-Start Delay VFB = 1.2V, VCOMP = Floating 4 msec

TrDrive Pin Rise Time Cgs = 3000pf, VDR = 0 to 3V 25 ns

TfDrive Pin Fall Time Cgs = 3000pf, VDR = 0 to 3V 25 ns

VSD Shutdown threshold (Note 5) Output = High 1.27

1.4

V (max)

Output = Low 0.65

0.3

V (min)

ISD Shutdown Pin Current VSD = 5V −1 µA

VSD = 0V +1

IFB Feedback Pin Current 15 nA

TSD Thermal Shutdown 165 °C

Tsh Thermal Shutdown Hysteresis 10 °C

θJA Thermal Resistance MM Package 200 °C/W

MA Package 151

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LM3478/LM3478Q

Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the

device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics.

Note 2: The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin.

Note 3: All limits are guaranteed at room temperature (standard type face) and at temperature extremes (bold type face). All room temperature limits are 100%

tested. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate

Average Outgoing Quality Level (AOQL).

Note 4: Typical numbers are at 25°C and represent the most likely norm.

Note 5: The FA/SD pin should be pulled to VIN through a resistor to turn the regulator off. The voltage on the FA/SD pin must be above the maximum limit for

Output = High to keep the regulator off and must be below the limit for Output = Low to keep the regulator on.

Note 6: The voltage on the drive pin, VDR is equal to the input voltage when input voltage is less than 7.2V. VDR is equal to 7.2V when the input voltage is greater

than or equal to 7.2V.

Note 7: The limits for the maximum duty cycle can not be specified since the part does not permit less than 100% maximum duty cycle operation.

Note 8: The over-voltage protection is specified with respect to the feedback voltage. This is because the over-voltage protection tracks the feedback voltage.

The overvoltage protection threshold is given by adding the feedback voltage, VFB to the over-voltage protection specification.

Note 9: For this test, the FA/SD pin is pulled to ground using a 40K resistor.

Note 10: For this test, the FA/SD pin is pulled to 5V using a 40K resistor.

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LM3478/LM3478Q

Typical Performance Characteristics Unless otherwise specified, VIN = 12V, TJ = 25°C.

IQ vs Input Voltage (Shutdown)

10135503

ISupply vs Input Voltage (Non-Switching)

10135534

ISupply vs VIN (Switching)

10135535

Switching Frequency vs RFA

10135504

Frequency vs Temperature

10135554

Drive Voltage vs Input Voltage

10135505

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LM3478/LM3478Q

Current Sense Threshold vs Input Voltage

10135545

COMP Pin Voltage vs Load Current

10135562

Efficiency vs Load Current (3.3V In and 12V Out)

10135559

Efficiency vs Load Current (5V In and 12V Out)

10135558

Efficiency vs Load Current (9V In and 12V Out)

10135560

Efficiency vs Load Current (3.3V In and 5V Out)

10135553

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LM3478/LM3478Q

Error Amplifier Gain

10135555

Error Amplifier Phase

10135556

COMP Pin Source Current vs Temperature

10135536

Short Circuit Sense Voltage vs Input Voltage

10135557

Compensation Ramp vs Compensation Resistor

10135551

Shutdown Threshold Hysteresis vs Temperature

10135546

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LM3478/LM3478Q

Duty Cycle vs Current Sense Voltage

10135594

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LM3478/LM3478Q

Functional Block Diagram

10135506

Functional Description

The LM3478 uses a fixed frequency, Pulse Width Modulated

(PWM) current mode control architecture. The block diagram

above shows the basic functionality. In a typical application

circuit, the peak current through the external MOSFET is

sensed through an external sense resistor. The voltage

across this resistor is fed into the Isen pin. This voltage is fed

into the positive input of the PWM comparator. The output

voltage is also sensed through an external feedback resistor

divider network and fed into the error amplifier negative input

(feedback pin, FB). The output of the error amplifier (COMP

pin) is added to the slope compensation ramp and fed into the

negative input of the PWM comparator. At the start of any

switching cycle, the oscillator sets the RS latch using the

switch logic block. This forces a high signal on the DR pin

(gate of the external MOSFET) and the external MOSFET

turns on. When the voltage on the positive input of the PWM

comparator exceeds the negative input, the RS latch is reset

and the external MOSFET turns off.

The voltage sensed across the sense resistor generally con-

tains spurious noise spikes, as shown in Figure 2. These

spikes can force the PWM comparator to reset the RS latch

prematurely. To prevent these spikes from resetting the latch,

a blank-out circuit inside the IC prevents the PWM comparator

from resetting the latch for a short duration after the latch is

set. This duration is about 325ns and is called the blanking

interval and is specified as minimum on-time in the Electrical

Characteristics section. Under extremely light-load or no-load

conditions, the energy delivered to the output capacitor when

the external MOSFET in on during the blanking interval is

more than what is delivered to the load. An over-voltage com-

parator inside the LM3478 prevents the output voltage from

rising under these conditions. The over-voltage comparator

senses the feedback (FB pin) voltage and resets the RS latch.

The latch remains in reset state until the output decays to the

nominal value.

OVER VOLTAGE PROTECTION

The LM3478 has over voltage protection (OVP) for the output

voltage. OVP is sensed at the feedback pin (pin 3). If at any-

time the voltage at the feedback pin rises to VFB+ VOVP, OVP

is triggered. See ELECTRICAL CHARACTERISTICS section

for limits on VFB and VOVP.

OVP will cause the drive pin to go low, forcing the power

MOSFET off. With the MOSFET off, the output voltage will

drop. The LM3478 will begin switching again when the feed-

back voltage reaches VFB + (VOVP - VOVP(HYS)). See

ELECTRICAL CHARACTERISTICS for limits on VOVP(HYS).

OVP can be triggered if the unregulated input voltage crosses

7.2V, the output voltage will react as shown in Figure 1. The

internal bias of the LM3478 comes from either the internal

LDO as shown in the block diagram or the voltage at the Vin

pin is used directly. At Vin voltages lower than 7.2V the inter-

nal IC bias is the Vin voltage and at voltages above 7.2V the

internal LDO of the LM3478 provides the bias. At the

switchover threshold at 7.2V a sudden small change in bias

voltage is seen by all the internal blocks of the LM3478. The

control voltage shifts because of the bias change, the PWM

comparator tries to keep regulation. To the PWM comparator,

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LM3478/LM3478Q

the scenario is identical to a step change in the load current,

so the response at the output voltage is the same as would

be observed in a step load change. Hence, the output voltage

overshoot here can also trigger OVP. The LM3478 will regu-

late in hysteretic mode for several cycles, or may not recover

and simply stay in hysteretic mode until the load current drops

or Vin is not crossing the 7.2V threshold anymore. Note that

the output is still regulated in hysteretic mode.

Depending on the requirements of the application there is

some influence one has over this effect. The threshold of 7.2V

can be shifted to higher voltages by adding a resistor in series

with Vin. In case Vin is right at the threshold of 7.2V it can

happen that the threshold is crossed over and over due to

some slight ripple on Vin. To minimize the effect on the output

voltage one can filter the Vin pin with an RC filter.

10135511

FIGURE 1. The Feedback Voltage Experiences an

Oscillation if the Input Voltage crosses the 7.2V Internal

Bias Threshold

10135507

FIGURE 2. Basic Operation of the PWM Comparator

SLOPE COMPENSATION RAMP

The LM3478 uses a current mode control scheme. The main

advantages of current mode control are inherent cycle-by-cy-

cle current limit for the switch and simpler control loop char-

acteristics. It is also easy to parallel power stages using

current mode control since current sharing is automatic. How-

ever, current mode control has an inherent instability for duty

cycles greater than 50%, as shown in Figure 3.

A small increase in the load current causes the switch current

to increase by ΔI0. The effect of this load change is ΔI1.

The two solid waveforms shown are the waveforms compared

at the internal pulse width modulator, used to generate the

MOSFET drive signal. The top waveform with the slope Se is

the internally generated control waveform VC. The bottom

waveform with slopes Sn and Sf is the sensed inductor current

waveform VSEN.

10135512

FIGURE 3. Sub-Harmonic Oscillation for D>0.5 and

Compensation Ramp to Avoid Sub-Harmonic Oscillation

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LM3478/LM3478Q

Sub-harmonic Oscillation can be easily understood as a ge-

ometric problem. If the control signal does not have slope, the

slope representing the inductor current ramps up until the

control signal is reached and then slopes down again. If the

duty cycle is above 50%, any perturbation will not converge

but diverge from cycle to cycle and causes sub-harmonic os-

cillation.

It is apparent that the difference in the inductor current from

one cycle to the next is a function of Sn, Sf and Se as follows:

Hence, if the quantity (Sf - Se)/(Sn + Se) is greater than 1, the

inductor current diverges and subharmonic oscillation results.

This counts for all current mode topologies. The LM3478 has

some internal slope compensation VSL which is enough for

many applications above 50% duty cycle to avoid subhar-

monic oscillation .

For boost applications, the slopes Se, Sf and Sn can be cal-

culated with the formulas below:

Se = VSL x fs

Sf = Rsen x (VOUT - VIN)/L

Sn = VIN x Rsen/L

When Se increases then the factor which determines if sub-

harmonic oscillation will occur decreases. When the duty

cycle is greater than 50%, and the inductance becomes less,

the factor increases.

For more flexibility slope compensation can be increased by

adding one external resistor, RSL, in the Isens path. Figure 4

shows the setup. The externally generated slope compensa-

tion is then added to the internal slope compensation of the

LM3478. When using external slope compensation, the for-

mula for Se becomes:

Se = (VSL + (K x RSL)) x fs

A typical value for factor K is 40 µA.

The factor changes with switching frequency. Figure 5 is used

to determine the factor K for individual applications and the

formula below gives the factor K.

K = ΔVSL / RSL

It is a good design practice to only add as much slope com-

pensation as needed to avoid subharmonic oscillation. Addi-

tional slope compensation minimizes the influence of the

sensed current in the control loop. With very large slope com-

pensation the control loop characteristics are similar to a

voltage mode regulator which compares the error voltage to

a saw tooth waveform rather than the inductor current.

10135513

FIGURE 4. Adding External Slope Compensation

10135595

FIGURE 5. External Slope Compensation

ΔVSL vs RSL

FREQUENCY ADJUST/SHUTDOWN

The switching frequency of the LM3478 can be adjusted be-

tween 100kHz and 1MHz using a single external resistor. This

resistor must be connected between FA/SD pin and ground,

as shown in Figure 6. To determine the value of the resistor

required for a desired switching frequency refer to the typical

performance characteristics or use the following equation:

RFA = 4.503 x 1011 x fS- 1.26

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LM3478/LM3478Q

10135514

FIGURE 6. Frequency Adjust

The FA/SD pin also functions as a shutdown pin. If a high

signal (>1.35V) appears on the FA/SD pin, the LM3478 stops

switching and goes into a low current mode. The total supply

current of the IC reduces to less than 10 uA under these con-

ditions. Figure 7 shows implementation of the shutdown func-

tion when operating in frequency adjust mode. In this mode a

high signal for more than 30us shuts down the IC. However,

the voltage on the FA/SD pin should be always less than the

absolute maximum of 7V to avoid any damage to the device.

10135516

FIGURE 7. Shutdown Operation in Frequency Adjust Mode

SHORT-CIRCUIT PROTECTION

When the voltage across the sense resistor measured on the

Isen pin exceeds 343 mV, short circuit current limit protection

gets activated. A comparator inside the LM3478 reduces the

switching frequency by a factor of 5 and maintains this con-

dition until the short is removed. In normal operation the

sensed current will trigger the power MOSFET to turn off.

During the blanking interval the PWM comparator will not re-

act to an over current so that this additional 343 mV current

limit threshold is implemented to protect the device in a short

circuit or severe overload condition.

Typical Applications

The LM3478 may be operated in either the continuous (CCM)

or the discontinuous current conduction mode (DCM). The

following applications are designed for the CCM operation.

This mode of operation has higher efficiency and usually low-

er EMI characteristics than the DCM.

BOOST CONVERTER

The boost converter converts a low input voltage into a higher

output voltage. The basic configuration for a boost converter

is shown in Figure 8. In the CCM (when the inductor current

never reaches zero at steady state), the boost regulator op-

erates in two states. In the first state of operation, MOSFET

Q is turned on and energy is stored in the inductor. During this

state, diode D is reverse biased and load current is supplied

by the output capacitor, Cout.

In the second state, MOSFET Q is off and the diode is forward

biased. The energy stored in the inductor is transferred to the

load and the output capacitor. The ratio of the switch on time

to the total period is the duty cycle D:

D = 1 - (Vin / Vout)

Including the voltage drop across the MOSFET and the diode

the definition for the duty cycle is:

D = 1 - ((Vin - Vq)/(Vout + Vd))

Vd is the forward voltage drop of the diode and Vq is the volt-

age drop across the MOSFET when it is on.

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10135522

FIGURE 8. Simplified Boost Convertert

A. First Cycle Operation B. Second Cycle of Operation

POWER INDUCTOR SELECTION

The inductor is one of the two energy storage elements in a

boost converter. Figure 9 shows how the inductor current

varies during a switching cycle. The current through an in-

ductor is quantified by the following relationship of L, IL and

VL:

The important quantities in determining a proper inductance

value are IL (the average inductor current) and ΔIL (the in-

ductor current ripple). If ΔIL is larger than IL, the inductor

current will drop to zero for a portion of the cycle and the con-

verter will operate in the DCM. All the analysis in this

datasheet assumes operation in the CCM. To operate in the

CCM, the following condition must be met:

Choose the minimum Iout to determine the minimum induc-

tance value. A common choice is to set ΔIL to 30% of IL.

Choosing an appropriate core size for the inductor involves

calculating the average and peak currents expected through

the inductor. In a boost converter the peak inductor current is:

ILPEAK = Average IL(max) + ΔIL(max)

Average IL(max) = Iout / (1-D)

ΔIL(max) = D x Vin / (2 x fs x L)

An inductor size with ratings higher than these values has to

be selected. If the inductor is not properly rated, saturation will

occur and may cause the circuit to malfunction.

The LM3478 can be set to switch at very high frequencies.

When the switching frequency is high, the converter can be

operated with very small inductor values. The LM3478 senses

the peak current through the switch which is the same as the

peak inductor current as calculated above.

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LM3478/LM3478Q

10135524

FIGURE 9. Inductor Current and Diode Current

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LM3478/LM3478Q

PROGRAMMING THE OUTPUT VOLTAGE

The output voltage can be programmed using a resistor di-

vider between the output and the FB pin. The resistors are

selected such that the voltage at the FB pin is 1.26V. Pick

RF1 (the resistor between the output voltage and the feedback

pin) and RF2 (the resistor between the feedback pin and

ground) can be selected using the following equation,

RF2 = (1.26V x RF1) / (Vout - 1.26V)

A 100pF capacitor may be connected between the feedback

and ground pins to reduce noise.

SETTING THE CURRENT LIMIT

The maximum amount of current that can be delivered to the

load is set by the sense resistor, RSEN. Current limit occurs

when the voltage that is generated across the sense resistor

equals the current sense threshold voltage, VSENSE. When

this threshold is reached, the switch will be turned off until the

next cycle. Limits for VSENSE are specified in the electrical

characteristics section. VSENSE represents the maximum val-

ue of the internal control signal VCS as shown in Figure 10.

This control signal, however, is not a constant value and

changes over the course of a period as a result of the internal

compensation ramp (VSL). Therefore the current limit thresh-

old will also change. The actual current limit threshold is a

function of the sense voltage (VSENSE) and the internal com-

pensation ramp:

RSEN x ISWLIMIT = VCSMAX = VSENSE - (D x VSL)

Where ISWLIMIT is the peak switch current limit, defined by the

equation below.

10135552

FIGURE 10. Current Sense Voltage vs Duty Cycle

Figure 10 shows how VCS (and current limit threshold voltage)

change with duty cycle. The curve is equivalent to the internal

compensation ramp slope (Se) and is bounded at low duty

cycle by VSENSE, shown as a dotted line. As duty cycle in-

creases, the control voltage is reduced as VSL ramps up. The

graph also shows the short circuit current limit threshold of

343 mV (typical) during the 325 ns (typical) blanking time. For

higher frequencies this fixed blanking time obviously occupies

more duty cycle, percentage wise. Since current limit thresh-

old varies with duty cycle, the following equation should be

used to select RSEN and set the desired current limit threshold:

The numerator of the above equation is VCS, and ISWLIMIT is

calculated as:

To avoid false triggering, the current limit value should have

some margin above the maximum operating value, typically

120%. Values for both VSENSE and VSL are specified in the

characteristic table. However, calculating with the limits of

these two specs could result in an unrealistically wide current

limit or RSEN range. Therefore, the following equation is rec-

ommended, using the VSL ratio value given in the EC table:

RSEN is part of the current mode control loop and has some

influence on control loop stability. Therefore, once the current

limit threshold is set, loop stability must be verified. As de-

scribed in the slope compensation section, the following must

hold true for a current mode converter to be stable:

Sf - Se < Sn + Se

To verify that this equation holds true, use the following equa-

tion:

If the selected RSEN is greater than this value, additional

slope compensation must be added to ensure stability, as

described in the section below.

CURRENT LIMIT WITH EXTERNAL SLOPE

COMPENSATION

RSL is used to add additional slope compensation when re-

quired. It is not necessary in most designs and RSL should be

no larger than necessary. Select RSL according to the fol-

lowing equation:

Where RSEN is the selected value based on current limit. With

RSL installed, the control signal includes additional external

slope to stabilize the loop, which will also have an effect on

the current limit threshold. Therefore, the current limit thresh-

old must be re-verified, as illustrated in the equations below :

VCS = VSENSE – (D x (VSL + ΔVSL))

Where ΔVSL is the additional slope compensation generated

as discussed in the slope compensation ramp section and

calculated as:

ΔVSL = 40 µA x RSL

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LM3478/LM3478Q

This changes the equation for current limit (or RSEN) to:

The RSEN and RSL values may have to be calculated iteratively

in order to achieve both the desired current limit and stable

operation. In some designs RSL can also help to filter noise

on the ISEN pin.

If the inductor is selected such that ripple current is the rec-

ommended 30% value, and the current limit threshold is 120%

of the maximum peak, a simpler method can be used to de-

termine RSEN. The equation below will provide optimum sta-

bility without RSL, provided that the above 2 conditions are

met:

POWER DIODE SELECTION

Observation of the boost converter circuit shows that the av-

erage current through the diode is the average load current,

and the peak current through the diode is the peak current

through the inductor. The diode should be rated to handle

more than its peak current. The peak diode current can be

calculated using the formula:

ID(Peak) = IOUT/ (1−D) + ΔIL

Thermally the diode must be able to handle the maximum av-

erage current delivered to the output. The peak reverse volt-

age for boost converters is equal to the regulated output

voltage. The diode must be capable of handling this voltage.

To improve efficiency, a low forward drop schottky diode is

recommended.

POWER MOSFET SELECTION

The drive pin of the LM3478 must be connected to the gate

of an external MOSFET. The drive pin (DR) voltage depends

on the input voltage (see typical performance characteristics).

In most applications, a logic level MOSFET can be used. For

very low input voltages, a sub logic level MOSFET should be

used. The selected MOSFET has a great influence on the

system efficiency. The critical parameters for selecting a

MOSFET are:

1. Minimum threshold voltage, VTH(MIN)

2. On-resistance, RDS(ON)

3. Total gate charge, Qg

4. Reverse transfer capacitance, CRSS

5. Maximum drain to source voltage, VDS(MAX)

The off-state voltage of the MOSFET is approximately equal

to the output voltage. Vds(max) must be greater than the out-

put voltage. The power losses in the MOSFET can be cate-

gorized into conduction losses and switching losses. Rds(on)

is needed to estimate the conduction losses, Pcond:

Pcond = I2 x RDS(ON) x D

The temperature effect on the RDS(ON) usually is quite signif-

icant. Assume 30% increase at hot.

For the current I in the formula above the average inductor

current may be used.

Especially at high switching frequencies the switching losses

may be the largest portion of the total losses.

The switching losses are very difficult to calculate due to

changing parasitics of a given MOSFET in operation. Often

the individual MOSFETS datasheet does not give enough in-

formation to yield a useful result. The following formulas give

a rough idea how the switching losses are calculated:

INPUT CAPACITOR SELECTION

Due to the presence of an inductor at the input of a boost

converter, the input current waveform is continuous and tri-

angular as shown in figure 9. The inductor ensures that the

input capacitor sees fairly low ripple currents. However, as the

input capacitor gets smaller, the input ripple goes up. The rms

current in the input capacitor is given by:

The input capacitor should be capable of handling the rms

current. Although the input capacitor is not as critical in a

boost application, low values can cause impedance interac-

tions. Therefore a good quality capacitor should be chosen in

the range of 10µF to 20µF. If a value lower than 10µF is used,

then problems with impedance interactions or switching noise

can affect the LM3478. To improve performance, especially

with Vin below 8 volts, it is recommended to use a 20 Ohm

resistor at the input to provide an RC filter. The resistor is

placed in series with the VIN pin with only a bypass capacitor

attached to the VIN pin directly (see figure 11). A 0.1µF or 1µF

ceramic capacitor is necessary in this configuration. The bulk

input capacitor and inductor will connect on the other side of

the resistor at the input power supply.

10135593

FIGURE 11. Reducing IC Input Noise

17 www.national.com

LM3478/LM3478Q

OUTPUT CAPACITOR SELECTION

The output capacitor in a boost converter provides all the out-

put current when the inductor is charging. As a result it sees

very large ripple currents. The output capacitor should be ca-

pable of handling the maximum rms current. The rms current

in the output capacitor is:

Where

The ESR and ESL of the capacitor directly control the output

ripple. Use capacitors with low ESR and ESL at the output for

high efficiency and low ripple voltage. Surface mount tanta-

lums, surface mount polymer electrolytic, polymer tantalum,

or multi-layer ceramic capacitors are recommended at the

output.

For applications that require very low output voltage ripple, a

second stage LC filter often is a good solution. Most of the

time it is lower cost to use a small second Inductor in the

power path and an additional final output capacitor than to

reduce the output voltage ripple by purely increasing the out-

put capacitor without an additional LC filter.

LAYOUT GUIDELINES

Good board layout is critical for switching controllers. First the

ground plane area must be sufficient for thermal dissipation

purposes and second, appropriate guidelines must be fol-

lowed to reduce the effects of switching noise. Switching

converters are very fast switching devices. In such devices,

the rapid increase of input current combined with the parasitic

trace inductance generates unwanted Ldi/dt noise spikes.

The magnitude of this noise tends to increase as the output

current increases. This parasitic spike noise may turn into

electromagnetic interference (EMI), and can also cause prob-

lems in device performance. Therefore, care must be taken

in layout to minimize the effect of this switching noise. The

current sensing circuit in current mode devices can be easily

affected by switching noise. This noise can cause duty cycle

jittering which leads to increased spectral noise. Although the

LM3478 has 325ns blanking time at the beginning of every

cycle to ignore this noise, some noise may remain after the

blanking time.

The most important layout rule is to keep the AC current loops

as small as possible. Figure 12 shows the current flow of a

boost converter. The top schematic shows a dotted line which

represents the current flow during on-state and the middle

schematic shows the current flow during off-state. The bottom

schematic shows the currents we refer to as AC currents.

They are the most critical ones since current is changing in

very short time periods. The dotted lined traces of the bottom

schematic are the once to make as short as possible.

10135520

FIGURE 12. Current Flow In A Boost Application

The PGND and AGND pins have to be connected to the same

ground very close to the IC. To avoid ground loop currents,

attach all the grounds of the system only at one point.

A ceramic input capacitor should be connected as close as

possible to the Vin pin and grounded close to the GND pin.

For a layout example please see Application Note1204. For

more information about layout in switch mode power supplies

please refer to Application Note 1229.

COMPENSATION

For detailed explanation on how to select the right compen-

sation components to attach to the compensation pin for a

boost topology please see Application Note 1286.

Designing SEPIC Using the LM3478

Since the LM3478 controls a low-side N-Channel MOSFET,

it can also be used in SEPIC (Single Ended Primary Induc-

tance Converter) applications. An example of a SEPIC using

the LM3478 is shown in Figure 13. Note that the output volt-

age can be higher or lower than the input voltage. The SEPIC

uses two inductors to step-up or step-down the input voltage.

The inductors L1 and L2 can be two discrete inductors or two

windings of a coupled inductor since equal voltages are ap-

plied across the inductor throughout the switching cycle. Us-

ing two discrete inductors allows use of catalog magnetics, as

opposed to a custom inductor. The input ripple can be re-

duced along with size by using the coupled windings for L1

and L2.

Due to the presence of the inductor L1 at the input, the SEPIC

inherits all the benefits of a boost converter. One main ad-

vantage of a SEPIC over a boost converter is the inherent

input to output isolation. The capacitor CS isolates the input

from the output and provides protection against a shorted or

malfunctioning load. Hence, the SEPIC is useful for replacing

boost circuits when true shutdown is required. This means

that the output voltage falls to 0V when the switch is turned

off. In a boost converter, the output can only fall to the input

voltage minus a diode drop.

The duty cycle of a SEPIC is given by:

www.national.com 18

LM3478/LM3478Q

In the above equation, VQ is the on-state voltage of the MOS-

FET, Q, and VDIODE is the forward voltage drop of the diode.

10135544

FIGURE 13. Typical SEPIC Converter

POWER MOSFET SELECTION

As in a boost converter, parameters governing the selection

of the MOSFET are the minimum threshold voltage, VTH

(MIN), the on-resistance, RDS(ON), the total gate charge, Qg, the

reverse transfer capacitance, CRSS, and the maximum drain

to source voltage, VDS(MAX). The peak switch voltage in a

SEPIC is given by:

VSW(PEAK) = VIN + VOUT + VDIODE

The selected MOSFET should satisfy the condition:

VDS(MAX) > VSW(PEAK)

The peak switch current is given by:

The rms current through the switch is given by:

POWER DIODE SELECTION

The Power diode must be selected to handle the peak current

and the peak reverse voltage. In a SEPIC, the diode peak

current is the same as the switch peak current. The off-state

voltage or peak reverse voltage of the diode is VIN + VOUT.

Similar to the boost converter, the average diode current is

equal to the output current. Schottky diodes are recommend-

ed.

SELECTION OF INDUCTORS L1 AND L2

Proper selection of inductors L1 and L2 to maintain continu-

ous current conduction mode requires calculations of the

following parameters.

Average current in the inductors:

IL2AVE = IOUT

Peak to peak ripple current, to calculate core loss if neces-

sary:

Maintaining the condition IL > ΔiL/2 to ensure continuous cur-

rent conduction yields:

Peak current in the inductor, to ensure the inductor does not

saturate:

19 www.national.com

LM3478/LM3478Q

IL1PK must be lower than the maximum current rating set by

the current sense resistor.

The value of L1 can be increased above the minimum rec-

ommended to reduce input ripple and output ripple. However,

once DIL1 is less than 20% of IL1AVE, the benefit to output ripple

is minimal.

By increasing the value of L2 above the minimum recom-

mended, ΔIL2 can be reduced, which in turn will reduce the

output ripple voltage:

where ESR is the effective series resistance of the output ca-

pacitor.

If L1 and L2 are wound on the same core, then L1 = L2 = L.

All the equations above will hold true if the inductance is re-

placed by 2L.

SENSE RESISTOR SELECTION

The peak current through the switch, ISW(PEAK) can be adjust-

ed using the current sense resistor, RSEN, to provide a certain

output current. Resistor RSEN can be selected using the for-

mula:

Sepic Capacitor Selection

The selection of the SEPIC capacitor, CS, depends on the

rms current. The rms current of the SEPIC capacitor is given

by:

The SEPIC capacitor must be rated for a large ACrms current

relative to the output power. This property makes the SEPIC

much better suited to lower power applications where the rms

current through the capacitor is relatively small (relative to

capacitor technology). The voltage rating of the SEPIC ca-

pacitor must be greater than the maximum input voltage.

There is an energy balance between CS and L1, which can

be used to determine the value of the capacitor. The basic

energy balance equation is:

where

is the ripple voltage across the SEPIC capacitor, and

is the ripple current through the inductor L1. The energy bal-

ance equation can be solved to provide a minimum value for

CS:

Input Capacitor Selection

Similar to a boost converter, the SEPIC has an inductor at the

input. Hence, the input current waveform is continuous and

triangular. The inductor ensures that the input capacitor sees

fairly low ripple currents. However, as the input capacitor gets

smaller, the input ripple goes up. The rms current in the input

capacitor is given by:

The input capacitor should be capable of handling the rms

current. Although the input capacitor is not as critical in a

boost application, low values can cause impedance interac-

tions. Therefore a good quality capacitor should be chosen in

the range of 10µF to 20µF. If a value lower than 10µF is used

than problems with impedance interactions or switching noise

can affect the LM3478. To improve performance, especially

with VIN below 8 volts, it is recommended to use a 20Ω resistor

at the input to provide a RC filter. The resistor is placed in

series with the VIN pin with only a bypass capacitor attached

to the VIN pin directly (see Figure 11). A 0.1µF or 1µF ceramic

capacitor is necessary in this configuration. The bulk input

capacitor and inductor will connect on the other side of the

resistor with the input power supply.

Output Capacitor Selection

The output capacitor of the SEPIC sees very large ripple cur-

rents (similar to the output capacitor of a boost converter). The

rms current through the output capacitor is given by:

The ESR and ESL of the output capacitor directly control the

output ripple. Use low capacitors with low ESR and ESL at

the output for high efficiency and low ripple voltage. Surface

mount tantalums, surface mount polymer electrolytic and

polymer tantalum, Sanyo- OSCON, or multi-layer ceramic ca-

pacitors are recommended at the output for low ripple.

www.national.com 20

LM3478/LM3478Q

Other Application Circuit

10135543

FIGURE 14. Typical Flyback Circuit

10135587

FIGURE 15. Back Powering Circuit for Vin < 3V

(>3V input needed for startup)

21 www.national.com

LM3478/LM3478Q

Physical Dimensions inches (millimeters) unless otherwise noted

www.national.com 22

LM3478/LM3478Q

Notes

23 www.national.com

LM3478/LM3478Q

Notes

LM3478/LM3478Q High Efficiency Low-Side N-Channel Controller for Switching Regulator

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