LTC4416IMS#TRPBF - Linear Technology

LTC4416/LTC4416-1

4416fa

36V, Low Loss Dual

PowerPath Controllers for

Large PFETs

The LTC®4416/LTC4416-1 control two sets of external

P-channel MOSFETs to create two near ideal diode functions

for power switchover circuits. This permits highly efﬁcient

OR’ing of multiple power sources for extended battery life

and low self heating. When conducting, the voltage drop

across the MOSFET is typically 25mV. For applications with

a wall adapter or other auxiliary power source, the load is

automatically disconnected from the battery when the aux-

iliary source is connected.

The LTC4416 integrates two interconnected PowerPathTM

controllers with soft switchover control. The “soft-off”

switchover permits the users to transfer between two dis-

similar voltages without excessive voltage undershoot (or

VDROOP) in the output supply. The LTC4416/LTC4416-1 also

contain a “fast-on” feature that dramatically increases gate

drive current when the forward input voltage exceeds 25mV.

The LTC4416 “fast off” feature is engaged when the sense

voltage exceeds the input voltage by 25mV. The LTC4416-1

enables the fast off under the same conditions and when

the other external P-channel device is selected using the

enable pins.

The wide operating supply range supports operation from one

to eight Li-Ion cells in series. The low quiescent current (35µA

per channel) is independent of the load current. The gate driver

includes an internal voltage clamp for MOSFET protection.

The LTC4416/LTC4416-1 are available in low proﬁle 10-lead

MSOP packages.

■ High Current PowerPath Switch

■ Industrial and Automotive Applications

■ Uninterruptible Power Supplies

■ Logic Controlled Power Switch

■ Battery Backup System

■ Emergency Systems with Battery Backups

■ Designed Speciﬁcally to Drive Large and Small QG

PFETs

■ Very Low Loss Replacement for Power Supply

OR’ing Diodes

■ Wide Operating Voltage Range: 3.6V to 36V

■ –40°C to 125°C Operating Temperature Range

■ Reverse Battery Protection

■ Automatic Switching Between DC Sources

■ Low Quiescent Current: 35µA per Channel

■ Load Current Sharing

■ MOSFET Gate Protection Clamp

■ Precision Input Control Comparators for Setting

Switchover Threshold Points

■ Open-Drain Feedback Points for Customer Speciﬁed

Hysteresis Control

■ Minimal External Components

■ Space Saving 10-Lead MSOP Package

Automatic PowerPath Switchover

APPLICATIO S

FEATURES

DESCRIPTIO

TYPICAL APPLICATIO

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

PowerPath is a trademark of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

LTC4416

PRIMARY SUPPLY

BACKUP SUPPLYV2 = 10.8V

V1 = 12V (FAIL)

V1 = 13.5V (RESTORE) SUP75P03_07

SUP75P03_07

GND

24.9k187k

221k

GND

4416 TA01

FORWARD VOLTAGE (V)

0.02

CURRENT (A)

8.0

3.6

CONSTANT

RON

4416 TA01b

0.5

CONSTANT

VOLTAGE SCHOTTKY

DIODE

LTC4416

LTC4416 vs Schottky Diode

Forward Voltage Drop

LTC4416-1

GND

182k

24.3k24.9k

GND

VIN

187k

VTH1 WITH

HYSTERESIS

VTH2 WITH

HYSTERESIS

VOUT

LOAD

4416 TA01c

75k221k

UV ENABLED AT 5V, VIN RESTORED TO LOAD WHEN VIN RISES TO 5.5V

OV ENABLED AT 13.5V, VIN RESTORED TO LOAD WHEN VIN FALLS TO 12V

Under and Overvoltage Shutdown Operation

LTC4416/LTC4416-1

4416fa

Supply Voltage (V1, V2) .............................. –14V to 40V

Voltage from V1 or V2 to VS ....................... –40V to 40V

Input Voltage

E1, E2 .................................................... –0.3V to 40V

VS ........................................................... –14V to 40V

Output Voltage

G1 ....... –0.3V to the Higher of V1 + 0.3V or VS + 0.3V

G2 ....... –0.3V to the Higher of V2 + 0.3V or VS + 0.3V

H1, H2 ..................................................... –0.3V to 7V

Operating Ambient Temperature Range (Note 2)

LTC4416E ............................................ –40°C to 85°C

LTC4416I ........................................... –40°C to 125°C

Operating Junction

Temperature Range ................................ –40°C to 125°C

Storage Temperature Range ................... –65°C to 150°C

Lead Temperature (Soldering, 10 sec) .................. 300°C

(Note 1)

The ● denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at TA = 25°C. V1 = V2 = 12V, E1 = 2V, E2 = GND, GND = 0V. Current into a pin is

positive and current out of a pin is negative. All voltages are referenced to GND, unless otherwise speciﬁed.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

VV1, VV2,

VVS

Operating Supply Range V1, V2 and/or VS Must be in This Range for Proper

Operation

●3.6 36 V

IQFL Quiescent Supply Current at Low Supply

While in Forward Regulation

VV1 = 3.6V, VV2 = 3.6V. Measure Combined Current

at V1, V2 and VS Pins Averaged with VVS = 3.560V

and VVS = 3.6V (Note 3)

●70 µA

IQFH Quiescent Supply Current at High Supply

While in Forward Regulation

VV1 = 36V, VV2 = 36V. Measure Combined Current

at V1, V2 and VS Pins Averaged with VVS = 35.960V

and VVS = 36V (Note 3)

●130 µA

IQRL Quiescent Supply Current at Low Supply

While in Reverse Turn-Off

VV1 = 3.6V, VV2 = 3.6V. Measure Combined Current

at V1, V2 and VS Pins with VVS = 3.7V

●70 µA

IQRH Quiescent Supply Current at High Supply

While in Reverse Turn-Off

VV1 = 35.9V, VV2 = 35.9V. Measure Combined

Current at V1, V2 and VS Pins with VVS = 36V

●130 µA

IQCL Quiescent Supply Current at Low Supply

with E1 and E2 Active

VV1 = 3.6V, VV2 = 3.6V, VV1 – VVS = 0.9V,

VE1 = 0V, VE2 = 2V, V1 and V2 Measured Separately

●30 µA

IQCH Quiescent Supply Current at High Supply

with E1 and E2 Active

VV1 = 36V, VV2 = 36V, VV1 – VVS = 0.9V,

VE1 = 0V, VE2 = 2V, V1 and V2 Measured Separately

●65 µA

ILEAK V1, V2 and VS Pin Leakage Currents

When Other Pin Supplies Power (Note 4)

VV1 = VV2 = 28V, VVS = 0V. Measure IVS –10 –1 1 µA

VV1 = VV2 = 14V, VVS = –14V. Measure IVS –10 –1 1 µA

VV1 = VV2 = 36V, VVS = 8V. Measure IVS –10 –1 1 µA

PowerPath Controller

VFR PowerPath Switch Forward Regulation

Voltage

VV1, VV2 – VVS, 3.6V ≤ VV1, VV2 ≤ 36V,

CG1 = CG2 = 3nF

●10 40 mV

VRTO PowerPath Switch Reverse Turn-Off

Threshold Voltage

VV1, VV2 – VVS, 3.6V ≤ VV1, VV2 ≤ 36V,

CG1 = CG2 = 3nF

●–40 –10 mV

VFO PowerPath Switch Forward Fast-On

Voltage Comparator Threshold

VV1, VV2 – VVS, 6V ≤ VV1, VV2 ≤ 36V,

CG1 = CG2 = 3nF, IG1, IG2 > 500µA

●50 125 mV

ELECTRICAL CHARACTERISTICS

ABSOLUTE AXI U RATI GS

W W

PACKAGE/ORDER I FOR ATIO

U UW

GND

TOP VIEW

MS PACKAGE

10-LEAD PLASTIC MSOP

TJMAX = 130°C, θJA = 120°C/W

ORDER PART NUMBER MS PART MARKING*

LTC4416EMS

LTC4416IMS

LTC4416EMS-1

LTC4416IMS-1

LTCFC

LTCPS

Order Options Tape and Reel: Add #TR

Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF

Lead Free Part Marking: http://www.linear.com/leadfree/

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges.

*The temperature grade is identiﬁed by a label on the shipping container.

LTC4416/LTC4416-1

4416fa

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTC4416E is guaranteed to meet performance speciﬁcations

from 0°C to 85°C. Speciﬁcations over the –40°C to 85°C operating

temperature range are assured by design, characterization and correlation

with statistical process controls. The LTC4416I is guaranteed and tested

over the –40°C to 125°C operating temperature range.

Note 3: This results in the same supply current as would be observed with

an external P-channel MOSFET connected to the LTC4416 and operating in

forward regulation.

Note 4: Only 3 of 9 permutations illustrated. This speciﬁcation is the same

when power is provided through VS or V2. This speciﬁcation is only valid

when V1, V2 and VS are within 28V of each other.

Note 5: V1 and V2 are held at 12V and G1 and G2 are forced to 9V. VS is

set at 12V to measure the source current at either G1 or G2.

Note 6: V1 and V2 are held at 12V and G1 and G2 are forced to 9V. VS is

set at 11.96V to measure the sink current at either G1 or G2.

Note 7: V1 and V2 are held at 12V and G1 and G2 are forced to 9V. VS is

set at 11.875V to measure the sink current at either G1 or G2.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

G1, G2 Controller

IG(SRC)

IG(SNK)

IG(FO)

IG(OFF)

GATE Active Forward Regulation

Source Current

Sink Current

Sink Current During Fast-On

Source Current During Fast-Off

(Note 5)

(Note 6)

(Note 7)

(Note 12)

–9

500

–2

200

–500

µA

VG(ON) G1 and G2 Clamp Voltage Apply IG1 = IG2 = 2µA, VV1 = VV2 = 12V,

VVS = 11.8V, Measure VV1 – VG1 or VV2 – VG2

●7.4 8.25 9.1 V

VG(OFF) G1 and G2 Off Voltage Apply IG1 = IG2 = –30µA, VV1 = VV2 = 12V,

VVS = 12.2V, Measure VV1 – VG1 or VV2 – VG2

●0.350 0.920 V

tG(ON) G1 and G2 Turn-On Time VGS < –6V, CG = 17nF (Note 8) ●60 µs

tG(OFF) G1 and G2 Turn-Off Time VGS > –1.5V, CG = 17nF (Note 9) ●30 µs

tE(OFF) Enable Comparator Turn-Off Delay (Note 14) LTC4416-1 Only ●6 µs

H1 and H2 Open-Drain Drivers

IH(OFF) H1 and H2 Off Current 3.6V ≤ VV1, VV2 ≤ 36V (Note 10) ●–1 1 µA

VH(ON) H1 and H2 On Voltage 3.6V ≤ VV1, VV2 ≤ 36V (Note 10) ●100 mV

tH(ON) H1 and H2 Turn-On Time (Note 11) 5 µs

tH(OFF) H1 and H2 Turn-Off Time (Note 11) 10 µs

E1 and E2 Enable Input Comparators

VREF E1 and E2 Input Threshold Voltage 3.6V ≤ VV1, VV2 ≤ 36V, –40°C to 85°C

4V ≤ VV1, VV2 ≤ 36V, –40°C to 125°C

1.180

1.215

1.240

IEE1 and E2 Input Leakage Current 0V ≤ VE1, VE2 ≤ 1.5V ●–100 100 nA

IG(ENOFF) Source Current When Other Channel

Enabled (Note 13)

LTC4416

LTC4416-1

–9

–500

–3

µA

The ● denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at TA = 25°C. V1 = V2 = 12V, E1 = 2V, E2 = GND, GND = 0V. Current into a pin is

positive and current out of a pin is negative. All voltages are referenced to GND, unless otherwise speciﬁed.

ELECTRICAL CHARACTERISTICS

Note 8: V1 and V2 are held at 12V and VS is stepped from 12.2V to 11.8V

to trigger the event. G1 and G2 voltages are initially VG(OFF).

Note 9: V1 and V2 are held at 12V and VS is stepped from 11.8V to 12.2V

to trigger the event. G1 and G2 voltages are initially VG(ON).

Note 10: H1 and H2 are forced to 2V. E1 and E2 are forced to 1.5V to

measure the off current of H1 and H2. H1 and H2 are forced with 1mA to

measure the on voltage of H1 and H2.

Note 11: H1 and H2 are forced to 2V. E1 and E2 are stepped from 1.3V

to 1.1V to measure tS(ON). E1 and E2 are stepped from 1.1V to 1.3V to

measure tS(OFF).

Note 12: V1 and V2 are held at 12V and G1 and G2 are forced to 9V. VS is

set to 12.05V to measure the source current at either G1 or G2.

Note 13: V1 and V2 are held at 12V and G1 and G2 are forced to 9V. VS

is set to 12V to measure the source current at either G1 or G2 when the

channel is deselected.

Note 14: V1 and V2 are held at 12V, VS = 11.96V and G1 and G2 have a 4k

resistor each to 9V. Measure the delay after the channel is disabled until

the gate signal begins to pull high.

LTC4416/LTC4416-1

4416fa

TYPICAL PERFOR A CE CHARACTERISTICS

U W

VRTO vs Temperature and Supply

Voltage

SUPPLY VOLTAGE (V)

VFR (mV)

5 10 15 20

4416 G01

27°C

30 35 40

–40°C

125°C

SUPPLY VOLTAGE (V)

VRTO (mV)

–22

–21

–20

15 25 40

4416 G02

–23

–24

–25

5 10 20 30 35

–40°C

125°C

27°C

TEMPERATURE (°C)

–50

0.80

CURRENT (A)

0.90

1.00

1.10

1.20

–25 0 25 50

4416 G03

75 100 125 150

NORMALIZED AT

VIN = 3.6V

VIN = 20V

VIN = 36V

VV1 = VV2 = VVS = VVIN

3.6V ≤ VVIN ≤ 36V

Normalized Quiescent Supply

Current vs Temperature

VFR vs Temperature and Supply

Voltage

VGn(ON) vs Temperature and VIN

V1, V2 and VS Pin Leakage vs

Temperature

TEMPERATURE (°C)

–50

CURRENT (µA)

–1.00

–0.75

150

4416 G04

–1.25

–1.50 050 100

–0.25

–0.50 IV1: VV2, VVS – VV1 = 28V

IV2: VV1, VVS – VV2 = 28V

IVS: VV1, VV2 – VVS = 28V

TEMPERATURE (°C)

–50

8.65

8.75

8.95

100

4416 G05

8.55

8.45

0 50 150

8.35

8.25

8.85

VGn(ON) (V)

VIN = 10V

IGn = 2µA

VV1 = VV2 = VVIN

VVS = VVIN – 200mV

VIN = 36V

TEMPERATURE (°C)

–50

VGn(OFF) (V)

0.20

0.30

150

4416 G06

0.10

0050 100

0.50

0.40

IGn = 0µA

IGn = –10µA

IGn = –20µA

3.6V ≤ VV1

VV2 ≤ 36V

VVS = VVIN + 200mV

VGn(OFF) vs Temperature and IGn

tG(ON) vs Temperature tG(OFF) vs Temperature

TEMPERATURE (°C)

–50

tG(ON) (µs)

150

4416 G07

0050 100

100

tG(ON) (µs) AT 10V

tG(ON) (µs) AT 36V

CGn = 15nF

VVS = VVIN – 200mV

10V ≤ VV1

VV2 ≤ 36V

TEMPERATURE (°C)

–50

tG(OFF) (µs)

150

4416 G08

15 050 100

tG(OFF) (µs) AT 10V

tG(OFF) (µs) AT 36V

CGn = 15nF

VVS = VVIN + 200mV

10V ≤ VV1

VV2 ≤ 36V

LTC4416/LTC4416-1

4416fa

PI FU CTIO S

U U U

H1 (Pin 1): Open-Drain Comparator Output of the E1 Pin.

If E1 > VREF, the H1 pin will go high impedance, otherwise

the pin will be grounded. The maximum voltage permitted

on this pin is 7V. This pin provides support for setting up

hysterisis to an external resistor network.

E1 (Pin 2): LTC4416 Comparator Enable Input. A high

signal greater than VREF will enable the V1 path. The ideal

diode action will then determine if the V1 path should turn

on by controlling any PFET(s) connected to the G1 pin.

If the E1 signal is driven low, the V1 path will perform a

“soft-off” provided the PFET(s) are properly conﬁgured

for blocking DC current. An internal current sink will pull

the E1 pin down when the E1 input exceeds 1.5V.

E1 (Pin 2): LTC4416-1 Comparator Enable Input. A high

signal greater than VREF will enable the V1 path. The ideal

diode action will then determine if the V1 path should turn

on by controlling any PFET(s) connected to the G1 pin.

If the E1 signal is driven low, the V1 path will be quickly

disabled by enabling the “fast-off” feature, pulling the G1

gate high. An internal current sink will pull the E1 pin down

when the E1 input exceeds 1.5V.

GND (Pin 3): Ground. This pin provides a power return

path for all the internal circuits.

E2 (Pin 4): LTC4416 Comparator Enable Input. A low

signal less than VREF will enable the V2 path. The ideal

diode action will then determine if the V2 path should turn

on by controlling any PFET(s) connected to the G2 pin.

If the E2 signal is driven high, the V2 path will perform a

“soft-off” provided the PFET(s) are properly conﬁgured

for blocking DC current. An internal current sink will pull

the E2 pin down when the E2 input exceeds 1.5V.

E2 (Pin 4): LTC4416-1 Comparator Enable Input. A low

signal less than VREF will enable the V2 path. The ideal

diode action will then determine if the V2 path should turn

on by controlling any PFET(s) connected to the G2 pin.

If the E2 signal is driven high, the V2 path will be quickly

disabled by enabling the “fast-off” feature, pulling the G2

gate high. An internal current sink will pull the E2 pin down

when the E2 input exceeds 1.5V.

H2 (Pin 5): Open-Drain Comparator Output of the E2 Pin.

If E2 > VREF, the H2 pin will go high impedance, otherwise

the pin will be grounded. The maximum voltage permitted

on this pin is 7V. This pin provides support for setting up

hysterisis to an external resistor network.

G2 (Pin 6): Second P-Channel MOSFET Power Switch

Gate Drive Pin. This pin is directed by the second power

controller to maintain a forward regulation voltage (VFR)

of 25mV between the V2 and VS pins when V2 is greater

than VS. When V2 is less than VS, the G2 pin will pull up

to the VS pin voltage, turning off the second P-channel

power switch.

V2 (Pin 7): Second Input Supply Voltage. Supplies power

to the second power controller and the band-gap refer-

ence. V2 is one of the two voltage sense inputs to the

second internal power controller (the other input to the

second internal power controller is the VS pin). This input

is usually supplied power from the second, or backup,

power source. This pin can be bypassed to ground with

a capacitor in the range of 0.1µF to 10µF if needed to

suppress load transients.

VS (Pin 8): Power Sense Input Pin. Supplies power to

the internal circuitry of both the ﬁrst and second power

controller and the band-gap reference. This pin is also a

voltage sense input to both internal analog controllers

(the other input to the ﬁrst controller is the V1 pin and

the other input to the second controller is the V2 pin.)

This input may also be supplied power from an auxiliary

source which also supplies current to the load.

V1 (Pin 9): First Input Supply Voltage. Supplies power to

the ﬁrst power controller and the band-gap reference. V1

is one of the two voltage sense inputs to the ﬁrst internal

power controller (the other input to the ﬁrst internal power

controller is the VS pin). This input is usually supplied

power from the ﬁrst, or primary, power source. This pin

can be bypassed to ground with a capacitor in the range

of 0.1µF to 10µF if needed to suppress load transients.

G1 (Pin 10): First P-Channel MOSFET Power Switch Gate

Drive Pin. This pin is directed by the ﬁrst power controller

to maintain a forward regulation voltage (VFR) of 25mV

between the V1 and VS pins when V1 is greater than VS.

When V1 is less than VS, the G1 pin will pull up to the VS pin

voltage, turning off the ﬁrst P-channel power switch.

LTC4416/LTC4416-1

4416fa

BLOCK DIAGRA

VREF

–

VREF

GND

–

RAIL2

RAIL1

SECOND

ANALOG

CONTROLLER

BAND-GAP

REFERENCE

IG(SRC) IG(OFF)

IG2

8.5V

IG(SNK) IGFON(SNK)

FIRST

ANALOG

CONTROLLER

IG(SRC) IG(OFF) 8.5V

IG(SNK)

VREF

RAILBG

IGFON(SNK)

4416 BD

H1 1

EN2 EN2

EN1

EN2

EN1

IG1

Operation can best be understood by referring to the

Block Diagram which illustrates the internal circuit blocks.

The LTC4416/LTC4416-1 are divided into three sections,

namely:

1. The channel 1 controller consisting of A1, C1, the “ﬁrst

analog contoller,” the G1 drivers and the H1 output

driver.

2. The band-gap reference

3. The channel 2 controller consisting of A2, C2, the

“second analog controller,” the G2 drivers and the H2

output driver.

Each of the three sections has its own derived internal

power supply referred to as a rail. RAIL1 provides power

to the channel 1 controller. RAIL2 provides power to the

channel 2 controller. The internal RAILBG provides power

to the band-gap reference. The internal rail1 derives its

power from the higher voltage of V1 and VS. The internal

rail2 derives its power from the higher voltage of V2 and

VS. RAILBG derives its power from the highest voltage of

V1, V2, and VS. All three sections share a common ground

connected to the GND pin.

OPERATIO

LTC4416/LTC4416-1

4416fa

OPERATIO

The band-gap reference provides internal bias currents

used by the channel 1 and channel 2 controllers. It also

provides a precision voltage reference, VREF, used by com-

parators C1 and C2. The band-gap reference is powered

as long as a minimum operational voltage is present on

either V1, V2, or VS.

The C1 and C2 comparators provide a ﬁxed comparison

between the E1 and E2 inputs, respectively, and the in-

ternal VREF signal. The comparator outputs are directly

represented by the H1 and H2 open-drain outputs. The

output states of H1 and H2 are not dependent upon

the relative voltage difference between VV1 – VVS and

VV2 – VVS, respectively. If VE1 is less than VREF, the H1

open-drain output will be low impedance to GND. If VE2

is less than VREF, the H2 open-drain output will be low

impedance to GND.

The A1 and A2 circuits act both as a high side

transconductance ampliﬁers and as comparators. Both

A1 and A2 act identically when the analog controllers

are fully enabled. The relationship of the G1 current is

represented by Figure 1.

When VV1 – VVS < VRTO, the A1 activates the reverse turn-

off condition and the IG1 current is IG(OFF). When VRTO <

VV1 – VVS < VFR, the A1 acts as a class A output and the

IG1 current is ﬁxed at IG(SRC). As the VV1 – VVS voltage

VV1 – VVS

4416 F01

IG1

VRTO

VFR VFON

IGFON(SNK)

IG(SNK)

IG(SRC)

IG(OFF) NOT DRAWN TO SCALE

Figure 1. IG1 vs VV1 – VVS

approaches the forward regulation voltage, VFR, the IG(SNK)

current will be proportional to VV1 – VVS. When VV1 – VVS

> VFON, the A1 activates the fast-on condition, tG(ON), and

the IG1 current is set to IGFON(SNK).

LTC4416 OPERATION

The interaction of the LTC4416 analog controllers distin-

guish the operation of the LTC4416 from a simple circuit

using two PowerPath controllers. Table 1 explains the

different operation modes of the analog controllers.

Table 1. LTC4416 Operational Modes

E1 E2 Operation Mode IG(OFF)1 IG(OFF)2

1 0 Load Sharing Enabled Enabled

1 Sense V1 is Less Than V2 Enabled

Sense 0 V1 is Greater Than V2 Enabled

0 X Channel 1 Disabled.

Do Not Use

Disabled

X 1 Channel 2 Disabled.

Do Not Use

Disabled

0 1 Both Channels Disabled Disabled Disabled

The LTC4416 has six modes of operation. Each mode of

operation is dependent upon the conﬁguration of the E1

and E2 input pins.

Load Sharing Operation

The load sharing mode conﬁgures the LTC4416 into two

independent PowerPath controllers. This is accomplished

by fully enabling both the ﬁrst analog controller and the

second analog controller. Both channels will implement

the gate drive outlined in Figure 1.

V1 is Less Than V2 Operation

Channel 1 is fully enabled. If VV1 – VVS < VRTO, channel 1

will implement all of the IG1 currents listed in Figure 1.

When VE2 is above the VREF threshold, channel 2 is in a

“soft-off mode”. This means that G2 will only provide an

IG(SRC) current instead of either an IG(SRC) or an IG(OFF)

current.

When VE2 is below the VREF threshold, channel 2 is fully

enabled, and G2 will become active implementing the IG

output current listed in Figure 1.

LTC4416/LTC4416-1

4416fa

V1 is Greater Than V2 Operation

When VE1 is below the VREF threshold, channel 1 is in

a “soft-off mode”. This means that G1 will only provide

an IG(SRC) current instead of an IG(SNK) or an IGFON(SNK)

current.

When VE1 is above the VREF threshold, channel 1 is im-

mediately fully enabled, and G1 will become active imple-

menting the output current listed in Figure 1.

Channel 2 is fully enabled. If VV1 – VVS < VRTO, channel 2

will implement all of the IG2 currents listed in Figure 1.

Channel 1 is Disabled

The LTC4416 is not designed to have channel 1 disabled

by grounding E1 and leaving E2 in an indeterminate state.

If this happens, the channel 2 PowerPath controller will

not have reverse turn-off capability. No electrical harm to

the LTC4416 will occur.

Channel 2 is Disabled

The LTC4416 is not designed to have channel 2 disabled

by connecting E2 high and leaving E1 in an indeterminate

state. If this happens, the channel 1 PowerPath controller

will not have reverse turn-off capability. No electrical harm

to the LTC4416 will occur.

Both Channels Disabled

When both channels of the LTC4416 are disabled, both

G1 and G2 currents are set to IG(SRC).

LTC4416-1 OPERATION

The LTC4416-1 is designed for overvoltage/undervoltage

protection or when either voltage path must be turned off

rapidly, regardless of the status of the other voltage input.

The LTC4416-1 does not implement the soft-off feature

implemented in the LTC4416. The E1 and E2 inactive will

force the IG current of their respective channel to IG(OFF).

Table 2 explains the operation of the E1 and E2 inputs.

The term “active” implies that IG(OFF) current is forced on

the Gn pins regardless of the VVn – VVS value. The term

“enabled” implies that IG(OFF) current is provide on the Gn

pins if and only if VVn – VVS < VRTO.

Table.2 LTC4416-1 Operational Modes

E1 E2 Operation Mode IG(OFF)1 IG(OFF)2

0 X Undervoltage Protection Active

X 1 Overvoltage Protection Active

1X Channel 1 PowerPath Enabled

X 0 Channel 2 PowerPath Enabled

LTC4416

The LTC4416 is designed to support three major ap-

plications. The ﬁrst two applications assume that V1 is

the primary power source and V2 is the backup power

source. The ﬁrst application is where the V1 power supply

is normally less than V2. The second application is where

the V1 power supply is normally greater than V2. The third

application addresses the load sharing case where both

V1 and V2 are relatively equal in value.

V1 is Less Than V2

Figure 2 illustrates the external resistor conﬁguration for

this case. Figure 2

OPERATIO

APPLICATIO S I FOR ATIO

W UU U

LTC4416

PRIMARY SUPPLY

BACKUP SUPPLYV2 = 14.4V

V1 = 9V (FAIL)

V1 = 10.8V (RESTORE)

SUP75P03_07

GND

R2E

105k

R2C

24.9k

R2A

158k

GND

Q2 Q3

4416 F02

LTC4416/LTC4416-1

4416fa

APPLICATIO S I FOR ATIO

W UU U

This conﬁguration would be used where V1 is a 12V power

supply and the V2 power supply is a 4-cell Li-Ion battery

pack. When V1 is 12V, E2 disables the V2 source from

being connected to VS through Q2A and Q2B by forcing

G2 to V2, H2 is open circuit. E1 is connected to a voltage

greater than the VREF to keep the V1 to VS path active. The

VS output can be shut completely off by grounding the E1

input. The LTC4416 takes its power from the higher of V1,

V2 and VS. This conﬁguration will provide power from V1

to VS until the V1 supply drops below 9V.

When V1 drops below 9V, the H2 pin closes to GND, G2

drops to a VCLAMP below V2 and G1 rises to the VS volt-

age level. V2 will supply current to VS until V1 rises above

10.8V. The H1 output will be open until the E1 input drops

below the VREF voltage level.

The V1 VFAIL is determined by:

V V R A R C

R C

Vk k

FAIL ETH

•

. • .

2 2

1 222 158 24 9

24 9kk V=8 98.

The V1 VRESTORE is determined by:

V V R A R C R E

R C R E

RESTORE ETH

( )

•

. •

2 2 2

2 2

1 222 1558 24 9 105

24 9 105 10 81

k k k

k k V

( )

V1 is Greater Than V2

Figure 3 illustrates the external resistor conﬁguration for

this case.

This conﬁguration would be used where V1 is a 12V power

supply and the V2 power supply is a 3-cell Li-Ion battery

pack. When V1 is 16V, E1 enables the V1 source as being the

primary supply, thus disabling the V2 supply since V1 > V2.

When E1 > VREF, the H1 output is open. The VS output can be

shut completely off by grounding the H1 input and forcing

E2 > VREF. The LTC4416 takes its power from the higher of

V1, V2 and VS. This conﬁguration will provide power from

V1 to VS until the V1 supply drops below 12V.

When V1 drops below 12V, the H1 pin closes to GND,

G2 drops to a VCLAMP below V2 and G1 rises to the V1

voltage level. V2 will supply current to VS until V1 rises

above 13.5V. The H2 output will be shorted to GND until

the E2 input goes above the VREF voltage level.

The V1 VFAIL is determined by:

V V R A R C

R C

Vk k

FAIL ETH

•

. • .

1 1

1 222 221 24 9

24 9kk V=12 07.

The V1 VRESTORE is determined by:

V V R A R C R D

R C R D

RESTORE ETH

( )

•

. •

1 1 1

1 1

1 222 2221 24 9 187

24 9 187 13 51

k k k

k k V

( )

Load Sharing

Figure 4 illustrates the conﬁguration for this case.

This conﬁguration would be used where V1 and V2 are

relatively the same voltage. In this case the LTC4416 acts

as two interconnected ideal diode controllers. VS will be

supplied by the higher of the two supplies, V1 and V2. If

V1 and V2 are exactly the same, then 50% of the current

for VS will be supplied by each supply. As the two supplies

LTC4416

PRIMARY SUPPLY

BACKUP SUPPLYV2 = 10.8V

V1 = 12V (FAIL)

V1 = 13.5V (RESTORE)

SUP75P03_07

Q1 Q2

SUP75P03_07

GND

R1D

187k

R1C

24.9k

R1A

221k

GND

4416 F03

Figure 3

LTC4416/LTC4416-1

4416fa

differ by more than 100mV, 100% of the load will come

from the higher of V1 or V2.

The user has the option of using E1 and E2 to disable

one of the two supplies by connecting them to a digital

controller. If E1 is brought low, V1 will no longer supply

current to VS. If E2 is brought high, V2 will no longer sup-

ply current to VS. If E1 is brought low and E2 is brought

high, VS will be disabled.

Figure 5 shows the same application without the shut-

down option. It has one-half the losses of Figure 4 and is

conﬁgured for 5V rails.

disabled. This rapid turn-off feature is desirable when the

supply cannot tolerate certain voltage excursions under

load, or when the load is being protected from a rapidly

changing input supply.

Under and Overvoltage Shutdown

Refer to Figure 6 for an application circuit which disables

the power to the load when the input voltage gets too low

or too high. When VIN starts from zero volts, the load to

the output is disabled until VIN reaches 5.5V. The V1 path is

enabled and the load remains on the input until the supply

exceeds 13.5V. At that voltage, the V2 path is disabled. As

the input falls, the voltage source will be reconnected to

the load when the input drops to 12V and the V2 path is

enabled. Finally, the load will be removed from the input

supply when the voltage drops below 5V.

APPLICATIO S I FOR ATIO

W UU U

LTC4416

V2 = 12V

V1 = 12V

Si7483ADP

GND

TO HOST

CONTROLLER

Q3 Q4

Q1 Q2

4416 F04

LTC4416

SUPPLY 2

SUPPLY 1

Si7495DP

GND

4416 F05

Figure 4

Figure 5. Dual PowerPath for Current Sharing

LTC4416-1

The LTC4416-1 will support all three of the LTC4416

applications without the “soft-off” feature. The only dif-

ference in the two designs is the LTC4416-1 will rapidly

switch off the load from a supply whenever a channel is

LTC4416-1

GND

R1D

182k

R1C

24.3k

R2C

24.9k

GND

VIN

R2E

187k

VTH1 WITH

HYSTERESIS

VTH2 WITH

HYSTERESIS

VOUT

LOAD

4416 F06

R1A

75k

R2A

221k

UV ENABLED AT 5V, VIN RESTORED TO LOAD WHEN VIN RISES TO 5.5V

OV ENABLED AT 13.5V, VIN RESTORED TO LOAD WHEN VIN FALLS TO 12V

Figure 6

Undervoltage

V V R A R C

R C

Vk k

FAIL ETH

•

. • .

1 1

1 222 75 24 3

24 3 == 4 99. V

V V R A R C R D

R C R D

RESTORE ETH

( )

•

. •

1 1 1

1 1

1 222 755 24 3 182

24 3 182 5 497

k k k

k k V

( )

LTC4416/LTC4416-1

4416fa

Overvoltage

V V R A R C R E

R C R E

FAIL ETH

•||

. •

2 2 2

2 2

1 222 221 ++ =

24 9 187

24 9 187 13 51

. ||

. || .

k k

k k V

V V R A R C

R C

Vk k

RESTORE ETH

•

. • .

2 2

1 222 221 24 9

244 9 12 07

kV=

The over and undervoltage lockout circuits are shown here

working in tandem. It is possible to conﬁgure the circuit

for either over or undervoltage lockout by using only one

of the voltage paths and eliminating the components from

the other. Refer to Figure 7 for an LTC4416-1 conﬁgured

for overvotlage protection. If the input does not go below

ground, transistor Q1 can be eliminated.

The LTC4416-1 should be used in this conﬁguration rather

than the LTC4416 because the LTC4416-1 will turn-off

rapidly if an over or undervoltage condition is detected.

Refer to Figure 8 for a comparison of the transient response

of the two ICs using the circuit conﬁguration of Figure 6.

The LTC4416 will not turn-off quickly in an overvoltage

or undervoltage condition because the “fast-off” feature

is not enabled. This will cause the output to travel beyond

the desired range.

APPLICATIO S I FOR ATIO

W UU U

Figure 9 contains a rapidly changing input voltage on a

much smaller time scale in comparison to Figure 8. The

LTC4416 will require the tE(OFF) time prior to the rapid pull-

up current being applied. The gate voltage will be pulled

high with IG(OFF) which has a minimum current of 500µA.

The discharge time of the gate will be dependent on the

capacitance of the external FET and the initial gate-source

voltage of the circuit. The total time delay will equal:

t t t

tC V

DELAY E OFF DISCHARGE

E OFF GS

= +

( )

( ) (

•∆

OOFF)

Figure 8. Transient Response of the LTC4416 vs the LTC4416-1

Light Load with a Large Capacitor on VOUT

Figure 9. Close Up of the Transient Response of the LTC4416-1

to a Rapidly Rising Input

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

Figure 7. LTC4416-1 Conﬁgured for Overvoltage Protection

LTC4416-1

GND

R2C

24.9k

GND

VIN

R2E

187k

VTH2 WITH

HYSTERESIS

VOUT

LOAD

4416 F07

R1A

100k

Q1 Q2

R2A

221k

0 20

VIN

VOUT

LTC4416-1

VOUT

LTC4416

TIME (ms) 4416 F08

60 80

VOLTAGE (V)

VOUT

LTC4416-1

VOUT

LTC4416

13.40

13.45

LTC4416-1

GATE DISCHARGE TIME

= C

13.50

13.55

13.60 VIN

LTC4416

0 10 20

TIME (µs) 4416 F09

305 15

tE(OFF)

25 35 40

VOLTAGE (V)

∆V

IG(OFF)

LTC4416/LTC4416-1

4416fa

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com

 LINEAR TECHNOLOGY CORPORATION 2005

LT 0507 REV A • PRINTED IN USA

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PACKAGE DESCRIPTIO

MSOP (MS) 0603

0.53 ± 0.152

(.021 ± .006)

SEATING

PLANE

0.18

(.007)

1.10

(.043)

MAX

0.17 – 0.27

(.007 – .011)

TYP

0.127 ± 0.076

(.005 ± .003)

0.86

(.034)

REF

0.50

(.0197)

BSC

1 2 34 5

4.90 ± 0.152

(.193 ± .006)

0.497 ± 0.076

(.0196 ± .003)

REF

8910 76

3.00 ± 0.102

(.118 ± .004)

(NOTE 3)

3.00 ± 0.102

(.118 ± .004)

(NOTE 4)

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

0.254

(.010) 0° – 6° TYP

DETAIL “A”

GAUGE PLANE

5.23

(.206)

MIN

3.20 – 3.45

(.126 – .136)

0.889 ± 0.127

(.035 ± .005)

RECOMMENDED SOLDER PAD LAYOUT

0.305 ± 0.038

(.0120 ± .0015)

TYP

0.50

(.0197)

BSC

MS Package

10-Lead Plastic MSOP

(Reference LTC DWG # 05-08-1661)