HEXFET® Power MOSFET
Notes through are on page 9
Features and Benefits
Applications
Secondary Side Synchronous Rectification
Inverters for DC Motors
DC-DC Brick Applications
Boost Converters
Features Benefits
PQFN 5X6 mm
V
DS
75 V
R
DS(on) max
(@V
GS
= 10V)
5.9 mΩ
Q
g (typical)
65 nC
R
G (typical)
1.2 Ω
I
D
(@T
mb
= 25°C)
100
h
A
Low R
DSon
( 5.9mΩ) Lower Conduction Losses
Low Thermal Resistance to PCB (
0.8°C/W) Enables Better Thermal Dissipation
100% Rg tested Increased Reliability
Low Profile (
0.9 mm)
results in
Industry-Standard Pinout
Multi-Vendor Compatibility
Compatible with Existing Surface Mount Techniques Easier Manufacturing
RoHS Compliant Containing no Lead, no Bromide and no Halogen Environmentally Friendlier
MSL1, Industrial Qualification Increased Reliability
Absolute Maximum Ratings
Parameter Units
V
DS
Drain-to-Source Voltage
V
GS
Gate-to-Source Voltage
I
D
@ T
A
= 25°C Continuous Drain Current, V
GS
@ 10V
I
D
@ T
A
= 70°C Continuous Drain Current, V
GS
@ 10V
I
D
@ T
mb
= 25°C Continuous Drain Current, V
GS
@ 10V
I
D
@ T
mb
= 100°C Continuous Drain Current, V
GS
@ 10V
I
DM
Pulsed Drain Current
c
P
D
@T
A
= 25°C Power Dissipation
g
P
D
@ T
mb
= 25°C Power Dissipation
g
Linear Derating Factor
g
W/°C
T
J
Operating Junction and
T
STG
Storage Temperature Range
13
100
h
-55 to + 150
3.6
0.029
156
V
W
A
°C
Max.
17
88
400
±20
75
IRFH5007PbF
Form
Quantity
IRFH5007PBF PQFN 5mm x 6mm Tape and Reel 4000 IRFH5007TRPBF
Base Part Number Package Type
Standard Pack
Orderable Part Number
1 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback May 19, 2015
IRFH5007PbF
2 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback May 19, 2015
S
D
G
Static @ T
J
= 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units
BV
DSS
Drain-to-Source Breakdown Voltage 75 ––– ––– V
ΔΒ
V
DSS
/
Δ
T
J
Breakdown Voltage Temp. Coefficient ––– 0.09 ––– V/°C
R
DS(on)
Static Drain-to-Source On-Resistance ––– 5.1 5.9
V
GS(th)
Gate Threshold Voltage 2.0 ––– 4.0 V
Δ
V
GS(th)
Gate Threshold Voltage Coefficient ––– -8.4 ––– mV/°C
I
DSS
Drain-to-Source Leakage Current ––– ––– 20
––– ––– 250
I
GSS
Gate-to-Source Forward Leakage ––– ––– 100
Gate-to-Source Reverse Leakage ––– ––– -100
gfs Forward Transconductance 100 ––– ––– S
Q
g
Total Gate Charge ––– 65 98
Q
gs1
Pre-Vth Gate-to-Source Charge ––– 11 –––
Q
gs2
Post-Vth Gate-to-Source Charge ––– 4.5 –––
Q
gd
Gate-to-Drain Charge ––– 20 –––
Q
godr
Gate Charge Overdrive ––– 29.5 ––– See Fig.17 & 18
Q
sw
Switch Charge (Q
gs2
+ Q
gd
)
––– 24.5 –––
Q
oss
Output Charge ––– 21 ––– nC
R
G
Gate Resistance ––– 1.2 –––
Ω
t
d(on)
Turn-On Delay Time ––– 10 –––
t
r
Rise Time ––– 14 –––
t
d(off)
Turn-Off Delay Time ––– 30 –––
t
f
Fall Time ––– 11 –––
C
iss
Input Capacitance ––– 4290 –––
C
oss
Output Capacitance ––– 510 –––
C
rss
Reverse Transfer Capacitance ––– 210 –––
Avalanche Characteristics
Parameter Units
E
AS
Single Pulse Avalanche Energy
d
mJ
I
AR
Avalanche Current
c
A
Diode Characteristics
Parameter Min. Typ. Max. Units
I
S
Continuous Source Current
(Body Diode)
h
I
SM
Pulsed Source Current
(Body Diode)
c
V
SD
Diode Forward Voltage ––– ––– 1.3 V
t
rr
Reverse Recovery Time ––– 31 47 ns
Q
rr
Reverse Recovery Charge ––– 170 255 nC
t
on
Forward Turn-On Time Time is dominated by parasitic Inductance
V
DS
= V
GS
, I
D
= 150μA
A
100
––– ––– 400
––– –––
nA
ns
pF
nC
Conditions
See Fig.15
Max.
250
50
ƒ = 1.0MHz
V
DS
= 38V
–––
Conditions
V
GS
= 0V, I
D
= 250μA
Reference to 25°C, I
D
= 1mA
V
GS
= 10V, I
D
= 50A
e
MOSFET symbol
V
DS
= 16V, V
GS
= 0V
V
DD
= 38V, V
GS
= 10V
I
D
= 50A
V
GS
= 0V
V
DS
= 25V
V
GS
= 20V
V
GS
= -20V
V
DS
= 75V, V
GS
= 0V
T
J
= 25°C, I
F
= 50A, V
DD
= 38V
di/dt = 500A/μs
e
T
J
= 25°C, I
S
= 50A, V
GS
= 0V
e
showing the
integral reverse
p-n junction diode.
V
GS
= 10V
Typ.
–––
R
G
=1.8Ω
V
DS
= 15V, I
D
= 50A
V
DS
= 75V, V
GS
= 0V, T
J
= 125°C
mΩ
μA
I
D
= 50A
Thermal Resistance
Parameter Typ. Max. Units
R
θ
JC-mb
Junction-to-Mounting Base 0.5 0.8
R
θ
JC
(Top) Junction-to-Case
f
––– 15 °C/W
R
θ
JA
Junction-to-Ambient
g
––– 35
R
θ
JA
(<10s) Junction-to-Ambient
g
––– 22
IRFH5007PbF
3 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback May 19, 2015
Fig 4. Normalized On-Resistance vs. Temperature
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage
234567
VGS, Gate-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
TJ = 25°C
TJ = 150°C
VDS = 25V
60μs PULSE WIDTH
-60 -40 -20 020 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 50A
VGS = 10V
0.1 110 100 1000
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
VGS
TOP 10V
8.0V
6.0V
5.0V
4.5V
4.25V
4.0V
BOTTOM 3.75V
60μs PULSE WIDTH
Tj = 25°C
3.75V
0.1 110 100 1000
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
3.75V
60μs PULSE WIDTH
Tj = 150°C
VGS
TOP 10V
8.0V
6.0V
5.0V
4.5V
4.25V
4.0V
BOTTOM 3.75V
0 20406080100
QG, Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
VGS, Gate-to-Source Voltage (V)
VDS= 60V
VDS= 38V
VDS= 15V
ID= 50A
110 100
VDS, Drain-to-Source Voltage (V)
100
1000
10000
100000
C, Capacitance (pF)
VGS = 0V, f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
IRFH5007PbF
4 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback May 19, 2015
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Mounting Base
Fig 8. Maximum Safe Operating Area
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 10. Threshold Voltage vs. Temperature
0.2 0.4 0.6 0.8 1.0 1.2 1.4
VSD, Source-to-Drain Voltage (V)
0.1
1
10
100
1000
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 150°C
VGS = 0V
-75 -50 -25 025 50 75 100 125 150
TJ , Temperature ( °C )
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
VGS(th), Gate threshold Voltage (V)
ID = 150μA
ID = 500μA
ID = 1.0mA
ID = 1.0A
25 50 75 100 125 150
TC , Case Temperature (°C)
0
20
40
60
80
100
120
ID, Drain Current (A)
Limited By Package
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
0.01
0.1
1
10
100
1000
10000
ID, Drain-to-Source Current (A)
Tc = 25°C
Tj = 150°C
Single Pulse
10msec
1msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100μsec
DC
1E-006 1E-005 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
Thermal Response ( Z thJC ) °C/W
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
IRFH5007PbF
5 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback May 19, 2015
Fig 13. Maximum Avalanche Energy vs. Drain Current
Fig 12. On-Resistance vs. Gate Voltage
46810 12 14 16 18 20
VGS, Gate -to -Source Voltage (V)
2
4
6
8
10
12
14
16
RDS(on), Drain-to -Source On Resistance (mΩ)
ID = 50A
TJ = 25°C
TJ = 125°C
25 50 75 100 125 150
Starting TJ , Junction Temperature (°C)
0
100
200
300
400
500
600
700
800
900
1000
1100
EAS , Single Pulse Avalanche Energy (mJ)
ID
TOP 6.6A
13A
BOTTOM 50A
Fig 14. Typical Avalanche Current vs. Pulsewidth
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
0.1
1
10
100
1000
Avalanche Current (A)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 125°C.
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 125°C and
Tstart =25°C (Single Pulse)
IRFH5007PbF
6 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback May 19, 2015
Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Fig 18a. Gate Charge Test Circuit Fig 18b. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
Fig 16b. Unclamped Inductive Waveforms
Fig 16a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
Fig 17a. Switching Time Test Circuit Fig 17b. Switching Time Waveforms
VGS
VDS
90%
10%
td(on) td(off)
trtf
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1
RD
VGS
RG
D.U.T.
10V
+
-
VDD
VGS
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T
1K
VCC
DUT
0
L
s
IRFH5007PbF
7 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback May 19, 2015
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
PQFN 5x6 Outline "B" Package Details
For more information on board mounting, including footprint and stencil recommendation, please refer to application note AN-1136:
http://www.irf.com/technical-info/appnotes/an-1136.pdf
For more information on package inspection techniques, please refer to application note AN-1154:
http://www.irf.com/technical-info/appnotes/an-1154.pdf
PQFN 5x6 Outline "G" Package Details
IRFH5007PbF
8 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback May 19, 2015
PQFN 5x6 Tape and Reel
Bo
W
P1
Ao
Ko
CODE
TAPE DIMENSIONS
REEL DIMENSIONS
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Dimens i on design to accommodate the component width
Dimens ion design to accommodate the component lenght
Dimens ion design to accommodate the component thicknes s
P i tch between s ucces s i ve cavi ty center s
Overall width of the carr i er tape
DES CRIPT ION
Type
Package
5 X 6 PQF N
Note: All dimens ion are nominal
Diameter
Reel QTY
Width
Reel
(mm)
Ao
(mm)
Bo
(mm)
Ko
(mm)
P1
(mm)
W
Quadrant
Pin 1
(Inch) W1
(mm)
13 4000 12.4 6.300 5.300 1.20 8.00 12 Q1
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
XXXX
XYWWX
XXXXX
INTERNATIONAL
RECTIFIER LOGO
PART NUMBER
MARKING CODE
(Per Marking Spec)
ASSEMBLY
SITE CODE
(Per SCOP 200-002)
DATE CODE
PIN 1
IDENTIFIER LOT CODE
(Eng Mode - Min last 4 digits of EATI#)
(Prod Mode - 4 digits of SPN code)
PQFN 5x6 Part Marking
IRFH5007PbF
9 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback May 19, 2015
Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/product-info/reliability
 Applicable version of JEDEC standard at the time of product release.
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Starting TJ = 25°C, L = 0.20mH, RG = 25Ω, IAS = 50A.
Pulse width 400μs; duty cycle 2%.
Rθ is measured at TJ of approximately 90°C.
When mounted on 1 inch square 2 oz copper pad on 1.5x1.5 in. board of FR-4 material.
Calculated continuous current based on maximum allowable junction temperature. Package is limited to 100A by production test
capability.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
MS L 1
(per JE DEC J-S T D-020D†† )
RoHS compliant Yes
PQFN 5mm x 6mm
Qualification information
Moisture Sensitivity Level
Qualification level Industrial
(per JEDEC JES D47F †† guidelines )
Revision History
Date Comment
Updated package outline for “option B” and added package outline for “option G” on page 7
Updated tape and reel on page 8.
Updated package outline for “option G” on page 7.
Updated "IFX logo" on page 1 and page 9.
4/28/2015
5/19/2015
IMPORTANT NOTICE
The information given in this document shall in no
event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”) .
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
Technologies hereby disclaims any and all
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without limitation warranties of non-infringement
of intellectual property rights of any third party.
In addition, any information given in this document
is subject to customer’s compliance with its
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applicable legal requirements, norms and
standards concerning customer’s products and any
use of the product of Infineon Technologies in
customer’s applications.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.
For further information on the product, technology,
delivery terms and conditions and prices please
contact your nearest Infineon Technologies office
(www.infineon.com).
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