74VHCU04MTCX_NL - Fairchild Semiconductor

July 1993

Revised February 2005

74VHCU04 Hex Inverter

74VHCU04

Hex Inverter

General Descript ion

The VHCU04 is an advanced high speed CMOS Inverter

fabricated with silicon gate CMOS technology. It achieves

the high speed operation similar to equivalent Bipolar

Schottky TTL while maintaining the CMOS low power dissi-

pation.

Since the internal circuit is composed of a single stage

inverter, it can be used in analog applications such as crys-

tal oscillators. An input protection circuit ensures tha t 0V to

7V can be applied to the input pins without regard to the

supply voltag e. This devi ce can be us ed to interf ace 5V to

3V systems and two supply systems such as battery

backup. This circuit prevents device destruction due to mis-

matched supply and input voltages.

Features

■High Speed: tPD

3.5 ns (typ) at VCC

■Low Power Dissipation: ICC

A (Max) @ TA

■High Noise Immunity: VNIH

VNIL

28% VCC (Min)

■Power down protection is provided on all inputs

■Low Noise: VOLP

0.8V (Max)

■Pin and Function Compatible with 74HCU04

Ordering Code:

Surface m ount pack ages are also avai lable on Tape and Reel. Specify by appe nding the s uffix let t er “X” to the o rdering code.

Pb-Free package per JEDEC J-STD-020B.

Note 1: “_NL” indicat es Pb-Free package (per JED EC J -STD-0 20B). Devic e availa ble in Tape and R eel only.

Order Number Package Package Description

Number

74VHCU04M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74VHCU04MX_NL

(Note 1) M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74VHCU04SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74VHCU04MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDE C MO-153, 4.4mm Wide

74VHCU04MTCX_NL

(Note 1) MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

74VHCU04N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

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74VHCU04

Logic Symbol

IEEE/IEC

Pin Descriptions

Connection Diagram

Truth Table

Pin Names Description

AnInputs

OnOutputs

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74VHCU04

Absolute Maxim um Ratings(Note 2) Recommended Operating

Conditions (Note 3)

Note 2: Absolute Maximum Ratings are values beyond which the device

may be damaged or have its useful life impaired. The databook specifica-

tions should be met, without exception, to ensure that the system design is

reliable over its power supply, temperature, and output/input loading vari-

ables. Fairchild does not recommend operation outside databook specifica-

tions.

Note 3: Unused inputs must b e held HIGH or LOW. They may not float.

DC Electrical Characteristics

Supply Volt age (VCC)



0.5V to



7.0V

DC Input Voltage (VIN)



0.5V to



7.0V

DC Output Voltage (VOUT)



0.5V to VCC



0.5V

Input Diode Current (IIK)



20 mA

Output Diode Current (IOK)

20 mA

DC Output Current (IOUT)

25 mA

DC VCC/GND Current (ICC)

50 mA

Storage Temperature (TSTG)



C to



150

Lead Temperature (TL)

(Soldering, 10 seconds) 260

Supply Voltage (VCC) 2.0V to



5.5V

Input Voltage (VIN)0V to



5.5V

Output Voltage (VOUT) 0V to VCC

Operating Temperature (TOPR)



C to



Symbol Parameter VCC TA



C to



CUnits Conditions

(V)MinTypMaxMinMax

VIH HIGH Level 2.0 1.70 1.70 V

Input Voltage 3.0



5.5 0.8 VCC 0.8 VCC

VIL LOW Level 2.0 0.30 0.30 V

Input Voltage 3.0



5.5 0.20 VCC 0.20 VCC

VOH HIGH Level 2.0 1.8 2.0 1.8 VIN

VIL IOH



Output Voltage 3.0 2.7 3.0 2.7 V

4.5 4.0 4.5 4.0

3.0 2.58 2.48 VVIN

GND IOH



4 mA

4.5 3.94 3.80 IOH



8 mA

VOL LOW Level 2.0 0.0 0.2 0.2 VIN

VIH IOL

Output Voltage 3.0 0.0 0.3 0.3 V

4.5 0.0 0.5 0.5

3.0 0.36 0.44 VVIN

VCC IOL

4 mA

4.5 0.36 0.44 IOL

8 mA

IIN Input Leakage Current 0



5.5

0.1

1.0

5.5V or GND

ICC Quiescent Supply Current 5.5 2.0 20.0

VCC or GND

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74VHCU04

Noise Characteristics

Note 4: Parameter guaranteed by design.

AC Electrical Characteristics

Note 5: CPD is defined as t he value of t he internal equivalent ca pac itan c e w hich is c alculate d f rom the o perating c urrent consum pt ion without load. Average

operating current can be obtained by the equation: ICC (opr.)

CPD * VCC * f IN



ICC/6 ( p er g ate ) .

Symbol Parameter VCC TA

CUnits Conditions

(V) Typ Limits

VOLP Quiet Output Maximum 5.0 0.5 0.8 V CL

50 pF

(Note 4) Dynamic VOL

VOLV Quiet Output Minimum 5.0



0.5



0.8 V CL

50 pF

(Note 4) Dynamic VOL

VIHD Minimum HIGH Level 5.0 4.0 V CL

50 pF

(Note 4) Dynamic Input Voltage

VILD Maximum LOW Level 5.0 1.0 V CL

50 pF

(Note 4) Dynamic Input Voltage

Symbol Parameter VCC TA



C to



CUnits Conditions

(V) Min Typ Max Min Max

tPHL Propagation Delay 3.3

0.3 5.0 8.9 1.0 10.5 ns CL

15 pF

tPLH 7.5 11.4 1.0 13.0 CL

50 pF

5.0

0.5 3.5 5.5 1.0 6.5 ns CL

15 pF

5.0 7.0 1.0 8.0 CL

50 pF

CIN Input Capacitance 5 10 10 pF VCC

Open

CPD Power Dissipation 9 pF (Note 5)

Capacitance

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74VHCU04

Physical Dim ensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

Package Number M14A

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74VHCU04

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M14D

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74VHCU04

Physical Dim ensions inches (millimeters) unless otherwise noted (Continued)

14-Lea d Th in S hri nk Sm all Ou tlin e Pack age (TSSOP ), JED EC MO-1 53, 4.4mm Wide

Package Number MTC14

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74VHCU04 Hex Inverter

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Package Number N14A

Fairchild does no t assume any responsibility for use of any circui try described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life suppor t de vices o r systems a re devices or syste ms

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical compon ent in any componen t of a life support

device or system whose failure to perform can be rea-

sonabl y ex pect ed to cause the fa ilu re of the li fe su pp ort

device or system, or to affect its safety or effectiveness.