FINAL Advanced Micro Devices Am27C020 2 Megabit (262,144 x 8-Bit) CMOS EPROM DISTINCTIVE CHARACTERISTICS 10% power supply tolerance standard on most speeds Fast access time -- 70 ns Low power consumption 100% Flashrite programming -- 100 A maximum CMOS standby current JEDEC-approved pinout -- Plug in upgrade of 1 Mbit EPROM -- Easy upgrade from 28-pin JEDEC EPROMs Single +5 V power supply -- Typical programming time of 32 seconds Latch-up protected to 100 mA from -1 V to VCC + 1 V High noise immunity Compact 32-pin DIP, PDIP, TSOP, and PLCC packages GENERAL DESCRIPTION The Am27C020 is a 2 Mbit, ultraviolet erasable programmable read-only memory. It is organized as 256K words by 8 bits per word, operates from a single +5 V supply, has a static standby mode, and features fast single address location programming. Products are available in windowed ceramic DIP packages, as well as plastic one-time programmable (OTP) including TSOP, PLCC, and PDIP. Typically, any byte can be accessed in less than 70 ns, allowing operation with high-performance microprocessors without any WAIT states. The Am27C020 offers separate Output Enable (OE) and Chip Enable (CE) BLOCK DIAGRAM VPP VCC VSS OE CE PGM A0-A17 Address Inputs controls, thus eliminating bus contention in a multiple bus microprocessor system. AMD's CMOS process technology provides high speed, low power, and high noise immunity. Typical power consumption is only 100 mW in active mode, and 100 W in standby mode. All signals are TTL levels, including programming signals. Bit locations may be programmed singly, in blocks, or at random. The Am27C020 supports AMD's Flashrite programming algorithm (100 s pulses) resulting in typical programming times of 32 seconds. Data Outputs DQ0-DQ7 Output Enable Chip Enable and Prog Logic Output Buffers Y Decoder Y Gating X Decoder 2,097,152-Bit Cell Matrix 11507F-1 Publication# 11507 Rev. F Issue Date: May 1995 Amendment /0 2-79 AMD PRODUCT SELECTOR GUIDE Am27C020 Family Part No. Ordering Part No: VCC 5% -75 VCC 10% -70 -90 -120 -150 -200 70 70 40 90 90 40 120 120 50 150 150 65 200 200 75 Max Access Time (ns) CE (E) Access (ns) OE (G) Access (ns) -255 CONNECTION DIAGRAMS Top View DIP 250 250 100 1 32 VCC A16 2 31 PGM (P) A15 3 30 A17 A16 VPP VCC A12 4 29 A14 4 3 2 1 32 31 30 A7 5 28 A13 A7 5 29 A14 6 28 A13 7 8 27 26 A8 A9 A6 6 27 A8 A6 A5 7 26 A9 A5 A4 8 25 A11 A3 9 24 OE (G) A4 A3 A11 24 A1 11 23 OE (G) A10 A0 12 22 CE (E) DQ0 13 21 DQ7 A10 11 22 CE (E) A0 12 21 DQ7 DQ0 13 20 DQ6 DQ1 14 19 DQ5 DQ2 15 18 DQ4 VSS 16 17 DQ3 14 15 16 17 18 19 20 DQ4 DQ5 DQ6 A1 DQ3 23 25 10 VSS 10 9 A2 DQ1 DQ2 A2 PGM (P) NC VPP A12 A15 PLCC 11507F-3 11507F-2 Notes: 1. JEDEC nomenclature is in parentheses. 2. The 32-pin DIP to 32-pin PLCC configuration varies from the JEDEC 28-pin DIP to 32-pin PLCC configuration. TSOP A11 A9 A8 A13 A14 A17 PGM VCC VPP A16 A15 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 Standard Pinout 2-80 Am27C020 OE A10 CE DQ7 DQ6 DQ5 DQ4 DQ3 VSS DQ2 DQ1 DQ0 A0 A1 A2 A3 11507F-4 AMD PIN DESIGNATIONS A0-A17 = Address Inputs CE (E) = Chip Enable Input DQ0-DQ7 = Data Input/Outputs OE (G) = Output Enable Input PGM (P) = Program Enable Input VCC = VCC Supply Voltage VPP = Program Voltage Input VSS = Ground LOGIC SYMBOL 18 A0-A17 8 DQ0-DQ7 CE (E) PGM (P) OE (G) 11507F-5 Am27C020 2-81 AMD ORDERING INFORMATION UV EPROM Products AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of: AM27C020 -70 D C B OPTIONAL PROCESSING Blank = Standard Processing B = Burn-In TEMPERATURE RANGE C = Commercial (0C to +70C) I = Industrial (-40C to +85C) E = Extended Commercial (-55C to +125C) PACKAGE TYPE D = 32-Pin Ceramic DIP (CDV032) SPEED OPTION See Product Selector Guide and Valid Combinations DEVICE NUMBER/DESCRIPTION Am27C020 2 Megabit (262,144 x 8-Bit) CMOS UV EPROM Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations. Valid Combinations AM27C020-70 AM27C020-90 AM27C020-120 AM27C020-150 AM27C020-200 AM27C020-255 2-82 DC, DCB, DI, DIB DC, DCB, DI, DIB, DE, DEB DC, DCB, DI, DIB Am27C020 AMD ORDERING INFORMATION OTP Products AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of: AM27C020 -75 P C OPTIONAL PROCESSING Blank = Standard Processing TEMPERATURE RANGE C = Commercial (0C to +70C) I = Industrial (-40C to 85C) PACKAGE TYPE P = 32-Pin Plastic DIP (PD 032) J = 32-Pin Rectangular Plastic Leaded Chip Carrier (PL 032) E = 32-Pin TSOP Standard Pinout (TS 032) SPEED OPTION See Product Selector Guide and Valid Combinations DEVICE NUMBER/DESCRIPTION Am27C020 2 Megabit (262,144 x 8-Bit) CMOS OTP EPROM Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations. Valid Combinations AM27C020-75 AM27C020-90 AM27C020-120 AM27C020-150 AM27C020-200 AM27C020-255 PC, JC, PI, JI, EC, EI Am27C020 2-83 AMD FUNCTIONAL DESCRIPTION Erasing the Am27C020 A high-level CE input inhibits the other Am27C020s from being programmed. In order to clear all locations of their programmed contents, it is necessary to expose the Am27C020 to an ultraviolet light source. A dosage of 15 W seconds/cm2 is required to completely erase an Am27C020. This dosage can be obtained by exposure to an ultraviolet lamp -- wavelength of 2537 A -- with intensity of 12,000 W/ cm2 for 15 to 20 minutes. The Am27C020 should be directly under and about one inch from the source and all filters should be removed from the UV light source prior to erasure. Program Verify It is important to note that the Am27C020, and similar devices, will erase with light sources having wavelengths shorter than 4000 A . Although erasure times will be much longer than with UV sources at 2537A , nevertheless the exposure to fluorescent light and sunlight will eventually erase the Am27C020 and exposure to them should be prevented to realize maximum system reliability. If used in such an environment, the package window should be covered by an opaque label or substance. Programming the Am27C020 Upon delivery, or after each erasure, the Am27C020 has all 2,097,152 bits in the "ONE", or HIGH state. "ZEROs" are loaded into the Am27C020 through the procedure of programming. The programming mode is entered when 12.75 V 0.25 V is applied to the VPP pin, CE and PGM are at VIL and OE is at VIH. For programming, the data to be programmed is applied 8 bits in parallel to the data output pins. The Flashrite algorithm reduces programming time by using 100 s programming pulse and by giving each address only as many pulses as are necessary in order to reliably program the data. After each pulse is applied to a given address, the data in that address is verified. If the data does not verify, additional pulses are given until it verifies or the maximum is reached. This process is repeated while sequencing through each address of the Am27C020. This part of the algorithm is done at VCC = 6.25 V to assure that each EPROM bit is programmed to a sufficiently high threshold voltage. After the final address is completed, the entire EPROM memory is verified at VCC = VPP = 5.25 V. Program Inhibit Programming of multiple Am27C020s in parallel with different data is also easily accomplished. Except for CE, all like inputs of the parallel Am27C020 may be common. A TTL low-level program pulse applied to an Am27C020 CE input with VPP = 12.75 V 0.25 V, PGM LOW, and OE HIGH will program that Am27C020. 2-84 A verify should be performed on the programmed bits to determine that they were correctly programmed. The verify should be performed with OE and CE at VIL, PGM at VIH, and VPP between 12.5 V and 13.0 V. Auto Select Mode The auto select mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type. This mode is intended for use by programming equipment for the purpose of automatically matching the device to be programmed with its corresponding programming algorithm. This mode is functional in the 25C 5C ambient temperature range that is required when programming the Am27C020. To activate this mode, the programming equipment must force 12.0 V 0.5 V on address line A9 of the Am27C020. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during auto select mode. Byte 0 (A0 = VIL) represents the manufacturer code, and Byte 1 (A0 = VIH), the device identifier code. For the Am27C020, these two identifier bytes are given in the Mode Select table. All identifiers for manufacturer and device codes will possess odd parity, with the MSB (DQ7) defined as the parity bit. Read Mode The Am27C020 has two control functions, both of which must be logically satisfied in order to obtain data at the outputs. Chip Enable (CE) is the power control and should be used for device selection. Output Enable (OE) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that addresses are stable, address access time (tACC) is equal to the delay from CE to output (tCE). Data is available at the outputs tOE after the falling edge of OE, assuming that CE has been LOW and addresses have been stable for at least tACC - tOE. Standby Mode The Am27C020 has a CMOS standby mode which reduces the maximum VCC current to 100 A. It is placed in CMOS-standby when CE is at VCC 0.3 V. The Am27C020 also has a TTL-standby mode which reduces the maximum VCC current to 1.0 mA. It is placed in TTL-standby when CE is at VIH. When in standby mode, the outputs are in a high-impedance state, independent of the OE input. Am27C020 AMD Output OR-Tieing System Applications To accommodate multiple memory connections, a twoline control function is provided to allow for: During the switch between active and standby conditions, transient current peaks are produced on the rising and falling edges of Chip Enable. The magnitude of these transient current peaks is dependent on the output capacitance loading of the device. At a minimum, a 0.1 F ceramic capacitor (high frequency, low inherent inductance) should be used on each device between VCC and VSS to minimize transient effects. In addition, to overcome the voltage drop caused by the inductive effects of the printed circuit board traces on EPROM arrays, a 4.7 F bulk electrolytic capacitor should be used between VCC and VSS for each eight devices. The location of the capacitor should be close to where the power supply is connected to the array. Low memory power dissipation, and Assurance that output bus contention will not occur It is recommended that CE be decoded and used as the primary device-selecting function, while OE be made a common connection to all devices in the array and connected to the READ line from the system control bus. This assures that all deselected memory devices are in their low-power standby mode and that the outut pins are only active when data is desired from a particular memory device. MODE SELECT TABLE Pins Mode CE OE PGM A0 A9 VPP Outputs VIL VIL X X X X DOUT Output Disable X VIH X X X X High Z Standby (TTL) VIH X X X X X High Z High Z Read VCC 0.3 V X X X X X Program VIL VIH VIL X X VPP DIN Program Verify VIL VIL VIH X X VPP DOUT Program Inhibit VIH X X X X VPP High Z Auto Select (Note 3) Manufacturer Code VIL VIL X VIL VH X 01H Device Code VIL VIL X VIH VH X 97H Standby (CMOS) Notes: 1. VH = 12.0 V 0.5 V. 2. X = Either VIH or VIL. 3. A1-A8 = A10-A17 = VIL. 4. See DC Programming Characteristics for VPP voltage during programming. Am27C020 2-85 AMD ABSOLUTE MAXIMUM RATINGS OPERATING RANGES Storage Temperature: OTP Products . . . . . . . . . . . . . . . . . -65C to +125C All Other Products . . . . . . . . . . . . . . -65C to +150C Commercial (C) Devices Ambient Temperature with Power Applied . . . . . . . . . . . . . -55C to +125C Ambient Temperature (TA) . . . . . . . . . . 0C to +70C Industrial (I) Devices Ambient Temperature (TA) . . . . . . . . -40C to +85C Voltage with Respect to VSS: All pins except A9, VPP, and VCC (Note 1) . . . . . . . . . . . . . . -0.6 V to VCC + 0.6 V Extended Commercial (E) Devices A9 and VPP (Note 2) . . . . . . . . . . . . . -0.6 V to 13.5 V VCC for Am27C020-XX5 . . . . . . . . +4.75 V to +5.25 V VCC for Am27C020-XX0 . . . . . . . . +4.50 V to +5.50 V VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6 V to 7.0 V Notes: 1. During transitions, the input may overshoot VSS to -2.0 V for periods of up to 20 ns. Maximum DC voltage on input and I/O may overshoot to VCC + 2.0 V for periods of up to 20 ns. Ambient Temperature (TA) . . . . . . . -55C to +125C Supply Read Voltages: Operating ranges define those limits between which the functionality of the device is guaranteed. 2. During transitions, A9 and VPP may overshoot VSS to -2.0 V for periods of up to 20 ns. A9 and VPP must not exceed 13.5 V for any period of time. Stresses above those listed under Absolute Maximum Ratings may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability. 2-86 Am27C020 AMD DC CHARACTERISTICS over operating ranges unless otherwise specified (Notes 1, 2, and 4) PRELIMINARY Parameter Symbol Parameter Description Test Conditions Min Max Unit VOH Output HIGH Voltage IOH = -400 A 2.4 VOL Output LOW Voltage IOL = 2.1 mA 0.45 V VIH Input HIGH Voltage 2.0 VCC + 0.5 V VIL Input LOW Voltage -0.5 +0.8 V ILI Input Load Current VIN = 0 V to VCC 1.0 A ILO Output Leakage Current VOUT = 0 V to VCC 5.0 A ICC1 VCC Active Current (Note 3) CE = VIL, f = 10 MHz, IOUT = 0 mA V C/I Devices 30 mA E Devices 60 ICC2 VCC TTL Standby Current CE = VIH 1.0 mA ICC3 VCC CMOS Standby Current CE = VCC + 0.3 V 100 A IPP1 VPP Supply Current (Read) CE = OE = VIL, VPP = VCC 100 A Notes: 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. 2. Caution: The Am27C020 must not be removed from (or inserted into) a socket when VCC or VPP is applied. 3. ICC1 is tested with OE = VIH to simulate open outputs. 30 30 25 25 Supply Current in mA Supply Current in mA 4. Minimum DC Input Voltage is -0.5 V. During transitions, the inputs may overshoot to -2.0 V for periods less than 20 ns. Maximum DC Voltage on output pins is VCC + 0.5 V, which may overshoot to VCC + 2.0 V for periods less than 20 ns. 20 15 10 1 2 3 4 5 6 7 8 9 10 Frequency in MHz 20 15 10 -75 -50 -25 0 25 50 75 100 125 150 Temperature in C 11507F-6 Figure 1. Typical Supply Current vs. Frequency VCC = 5.5 V, T = 25C 11507F-7 Figure 2. Typical Supply Current vs. Temperature VCC = 5.5 V, f = 10 MHz Am27C020 2-87 AMD CAPACITANCE Parameter Parameter Symbol Description CIN COUT Input Capacitance CDV032 Typ Max Test Conditions VIN = 0 V Output Capacitance VOUT = 0 V PD 032 Typ Max PL 032 Typ Max TS 032 Typ Max Unit 10 12 10 12 8 10 10 12 pF 12 15 12 15 9 12 12 14 pF Notes: 1. This parameter is only sampled and not 100% tested. 2. TA = +25C, f = 1 MHz. SWITCHING CHARACTERISTICS over operating ranges unless otherwise specified (Notes 1, 3, and 4) Am27C020 Parameter Symbols Parameter JEDEC Standard Description Test Conditions -75 -70 -90 -120 -150 -200 -255 Unit tAVQV tACC Address to Output Delay CE = OE = VIL Min Max -- 70 -- 90 -- 120 -- 150 -- 200 -- 250 ns tELQV tCE Chip Enable to Output Delay OE = VIL Min Max -- 70 -- 90 -- 120 -- 150 -- 200 -- 250 ns tGLQV tOE Output Enable to Output Delay CE = VIL Min Max -- 40 -- 40 -- 50 -- 65 -- 75 -- 100 ns Min -- -- -- -- -- -- Max 25 25 30 30 40 60 Min 0 0 0 0 0 0 Max -- -- -- -- -- -- tEHQZ, tGHQZ tAXQX tDF Chip Enable HIGH (Note 2) or Output Enable HIGH, whichever comes first, to Output Float tOH Output Hold from Addresses, CE, or OE, whichever occurred first ns Notes: 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. 2. This parameter is only sampled and not 100% tested. 3. Caution: The Am27C020 must not be removed from, or inserted into a socket or board when VPP or VCC is applied. 4. Output Load: 2-88 ns 1 TTL gate and CL = 100 pF, Input Rise and Fall Times: 20 ns, Input Pulse Levels: 0.45 V to 2.4 V, Timing Measurement Reference Level: 0.8 V and 2 V inputs and outputs. Am27C020 AMD SWITCHING TEST CIRCUIT Device Under Test 2.7 k 5.0 V CL Diodes = IN3064 or Equivalent 6.2 k 11507F-8 CL = 100 pF including jig capacitance SWITCHING TEST WAVEFORM 2.4 V 2.0 V 2.0 V Test Points 0.8 V 0.8 V 0.45 V Input Output 11507F-9 AC Testing: Inputs are driven at 2.4 V for a Logic "1" and 0.45 V for a Logic "0." Input pulse rise and fall times are 20 ns. Am27C020 2-89 AMD KEY TO SWITCHING WAVEFORMS WAVEFORM INPUTS OUTPUTS Must Be Steady Will Be Steady May Change from H to L Will Be Changing from H to L May Change from L to H Will Be Changing from L to H Don't Care, Any Change Permitted Changing, State Unknown Does Not Apply Center Line is High Impedance "Off" State KS000010 SWITCHING WAVEFORM 2.4 Addresses 0.45 2.0 0.8 2.0 0.8 Addresses Valid CE tCE OE Output High Z tOE tACC (Note 1) tOH Valid Output Notes: High Z 11507F-10 1. OE may be delayed up to tACC - tOE after the falling edge of the addresses without impact on tACC. 2. tDF is specified from OE or CE, whichever occurs first. 2-90 tDF (Note 2) Am27C020