LTC6081/LTC6082
1
60812fd
For more information www.linear.com/LTC6081
Typical applicaTion
FeaTures
applicaTions
DescripTion
Precision Dual/Quad
CMOS Rail-to-Rail Input/
Output Amplifiers
The LTC
®
6081/LTC6082 are dual/quad low offset, low drift,
low noise CMOS operational amplifiers with rail-to-rail
input/output swing.
The 70µV maximum offset, 1pA input bias current, 120dB
open loop gain and 1.3µVP-P 0.1Hz to 10Hz noise make
it perfect for precision signal conditioning. The LTC6081/
LTC6082 features 100dB CMRR and 98dB PSRR.
Each amplifier consumes only 330µA of current on a 3V
supply. The 10-lead DFN has an independent shutdown
function that reduces each amplifier’s supply current
to 1µA.
LTC6081/LTC6082 is specified for power supply voltages
of 3V and 5V from –40°C to 125°C. The dual LTC6081 is
available in 8-lead MSOP and 10-lead DFN10 packages.
The quad LTC6082 is available in 16-lead SSOP and DFN
packages.
Shock Sensor Amplifier (Accelerometer)
■ Maximum Offset Voltage: 70µV (25°C)
■ Maximum Offset Drift: 0.8µV/°C
■ Maximum Input Bias: 1pA (25°C) 40pA (TA ≤ 85°C)
■ Open Loop Voltage Gain: 120dB Typ
■ Gain Bandwidth Product: 3.6MHz
■ CMRR: 100dB Min
■ PSRR: 98dB Min
■ 0.1Hz to 10Hz Noise: 1.3µVP-P
■ Supply Current: 330µA
■ Rail-to-Rail Inputs and Outputs
■ Unity Gain Stable
■ 2.7V to 5.5V Operation Voltage
■ Dual LTC6081 in 8-Lead MSOP and 10-Lead DFN10
Packages; Quad LTC6082 in 16-Lead SSOP and DFN
Packages
■ Photodiode Amplifier
■ Strain Gauge
■ High Impedance Sensor Amplifier
■ Microvolt Accuracy Threshold Detection
■ Instrumentation Amplifiers
■ Thermocouple Amplifiers
60812 TA01
V+
V–
–
+
1G
2M
1M
10k
3.9pF
47pF
0.1µF
1/2
LTC6081
0.1µF
8.2pF
2M
3.9pF
1M
VOUT = 109mV/g
BW ~ 2.2kHz
MURATA
PKGS-00LD
770pF
0° SENSOR
VOS Drift Histogram
VOSDRIFT (µV/°C)
NUMBER OF AMPLIFIERS (OUT OF 100)
30
25
20
15
10
5
0
60812 TA01b
LTC6081MS8
TA = –40°C TO 125°C
VS = 3V
VCM = 0.5V
0.20 0.30–0.10–0.20 0 0.10
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
LTC6081/LTC6082
2
60812fd
For more information www.linear.com/LTC6081
pin conFiGuraTion
absoluTe MaxiMuM raTinGs
(Note 1)
TOP VIEW
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
10
9
6
7
8
4
5
3
2
1V+
OUTB
–INB
+INB
SHDN_B
OUTA
–INA
+INA
V–
SHDN_A
B
A
TJMAX = 125°C, θJA = 43°C/W
UNDERSIDE METAL CONNECTED TO V–
1
2
3
4
OUTA
–INA
+INA
V–
8
7
6
5
V+
OUTB
–INB
+INB
TOP VIEW
MS8 PACKAGE
8-LEAD PLASTIC MSOP
B
A
TJMAX = 150°C, θJA = 200°C/W
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
OUTD
–IND
+IND
V–
+INC
–INC
OUTC
NC
OUTA
–INA
+INA
V+
+INB
–INB
OUTB
NC
TOP VIEW
DHC PACKAGE
16-LEAD (5mm × 3mm) PLASTIC DFN
D
A
C
B
TJMAX = 125°C, θJA = 43°C/W
UNDERSIDE METAL CONNECTED TO V–
GN PACKAGE
16-LEAD PLASTIC SSOP
1
2
3
4
5
6
7
8
TOP VIEW
16
15
14
13
12
11
10
9
OUTA
–INA
+INA
V+
+INB
–INB
OUTB
NC
OUTD
–IND
+IND
V–
+INC
–INC
OUTC
NC
D
A
C
B
TJMAX = 150°C, θJA = 110°C/W
Total Supply Voltage (V+ to V–) ...................................6V
Input Voltage ...................................................... V– to V+
Output Short Circuit Duration (Note 2)............. Indefinite
Operating Temperature Range (Note 3)
LTC6081C, LTC6082C .......................... –40°C to 85°C
LTC6081I, LTC6082I ............................. –40°C to 85°C
LTC6081H, LTC6082H ........................ –40°C to 125°C
(H Temperature Range Not Available in DFN Package)
Specified Temperature Range (Note 4)
LTC6081C, LTC6082C .............................. 0°C to 70°C
LTC6081I, LTC6082I ............................. –40°C to 85°C
LTC6081H, LTC6082H ........................ –40°C to 125°C
Junction Temperature
DFN Packages ................................................... 125°C
All Other Packages ............................................ 150°C
Storage Temperature Range
DFN Packages .................................... –65°C to 125°C
All Other Packages ............................. –65°C to 150°C
Lead Temperature (Soldering, 10 Sec) .................. 300°C
LTC6081/LTC6082
3
60812fd
For more information www.linear.com/LTC6081
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE
LTC6081CDD#PBF LTC6081CDD#TRPBF LCJP 10-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C
LTC6081IDD#PBF LTC6081IDD#TRPBF LCJP 10-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C
LTC6081CMS8#PBF LTC6081CMS8#TRPBF LTCJN 8-Lead Plastic MSOP 0°C to 70°C
LTC6081IMS8#PBF LTC6081IMS8#TRPBF LTCJN 8-Lead Plastic MSOP –40°C to 85°C
LTC6081HMS8#PBF LTC6081HMS8#TRPBF LTCJN 8-Lead Plastic MSOP –40°C to 125°C
LTC6082CDHC#PBF LTC6082CDHC#TRPBF 6082 16-Lead (5mm × 3mm) Plastic DFN 0°C to 70°C
LTC6082IDHC#PBF LTC6082IDHC#TRPBF 6082 16-Lead (5mm × 3mm) Plastic DFN –40°C to 85°C
LTC6082CGN#PBF LTC6082CGN#TRPBF 6082 16-Lead Plastic SSOP 0°C to 70°C
LTC6082IGN#PBF LTC6082IGN#TRPBF 6082I 16-Lead Plastic SSOP –40°C to 85°C
LTC6082HGN#PBF LTC6082HGN#TRPBF 6082H 16-Lead Plastic SSOP –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
LTC6081/LTC6082
4
60812fd
For more information www.linear.com/LTC6081
elecTrical characTerisTics
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 3V, V– = 0V, VCM = 0.5V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS
C, I SUFFIXES H SUFFIX
UNITSMIN TYP MAX MIN TYP MAX
VOS Offset Voltage LTC6081MS8, LTC6082GN VCM = 0.5V, 2.5V
LTC6081MS8, LTC6082GN VCM = 0.5V, 2.5V
LTC6081DD, LTC6082DHC VCM = 0.5V, 2.5V
LTC6081DD, LTC6082DHC VCM = 0.5V, 2.5V
●
●
–70
–90
–70
–90
70
90
70
90
–70
–90
70
90
μV
μV
μV
μV
ΔVOS ⁄ΔTInput Offset Voltage Drift
(Note 5)
●±0.2 ±0.8 ±0.2 ±0.8 μV/°C
IBInput Bias Current
(Note 6)
●
0.2 1
40
0.2 1
500
pA
pA
IOS Input Offset Current
●
0.1
15
0.1
100
pA
pA
enInput Referred Noise Noise Density at f = 1kHz
Integrated Noise From 0.1Hz to 10Hz
13
1.3
13
1.3
nV/√Hz
µVP-P
InInput Noise Current Density
(Note 7)
0.5 0.5 fA/√Hz
Input Common Mode Range ●V–V+V–V+V
CDIFF Differential Input Capacitance 3 3 pF
CCM Common Mode Input
Capacitance
7 7 pF
CMRR Common Mode Rejection
Ratio
VCM = 0V to 1.5V
VCM = 0V to 1.5V
VCM = 0V to 3V
VCM = 0V to 3V
●
●
95
88
93
88
105
100
105
100
95
86
93
86
105
100
105
100
dB
dB
dB
dB
PSRR Power Supply Rejection Ratio VS = 2.7V to 5.5V
●
98
96
110 98
96
110 dB
dB
VOUT Output Voltage, High, Either
Output Pin
No Load
ISOURCE = 0.5mA
ISOURCE = 5mA
●
●
–32
–320
1
–35
–350
1 mV
mV
mV
Output Voltage, Low, Either
Output Pin (Referred to V–)
No Load
ISINK = 0.5mA
ISINK = 5mA
●
●
1
33
300
1
40
360
mV
mV
mV
AVOL Large-Signal Voltage Gain RLOAD = 10k, 0.5V < VOUT < 2.5V ●110 120 110 120 dB
ISC Output Short-Circuit Current Source
Sink
●
●
17
17
15
15
mA
mA
SR Slew Rate AV = 1 1 1 V/μs
GBW Gain-Bandwidth Product
(fTEST = 50kHz)
RL = 100k
●
2.5
1.8
3.6 2.5
1.5
3.6 MHz
MHz
F0Phase Margin RL = 10k 70 70 Deg
tSSettling Time 0.1% AV = 1, 1V Step 6 6 μs
ISSupply Current
(Per Amplifier)
No Load
●
330 400
435
330 400
460
μA
μA
Shutdown Current
(Per Amplifier)
Shutdown, VSHDN ≤ 0.8V
●
0.5
2
μA
μA
VSSupply Voltage Range Guaranteed by the PSRR Test ●2.7 5.5 2.7 5.5 V
Channel Separation fs = 10kHz, RL = 10k –120 –120 dB
LTC6081/LTC6082
5
60812fd
For more information www.linear.com/LTC6081
elecTrical characTerisTics
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 3V, V– = 0V, VCM = 0.5V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS
C, I SUFFIXES H SUFFIX
UNITSMIN TYP MAX MIN TYP MAX
Shutdown Logic SHDN High
SHDN Low
●
●
2
0.8
2
0.8
V
V
THD Total Harmonic Distortion f = 10kHz, V+ = 3V, VOUT = 1VP-P, RL = 10k –90 –90 dB
tON Turn-On Time VSHDN = 0.8V to 2V 10 10 µs
tOFF Turn-Off Time VSHDN = 2V to 0.8V 2 2 µs
SHDN Pin Current VSHDN = 0V ●2 μA
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Test
conditions are V+ = 5V, V– = 0V, VCM = 0.5V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS
C, I SUFFIXES H SUFFIX
UNITSMIN TYP MAX MIN TYP MAX
VOS Offset Voltage LTC6081MS8, LTC6082GN VCM = 0.5V
LTC6081MS8, LTC6082GN VCM = 0.5V
LTC6081DD, LTC6082DHC VCM = 0.5V
LTC6081DD, LTC6082DHC VCM = 0.5V
●
●
–70
–90
–70
–90
70
90
70
90
–70
–90
70
90
μV
μV
μV
μV
ΔVOS ⁄ΔTInput Offset Voltage Drift
(Note 8)
●±0.2 ±0.8 ±0.2 ±0.8 μV/°C
IBInput Bias Current
●
0.2
40
0.2
500
pA
pA
IOS Input Offset Current
●
0.1
15
0.1
100
pA
pA
enInput Referred Noise f = 1kHz
0.1Hz to 10Hz
13
1.3
13
1.3
nV/√Hz
µVP-P
InInput Noise Current Density
(Note 7)
0.5 0.5 fA/√Hz
Input Common Mode Range ●V–V+V–V+V
CDIFF Differential Input Capacitance 3 3 pF
CCM Common Mode Input
Capacitance
7 7 pF
CMRR Common Mode Rejection
Ratio
VCM = 0V to 3.5V
VCM = 0V to 3.5V
VCM = 0V to 5V
●
●
100
95
86
110
110
95
100
94
86
110
110
95
dB
dB
dB
PSRR Power Supply Rejection Ratio VS = 2.7V to 5.5V
●
98
96
110 98
96
110 dB
dB
VOUT Output Voltage, High, Either
Output Pin (Referred to V+)
No Load
ISOURCE = 0.5mA
ISOURCE = 5mA
●
●
–24
–200
1
–25
–220
1 mV
mV
mV
Output Voltage, Low, Either
Output Pin (Referred to V–)
No Load
ISINK = 0.5mA
ISINK = 5mA
●
●
1
27
210
1
32
240
mV
mV
mV
AVOL Large-Signal Voltage Gain RLOAD = 10k, 0.5V < VOUT < 4.5V ●110 120 110 120 dB
LTC6081/LTC6082
6
60812fd
For more information www.linear.com/LTC6081
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 5V, V– = 0V, VCM = 0.5V unless otherwise noted.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: A heat sink may be required to keep the junction temperature
below the absolute maximum. This depends on the power supply voltage
and how many amplifiers are shorted.
Note 3: The LTC6081C/LTC6082C and LTC6081I/LTC6082I are guaranteed
functional over the operating temperature range of –40°C to 85°C.
The LTC6081H/LTC6082H are guaranteed functional over the operating
temperature range of –40°C to 125°C.
Note 4: The LTC6081C/LTC6082C are guaranteed to meet specified
performance from 0°C to 70°C. The LTC6081C/LTC6082C are designed,
elecTrical characTerisTics
SYMBOL PARAMETER CONDITIONS
C, I SUFFIXES H SUFFIX
UNITSMIN TYP MAX MIN TYP MAX
ISC Output Short-Circuit Current Source
Sink
●
●
24
24
21
21
mA
mA
SR Slew Rate AV = 1 1 1 V/μs
GBW Gain-Bandwidth Product
(fTEST = 50kHz)
RL = 100k
●
2.5
1.8
3.5 2.5
1.5
3.5 MHz
MHz
F0Phase Margin RL = 10k 70 70 Deg
tSSettling Time 0.1% AV = 1, 1V Step 6 6 μs
ISSupply Current
(Per Amplifier)
No Load
●
340 425
465
340 425
490
μA
μA
Shutdown Current
(Per Amplifier)
Shutdown, VSHDN ≤ 1.2V ●6 μA
VSSupply Voltage Range Guaranteed by the PSRR Test ●2.7 5.5 2.7 5.5 V
Channel Separation fs = 10kHz, RL = 10k –120 –120 dB
Shutdown Logic SHDN High
SHDN Low
●
●
3.5
1.2
3.5
1.2
V
V
THD Total Harmonic Distortion f = 10kHz, V+ = 5V, VOUT = 2VP-P, RL = 10k –90 –90 dB
tON Turn-On Time VSHDN = 1.2V to 3.5V 10 10 µs
tOFF Turn-Off Time VSHDN = 3.5V to 1.2V 2 2 µs
SHDN Pin Current VSHDN = 0V ●2 μA
characterized and expected to meet specified performance from –40°C
to 85°C but are not tested or QA sampled at these temperatures. The
LTC6081I/LTC6082I are guaranteed to meet specified performance from
–40°C to 85°C. The LTC6081H/LTC6082H are guaranteed to meet specified
performance from –40°C to 125°C.
Note 5: Input offset drift is computed from the limits of the VOS test
divided by the temperature range. This is a conservative estimate of worst
case drift. Consult the Typical Performance Characteristics section for
more information on input offset drift.
Note 6: IB guaranteed by the VS = 5V test.
Note 7: Current noise is calculated from In = √2qIB, where q = 1.6 • 10–19
coulomb.
Note 8: VOS drift is guaranteed by the VS = 3V test.
LTC6081/LTC6082
7
60812fd
For more information www.linear.com/LTC6081
FREQUENCY (Hz)
NOISE VOLTAGE (nV/√Hz)
1
110
100
90
80
70
60
50
40
30
20
10
0100 1k 100k
60812 G09
10 10k
VS = 3V
VCM = 0.5V
VS = 5V
VCM = 0.5V
TA = 25°C
TIME AFTER POWER UP (s)
0
CHANGE IN OFFSET VOLTAGE (µV)
60
60812 G08
3530252010 155 50 5540 45
25
20
15
10
5
0
–5
TA = 25°C
VCM = 0.5V
VS = 3V
VS = 5V
VCM (V)
0
VOS (µV)
4 52 31
60812 G06
140
120
100
80
–40
–20
20
0
40
60
VS = 5V
TA = 25°C
REPRESENTATIVE PARTS
VCM (V)
0
VOS (µV)
2.5 3.01.5 2.00.5 1.0
60812 G05
40
30
20
10
–40
–30
–20
–10
0
VS = 3V
TA = 25°C
REPRESENTATIVE PARTS
VOSDRIFT (µV/°C)
NUMBER OF AMPS (OUT OF 100)
30
25
20
15
10
5
00.20
60812 G01
0.30–0.10–0.20 0 0.10
LTC6081MS8
TA = –40°C TO 125°C
VS = 3V
VCM = 0.5V
VOSDRIFT (µV/°C)
NUMBER OF AMPS (OUT OF 100)
25
20
15
10
5
0
60812 G02
0.20–0.10–0.20–0.30 0 0.10
LTC6081DFN
TA = –40°C TO 125°C
VS = 3V
VCM = 0.5V
TEMPERATURE (°C)
–50
VOS (µV)
110 130
60812 G03
–10 30 70 90
–30 10 50
25
20
15
10
5
0
–5
–10
–15
–20
LTC6081MS8
VS = 3V
VCM = 0.5V
REPRESENTATIVE PARTS
Typical perForMance characTerisTics
VOS Drift Histogram
VOS Drift Histogram
VOS vs Temperature
VOS Histogram VOS vs VCM VOS vs VCM
VOS vs Output Current Warm-Up Drift vs Time Noise Voltage vs Frequency
VOS (µV)
NUMBER OF AMPS (OUT OF 100)
6.5
60812 G04
10.5–5.5–9.5 –1.5 2.5
LTC6081MS8
TA = 25°C
VS = 3V
VCM = 0.5V
18
16
14
12
10
8
6
4
2
0
OUTPUT CURRENT (mA)
–6
VOS (µV)
4 6
60812 G07
–2 20
–4
200
150
100
50
0
–50
–100
VS = 5V
VCM = 2.5V TA = 125°C
TA = 25°C
TA = 55°C
SINKING
CURRENT
SOURCING CURRENT
LTC6081/LTC6082
8
60812fd
For more information www.linear.com/LTC6081
CAPACITIVE LOAD (pF)
10
55
50
45
40
35
30
25
20
15
10
5
0
OVERSHOOT (%)
10000
60812 G18
100 1000
TA = 25°C
VS = 3V
VCM = 0.5V
AV = 1
AV = 10
VCM (V)
0
IBIAS (pA)
4.0 5.04.5
60812 G14
1.0 2.0 3.0 3.5
0.5 1.5 2.5
40
30
20
10
–40
–30
–20
–10
0
–50
LTC6081MS8
VS = 5V
TA = 85°C
TA = 70°C
TEMPERATURE (°C)
1000
100
10
1
0.120 40 60 80 100 120 140
60812 G13
INPUT BIAS CURRENT (pA)
VS = 5V
VCM = 2.5V
TIME (s)
0
OUTPUT NOISE (1µV/DIV)
50
60812 G12
3530252010 155 40 45
TA = 25°C
VS = 3V
VCM = 2.5V
FREQUENCY (Hz)
NOISE VOLTAGE (nV/√Hz)
1
300
100
80
60
40
20
200
180
160
140
120
280
260
240
220
0100 1k 100k
60812 G10
10 10k
VS = 3V
TA = 25°C
PMOS INPUTS
VCM = 0.5V
NMOS INPUTS
VCM = 2.5V
Typical perForMance characTerisTics
Noise Voltage vs Frequency
0.1Hz to 10Hz Output
Voltage Noise
0.1Hz to 10Hz Output
Voltage Noise
Input Bias Current vs Temperature IBIAS vs VCM IBIAS vs VCM
Large Signal Transient Small Signal Transient Overshoot vs CL
TIME (s)
0
50
60812 G11
3530252010 155 40 45
TA = 25°C
VS = 3V
VCM = 0.5V
VCM (V)
0
I
BIAS
(pA)
4.0 5.04.5
60812 G15
1.0 2.0 3.0 3.5
0.5 1.5 2.5
500
400
300
200
100
–400
–300
–200
–100
0
–500
LTC6081MS8
VS = 5V
TA = 125°C
200µs/DIV
0.5V/DIV
60812 G16
TA = 25°C
VS = ±1.5V
RL = 10k
CL = 100pF
GND
20µs/DIV
20mV/DIV
60812 G17
TA = 25°C
VS = ±1.5V
RL = 10k
CL = 100pF
GND
LTC6081/LTC6082
9
60812fd
For more information www.linear.com/LTC6081
FREQUENCY (Hz)
GAIN (dB)
60
–20
–40
40
20
0
PHASE (DEG)
180
–270
–180
–90
90
–450
–360
0
1M 100M
60812 G25
10M1k 100k10k
VS = 5V
VCM = 0.5V
TA = 25°C
CL = 200pF
PHASE
GAIN
RL = 10k
RL = 100k
FREQUENCY (Hz)
100 1k 10k 100k 1M 10M 100M
PSRR (dB)
60812 G27
120
100
80
60
40
0
–20
20
VS = 5V
VCM = 0.5V
TA = 25°C
FREQUENCY (Hz)
100 1k 10k 100k 1M 10M 100M
CMRR (dB)
60812 G26
120
100
80
60
40
0
–20
20
VS = 5V
VCM = 0.5V
TA = 25°C
RL = 1k
FREQUENCY (Hz)
GAIN (dB)
60
–20
–40
40
20
0
PHASE (DEG)
270
–270
–180
180
–90
90
–360
0
1M 100M
60812 G24
10M1k 100k10k
VS = 5V
VCM = 0.5V
TA = 25°C
PHASE
GAIN
RL = 10k
RL = 100k
OUTPUT VOLTAGE (V)
0
INPUT VOLTAGE (µV)
2.5 3.01.5 2.00.5 1.0
60812 G22
20
10
–40
–30
–20
–10
0
VS = 3V
TA = 25°C
RL = 100k
RL = 10k
RL = 2k
TIME (µs)
0
SUPPLY CURRENT OPAMP (µA)
500
60812 G20
300200100 400
1600
1200
800
400
0
SUPPLY VOLTAGE (V)
4
3
2
1
0
TA = 25°C
NO BYPASS CAPACITOR
SUPPLY VOLTAGE
SUPPLY CURRENT
TEMPERATURE (°C)
–40
SUPPLY CURRENT (µA)
110 125
60812 G19
–10 20 50 65 80 95–25 5 35
390
370
350
330
290
310
270
250
VCM = 0.5V
PER AMPLIFIER
VS = 3V
VS = 5V
Typical perForMance characTerisTics
Supply Current vs Temperature Supply Current vs Time Output Impedance vs Frequency
Open Loop Gain Open Loop Gain Open Loop Gain vs Frequency
Open Loop Gain vs Frequency CMRR vs Frequency PSRR vs Frequency
FREQUENCY (Hz)
100 1k 10k 100k 1M 10M 100M
OUTPUT IMPEDANCE (Ω)
60812 G21
1000
100
10
1
0.1
0.01
VS = 3V
VCM = 0.5V
TA = 25°C
AV = 100
AV = 10
AV = 1
OUTPUT VOLTAGE (V)
0
INPUT VOLTAGE (µV)
4.5 5.03.5 4.02.5 3.01.5 2.00.5 1.0
60812 G23
20
10
–40
–30
–20
–10
0
VS = 5V
TA = 25°C
RL = 100k
RL = 10k
RL = 2k
LTC6081/LTC6082
10
60812fd
For more information www.linear.com/LTC6081
pin FuncTions
OUT: Amplifier Output
–IN: Inverting Input
+IN: Noninverting Input
V+: Positive Supply
V–: Negative Supply
Typical perForMance characTerisTics
Channel Separation vs Frequency
Output Voltage Swing
vs Load Current Distortion vs Frequency
FREQUENCY (Hz)
100 1k 10k 100k 1M 10M 100M
CHANNEL SEPARATION (dB)
60812 G28
0
–100
–80
–60
–40
–140
–120
–20
VS = 3V
VCM = 0.5V
RL = 10k
LOAD CURRENT (mA)
OUTPUT VOLTAGE SWING (V)
(REFERRED TO SUPPLY VOLTAGE)
+VS
+VS –0.5
+VS –1.5
+VS –1.0
+VS –2.0
–VS 2.0
–VS 1.5
–VS 1.0
–VS 0.5
–VS 0
0.01 1 10 100
60789 G29
0.1
VS = 3V
VCM = 0.5V SOURCE
SINK
TA = 125°C
TA = 25°C
TA = –55°C
FREQUENCY (kHz)
1
–20
–40
–50
–60
–70
–30
–80
–90
–100
DISTORTION (dBc)
1000
60812 G30
10 100
VS = 5V
AV = 1
RL = 10k
VOUT = 2VP-P
2ND
3RD
SHDN_A: Shutdown Pin of Amplifier A, active low and only
valid for LTC6081DD. An internal current source pulls the
pin to V+ when floating.
SHDN_B: Shutdown Pin of Amplifier B, active low and only
valid for LTC6081DD. An internal current source pulls the
pin to V+ when floating.
NC: Not internally connected.
Exposed Pad: Connected to V–.
LTC6081/LTC6082
11
60812fd
For more information www.linear.com/LTC6081
–15
PERCENTAGE OF UNITS
0.30
0.25
0.20
0.15
0.10
0.5
0
60812 F01
–12 –9 –3–6 0
VOS CHANGE (µV)
151293 6
VOS CHANGE AFTER 3 THERMAL CYCLES
VCM = 0.5V
V+ = 3V
300 UNITS
applicaTions inForMaTion
Preserving Input Precision
Preserving input accuracy of the LTC6081/LTC6082 re-
quires that the application circuit and PC board layout do
not introduce errors comparable or greater than the 5µV
typical offset of the amplifiers. Temperature differentials
across the input connections can generate thermocouple
voltages of 10’s of microvolts so the connections to the
input leads should be short, close together and away from
heat dissipating components. Air current across the board
can also generate temperature differentials.
The extremely low input bias currents (0.1pA typical) al-
low high accuracy to be maintained with high impedance
sources and feedback resistors. Leakage currents on the
PC board can be higher than the input bias current. For
example, 10GΩ of leakage between a 5V supply lead and
an input lead will generate 500pA! Surround the input
leads with a guard ring driven to the same potential as the
input common mode voltage to avoid excessive leakage
in high impedance applications.
Capacitive Load
LTC6081/LTC6082 can drive capacitive load up to 200pF in
unity gain. The capacitive load driving capability increases
as the amplifier is used in higher gain configurations. A
small series resistance between the output and the load
further increases the amount of capacitance the amplifier
can drive.
SHDN Pins
Pins 5 and 6 are used for power shutdown on the LTC6081
in the DD package. If they are floating, internal current
sources pull Pins 5 and 6 to V+ and the amplifiers operate
normally. In shutdown, the amplifier output is high im-
pedance, and each amplifier draws less than 2µA current.
Rail-to-Rail Input
The input stage of LTC6081/LTC6082 combines both PMOS
and NMOS differential pairs, extending its input common
mode voltage range to both positive and negative supply
voltages. At high input common mode range, the NMOS
pair is on. At low common mode range, the PMOS pair is
on. The transition happens when the common voltage is
between 1.3V and 0.9V below the positive supply. LTC6081
has better low frequency noise performance with PMOS
input on due to its lower flicker noise (see Voltage Noise
vs Frequency and 0.1Hz to 10Hz Input Voltage Noise in
Typical Performance Characteristics).
Thermal Hysteresis
Figure 1 shows the input offset voltage hysteresis of the
LTC6081IMS8 for 3 thermal cycles from –45°C to 90°C.
The typical offset shift is ±4µV. The data was taken with
the ICs in stress free sockets. Mounting to PC boards
may cause additional hysteresis due to mechanical stress.
The LTC6081 will meet offset voltage specifications in the
electrical characteristics table even after 15µV of additional
error from thermal hysteresis.
Figure 1. VOS Thermal Hysteresis of LTC6081MS8
LTC6081/LTC6082
12
60812fd
For more information www.linear.com/LTC6081
PC Board Layout
Mechanical stress on a PC board and soldering-induced
stress can cause the VOS and VOS drift to shift. The DD
and DHC packages are more sensitive to stress. A simple
way to reduce the stress-related shifts is to mount the IC
near the short edge of the PC board, or in a corner. The
board edge acts as a stress boundary, or a region where
the flexure of the board is minimum. The package should
always be mounted so that the leads absorb the stress
applicaTions inForMaTion
Figure 2. Vertical Orientation of LTC6081DD with Slots
60812 F02
LONG DIMENSION
SLOTS
Simplified Schematic of the Amplifier
R1 R2
R3
V+
V–
R4
–
+
D8
D7
OUT
M8
M9
C1
C2
60812 SS
V+
V–
D5
D6
–
+
OUTPUT
CONTROL
M4
M6
A1
A2
M7
M5
I1
VBIAS
M1 M2
M3
–IN
V+
V–
V
+
V–
D3
D4
+IN
V–
M11M10
1µA I2
V+
V–
D1
D2
SHDN BIAS
GENERATION
NOTE: SHDN IS ONLY AVAILABLE
IN THE DFN10 PACKAGE
CLAMP
siMpliFieD scheMaTic
and not the package. The package is generally aligned
with the leads perpendicular to the long side of the PC
board (see Figure 2).
The most effective technique to relieve the PC board stress
is to cut slots in the board around the op amp. These slots
can be cut on three sides of the IC and the leads can exit on
the fourth side. Figure 2 shows the layout of a LTC6081DD
with slots at three sides.
LTC6081/LTC6082
13
60812fd
For more information www.linear.com/LTC6081
Typical applicaTions
Low Side Current Sense
60812 TA03
VDD
+
–
V+
15pF
1k
100k
RSH
VOUT = RSH • I • 101
eNOISE = 3µVP-P, RTI
BW ~ 1kHz
LOADI1/2
LTC6081
60812 TA04
V–
+
–
100k
VOUT = 1011 • VIN
V+
+
–
1M
100k
GAIN
TRIM
CMRR
TRIM
50k
100k
0.1µF
0.1µF
1.96k
976k
VIN
–
+
1/2
LTC6081
1/2
LTC6081
Two Op-Amp Instrumentation Amplifier
LTC6081/LTC6082
14
60812fd
For more information www.linear.com/LTC6081
60812 TA05
5V
5V –
+
1M
1M
10k
0.1µF
1µF
2.49M
VOUT = 10mV/°C
0°C TO 500°C
100pF
K
LT1025
R–
SENSOR: OMEGA 5TC-TT-K-30-36 K-TYPE THERMOCOUPLE
1M RESISTORS PROTECT CIRCUIT TO ±350V WITH NO PHASE REVERSAL OF AMPLIFIER OUTPUT
1pA MAX IBIAS TRANSLATES TO 0.05°C ERROR
20µV VOS → 0.5°C OFFSET
1/2
LTC6081
Typical applicaTions
Thermocouple Amplifier
Precision Nanoamp Bidirectional Current Source
–2.5V
2.5V
60812 TA06
+
–
0.01µF
0.1µF
0.1µF
IOUT = –1nA → 1nA FOR
VIN = –10V → 10V
TOTAL ERROR <±1% (10pA)
IOUT
VIN
–
+
100k
100k100k
100Ω
97.6k
10-TURN
5k
–
+
100k
1k
100Ω
10MΩ
3.9pF
LOAD
1/4
LTC6082
1/4
LTC6082
1/4
LTC6082
GAIN
TRIM
LTC6081/LTC6082
15
60812fd
For more information www.linear.com/LTC6081
packaGe DescripTion
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
3.00 ±0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.40 ±0.10
BOTTOM VIEW—EXPOSED PAD
1.65 ±0.10
(2 SIDES)
0.75 ±0.05
R = 0.125
TYP
2.38 ±0.10
(2 SIDES)
15
106
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DD) DFN REV C 0310
0.25 ±0.05
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.65 ±0.05
(2 SIDES)2.15 ±0.05
0.50
BSC
0.70 ±0.05
3.55 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
0.50 BSC
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
LTC6081/LTC6082
16
60812fd
For more information www.linear.com/LTC6081
packaGe DescripTion
3.00 ±0.10
(2 SIDES)
5.00 ±0.10
(2 SIDES)
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.40 ±0.10
BOTTOM VIEW—EXPOSED PAD
1.65 ±0.10
(2 SIDES)
0.75 ±0.05
R = 0.115
TYP
R = 0.20
TYP
4.40 ±0.10
(2 SIDES)
18
169
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DHC16) DFN 1103
0.25 ±0.05
PIN 1
NOTCH
0.50 BSC
4.40 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.65 ±0.05
(2 SIDES)2.20 ±0.05
0.50 BSC
0.65 ±0.05
3.50 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
DHC Package
16-Lead Plastic DFN (5mm × 3mm)
(Reference LTC DWG # 05-08-1706 Rev Ø)
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
LTC6081/LTC6082
17
60812fd
For more information www.linear.com/LTC6081
packaGe DescripTion
GN16 REV B 0212
1 2 345678
.229 – .244
(5.817 – 6.198)
.150 – .157**
(3.810 – 3.988)
16 15 14 13
.189 – .196*
(4.801 – 4.978)
12 11 10 9
.016 – .050
(0.406 – 1.270)
.015 ±.004
(0.38 ±0.10) × 45°
0° – 8° TYP
.007 – .0098
(0.178 – 0.249)
.0532 – .0688
(1.35 – 1.75)
.008 – .012
(0.203 – 0.305)
TYP
.004 – .0098
(0.102 – 0.249)
.0250
(0.635)
BSC
.009
(0.229)
REF
.254 MIN
RECOMMENDED SOLDER PAD LAYOUT
.150 – .165
.0250 BSC.0165 ±.0015
.045 ±.005
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
INCHES
(MILLIMETERS)
NOTE:
1. CONTROLLING DIMENSION: INCHES
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641 Rev B)
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
LTC6081/LTC6082
18
60812fd
For more information www.linear.com/LTC6081
packaGe DescripTion
MSOP (MS8) 0213 REV G
0.53 ±0.152
(.021 ±.006)
SEATING
PLANE
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.18
(.007)
0.254
(.010)
1.10
(.043)
MAX
0.22 – 0.38
(.009 – .015)
TYP
0.1016 ±0.0508
(.004 ±.002)
0.86
(.034)
REF
0.65
(.0256)
BSC
0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
1 2 34
4.90 ±0.152
(.193 ±.006)
8765
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0.52
(.0205)
REF
5.10
(.201)
MIN
3.20 – 3.45
(.126 – .136)
0.889 ±0.127
(.035 ±.005)
RECOMMENDED SOLDER PAD LAYOUT
0.42 ± 0.038
(.0165 ±.0015)
TYP
0.65
(.0256)
BSC
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660 Rev G)
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
LTC6081/LTC6082
19
60812fd
For more information www.linear.com/LTC6081
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation
that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
B 3/10 Change LT to LTC on all part numbers in Order Information Section. 3
C 07/10 Update to Simplified Schematic 12
D 12/13 Corrected resistor value (10M) 14
(Revision history begins at Rev B)
LTC6081/LTC6082
20
60812fd
For more information www.linear.com/LTC6081
LINEAR TECHNOLOGY CORPORATION 2007
LT 1213 REV D • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC6081
relaTeD parTs
Typical applicaTion
PART NUMBER DESCRIPTION COMMENTS
LT1678/LT1679 Dual/Quad Precision Op Amps Low Noise, 2.7V to 36V Operation
LTC2050 Zero-Drift Op Amp 2.7V Operation, SOT-23 Package
LTC2051/LTC2052 Dual/Quad Zero-Drift Op Amps MS8/GN16 Packages
LTC2054/LTC2055 Single/Dual Zero-Drift Op Amp Micropower, SOT-23 and DFN Packages
LTC6078/LTC6079 Dual/Quad Low Noise Precision CMOS Op Amps Micropower 0.7µV/°C VOS Drift
LTC6241/LTC6242 Dual/Quad Low Noise CMOS Op Amps 18MHz Bandwidth,10V/µs Slew Rate
LTC6244 Dual 50MHz CMOS Op Amp Low Noise, Rail-to-Rail Out, MS8 and DFN Packages
Single Supply Strain Gauge Amplifier
60812 TA02
+
–
0.01µF
350Ω
350Ω
100k
AV = 1001
SENSOR: OMEGA SG-3/350-LY41 STRAIN GAUGE
LT1790B
1.25V
1.25V
100Ω
9.76M
500k
CMRR
TRIM
3V
3.2V
–
+
0.1µF0.1µF
10M
10M
10M
3V
10k
1/2
LTC6081
1/2
LTC6081