K6X0808T1D-YQ85 - Samsung Electronics

CMOS SRAMK6X0808T1D Family

Revision 1.0

December 2003

Document Title

32Kx8 bit Low Power CMOS Static RAM

Revision History

Revision No.

0.0

0.1

0.2

1.0

Remark

Preliminary

Final

History

Initial draft

revised

- errata : corrected 28-SOP-525 to 28-SOP-450 in pakage type

revised

- Added commercial product.

Finalized

- Changed ICC from 3mA to 2mA

- Changed ICC2 from 25mA to 20mA

- Changed ISB from 3mA to 0.4mA

- Changed ISB1 for K6X0808T1D-F from 10µA to 6µA

- Changed ISB1 for K6X0808T1D-F from 20µA to 10µA

- Changed IDR for K6X0808T1D-F 10µA to 6µA

- Changed IDR for K6X0808T1D-Q 20µA to 10µA

- Errata correction

Draft Data

October 09, 2002

November 08, 2002

March 27, 2003

December 16, 2003

The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserves the right to change the specifications and

products. SAMSUNG Electronics will answer to your questions. If you have any questions, please contact the SAMSUNG branch offices.

CMOS SRAMK6X0808T1D Family

Revision 1.0

December 2003

32Kx8 bit Super Low Power and Low Voltage full CMOS Static RAM

GENERAL DESCRIPTION

The K6X0808T1D families are fabricated by SAMSUNG′s

advanced CMOS process technology. The families support

verious operating temperature ranges and have various pack-

age types for user flexibility of system design. The families

also support low data retention voltage for battery back-up

operation with low data retention current.

FEATURES

• Process Technology: Full CMOS28-

• Organization: 32K x 8

• Power Supply Voltage: 2.7~3.6V

• Low Data Retention Voltage: 1.5V(Min)

• Three state outputs

• Package Type: 28-SOP-450, 28-TSOP1-0813.4F/R

PRODUCT FAMILY

1. The parameters are tested with 30pF test load

Product Family Operating Temperature Vcc Range Speed

Power Dissipation

PKG Type

Standby

(ISB1, Max) Operating

(ICC2, Max)

K6X0808T1D-B Industrial(0~70°C)

2.7~3.6V 701)/85ns 6µA25mA 28-SOP-450, 28-TSOP1-0813.4F/R

K6X0808T1D-F Industrial(-40~85°C)

K6X0808T1D-Q Automotive(-40~125°C) 10µA28-SOP-450, 28-TSOP1-0813.4F

SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.

FUNCTIONAL BLOCK DIAGRAM

Precharge circuit.

Memory array

I/O Circuit

Column select

Clk gen.

Row

select

I/O1Data

cont

Data

cont

I/O8

CS1

Control

logic

Row

Addresses

Column Addresses

PIN DESCRIPTION

Pin Name Function Pin Name Function

A0~A14 Address Inputs I/O1~I/O8Data Inputs/Outputs

WE Write Enable Input Vcc Power

CS Chip Select Input Vss Ground

OE Output Enable Input NC No connect

A14

A12

I/O1

I/O2

I/O3

VSS

VCC

A13

A11

A10

I/O8

I/O7

I/O6

I/O5

I/O4

28-SOP

A11

A13

VCC

A14

A12

A10

I/O8

I/O7

I/O6

I/O5

I/O4

VSS

I/O3

I/O2

I/O1

28-TSOP

Type1 - Forward

28-TSOP

A11

A13

VCC

A14

A12

A10

I/O8

I/O7

I/O6

I/O5

I/O4

VSS

I/O3

I/O2

I/O1

Type1 - Reverse

CMOS SRAMK6X0808T1D Family

Revision 1.0

December 2003

PRODUCT LIST

Commercial Temp. Products(0~70°C) Industrial Temp. Products(-40~85°C) Atomotive Temp. Products(-40~125°C)

Part Name Function Part Name Function Part Name Function

K6X0808T1D-GB70

K6X0808T1D-GB85

K6X0808T1D-YB70

K6X0808T1D-YB85

K6X0808T1D-NB70

K6X0808T1D-NB85

28-SOP, 70ns, LL

28-SOP, 85ns, LL

28-sTSOP-F, 70ns, LL

28-sTSOP-F, 85ns, LL

28-sTSOP-R, 70ns, LL

28-sTSOP-R, 85ns, LL

K6X0808T1D-GF70

K6X0808T1D-GF85

K6X0808T1D-YF70

K6X0808T1D-YF85

K6X0808T1D-NF70

K6X0808T1D-NF85

28-SOP, 70ns, LL

28-SOP, 85ns, LL

28-sTSOP-F, 70ns, LL

28-sTSOP-F, 85ns, LL

28-sTSOP-R, 70ns, LL

28-sTSOP-R, 85ns, LL

K6X0808T1D-GQ70

K6X0808T1D-GQ85

K6X0808T1D-YQ70

K6X0808T1D-YQ85

28-SOP, 70ns, L

28-SOP, 85ns, L

28-sTSOP-F, 70ns, L

28-sTSOP-F, 85ns, L

ABSOLUTE MAXIMUM RATINGS1)

1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be

restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

Item Symbol Ratings Unit Remark

Voltage on any pin relative to Vss VIN,VOUT -0.2 to VCC+0.3V(Max. 3.9V) V-

Voltage on Vcc supply relative to Vss VCC -0.2 to 3.9 V-

Power Dissipation PD1.0 W-

Storage temperature TSTG -65 to 150 °C-

Operating Temperature TA-40 to 85 °CK6X0808T1D-F

-40 to 125 °CK6X0808T1D-Q

FUNCTIONAL DESCRIPTION

1. X means don't care (Must be in high or low states)

CS OE WE I/O Mode Power

HX1) X1) High-Z Deselected Standby

LH H High-Z Output Disabled Active

L L HDout Read Active

LX1) LDin Write Active

CMOS SRAMK6X0808T1D Family

Revision 1.0

December 2003

RECOMMENDED DC OPERATING CONDITIONS1)

Note:

1. Industrial Product: TA=-40 to 85°C, Otherwise specified

Automotive Product: TA=-40 to 125°C, Otherwise specified

2. Overshoot: Vcc+3.0V in case of pulse width≤30ns.

3. Undershoot: -3.0V in case of pulse width≤30ns.

4. Overshoot and undershoot are sampled, not 100% tested.

Item Symbol Min Typ Max Unit

Supply voltage Vcc 2.7 3.0/3.3 3.6 V

Ground Vss 000V

Input high voltage VIH 2.2 -Vcc+0.22) V

Input low voltage VIL -0.23) -0.6 V

CAPACITANCE1) (f=1MHz, TA=25°C)

1. Capacitance is sampled, not 100% tested

Item Symbol Test Condition Min Max Unit

Input capacitance CIN VIN=0V -8pF

Input/Output capacitance CIO VIO=0V -10 pF

DC AND OPERATING CHARACTERISTICS

Item Symbol Test Conditions Min Typ Max Unit

Input leakage current ILI VIN=Vss to Vcc -1 -1µA

Output leakage current ILO CS=VIH or OE=VIH or WE=VIL, VIO=VSS to Vcc -1 -1µA

Operating power supply current ICC IIO=0mA, CS=VIL, VIN=VIH or VIL, Read - - 2mA

Average operating current ICC1 Cycle time=1µs, 100% duty, IIO=0mA, CS≤0.2V,

VIN≤0.2VIN≥Vcc -0.2V - - 3mA

ICC2 Cycle time=Min,100% duty, IIO=0mA, CS=VIL, VIN=VIH or VIL - - 20 mA

Output low voltage VOL IOL=2.1mA - - 0.4 V

Output high voltage VOH IOH=-1.0mA 2.4 - - V

Standby Current(TTL) ISB CS=VIH, Other inputs=VIH or VIL - - 0.3 mA

Standby Current(CMOS) ISB1 CS≥Vcc-0.2V, Other inputs=0~Vcc K6X0808T1D-F - - 6µA

K6X0808T1D-Q - - 10 µA

CMOS SRAMK6X0808T1D Family

Revision 1.0

December 2003

AC CHARACTERISTICS (VCC=2.7~3.6V, Industrial product:TA=-40 to 85°C, Automotive product:TA=-40 to 125°C )

Parameter List Symbol Speed Bins Units

70ns 85ns

Min Max Min Max

Read

Read Cycle Time tRC 70 -85 -ns

Address Access Time tAA -70 -85 ns

Chip Select to Output tCO -70 -85 ns

Output Enable to Valid Output tOE -35 -40 ns

Chip Select to Low-Z Output tLZ 10 -10 -ns

Output Enable to Low-Z Output tOLZ 5-5-ns

Chip Disable to High-Z Output tHZ 0 25 0 25 ns

Output Disable to High-Z Output tOHZ 0 25 0 25 ns

Output Hold from Address Change tOH 10 -15 -ns

Write

Write Cycle Time tWC 70 -85 -ns

Chip Select to End of Write tCW 60 -70 -ns

Address Set-up Time tAS 0-0-ns

Address Valid to End of Write tAW 60 -70 -ns

Write Pulse Width tWP 50 -60 -ns

Write Recovery Time tWR 0-0-ns

Write to Output High-Z tWHZ 0 25 0 30 ns

Data to Write Time Overlap tDW 25 -35 -ns

Data Hold from Write Time tDH 0-0-ns

End Write to Output Low-Z tOW 5-5-ns

CL1)

1. Including scope and jig capacitance

AC OPERATING CONDITIONS

TEST CONDITIONS( Test Load and Input/Output Reference)

Input pulse level: 0.4 to 2.2V

Input rising and falling time: 5ns

Input and output reference voltage:1.5V

Output load(see right): CL=100pF+1TTL

CL=30pF+1TTL

DATA RETENTION CHARACTERISTICS

Item Symbol Test Condition Min Typ Max Unit

Vcc for data retention VDR CS1≥Vcc-0.2V 2.0 -3.6 V

Data retention current IDR Vcc=3.0V, CS1≥Vcc-0.2V K6X0808T1D-F - - 6µA

K6X0808T1D-Q 10 µA

Data retention set-up time tSDR See data retention waveform 0- - ms

Recovery time tRDR 5- -

CMOS SRAMK6X0808T1D Family

Revision 1.0

December 2003

Address

Data Out Previous Data Valid Data Valid

TIMING DIAGRAMS

TIMING WAVEFORM OF READ CYCLE(1) (Address Controlled, CS=OE=VIL, WE=VIH)

tAA

tRC

tOH

TIMING WAVEFORM OF READ CYCLE(2) (WE=VIH)

Data Valid

High-Z

Address

Data out

NOTES (READ CYCLE)

1. tHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage

levels.

2. At any given temperature and voltage condition, tHZ(Max.) is less than tLZ(Min.) both for a given device and from device to device

interconnection.

tOH

tAA

tOLZ

tLZ tOHZ

tHZ

tRC

tOE

tCO

CMOS SRAMK6X0808T1D Family

Revision 1.0

December 2003

TIMING WAVEFORM OF WRITE CYCLE(2) (CS Controlled)

Address

tWC

tWR(4)

tAS(3)

tDW tDH

Data Valid

Data in

Data out High-Z High-Z

tCW(2)

tWP(1)

tAW

NOTES (WRITE CYCLE)

1. A write occurs during the overlap of a low CS and a low WE. A write begins at the latest transition among CS going Low and WE

going low : A write end at the earliest transition among CS going high and WE going high, tWP is measured from the begining of write

to the end of write.

2. tCW is measured from the CS going low to the end of write.

3. tAS is measured from the address valid to the beginning of write.

4. tWR is measured from the end or write to the address change. tWR applied in case a write ends as CS or WE going high.

TIMING WAVEFORM OF WRITE CYCLE(1) (WE Controlled)

Address

tCW(2) tWR(4)

tWP(1)

tDW tDH

tOW

tWHZ

Data Undefined

Data Valid

Data in

Data out

tWC

tAW

tAS(3)

DATA RETENTION WAVE FORM

CS controlled

VCC

3.0V/2.7V

2.2V

VDR

GND

Data Retention Mode

CS≥VCC - 0.2V

tSDR tRDR

CMOS SRAMK6X0808T1D Family

Revision 1.0

December 2003

PACKAGE DIMENSIONS Units: millimeter(inch)

28 PIN PLASTIC SMALL OUTLINE PACKAGE(450mil)

0~8°

#28

11.81±0.30

0.465±0.012

18.29±0.20

0.720±0.008

MAX

18.69

0.736

MAX

2.59±0.20

0.102±0.008

3.00

0.118

MIN

0.002

0.05

0.004 MAX

0.10 MAX

#15

0.41±0.10

0.016±0.004

#1 #14

0.89

( )

0.035

11.43

0.450

8.38±0.20

0.330±0.008

1.02±0.20

0.040±0.008

+0.10

0.15 -0.05

+0.004

0.006 -0.002

1.27

0.050

CMOS SRAMK6X0808T1D Family

Revision 1.0

December 2003

PACKAGE DIMENSIONS

28 PIN THIN SMALL OUTLINE PACKAGE TYPE1 (0813.4F)

#28

1.00±0.10

0.039±0.004

MAX

8.40

0.331

0.004 MAX

0.10 MAX

13.40±0.20

0.528±0.008

#15#14

+0.10

0.20 -0.05

+0.004

0.008

-0.002

0.55

0.0217

0.425

( )

0.017

MIN

0.05

0.002

MAX

1.20

0.047

8.00

0.315

#28

1.00±0.10

0.039±0.004

MAX

8.40

0.331

0.004 MAX

0.10 MAX

0.50

( )

0.020

11.80±0.10

0.465±0.004

0.45 ~0.75

0.018 ~0.030

13.40±0.20

0.528±0.008

#15#14

+0.10

0.15 -0.05

+0.004

0.006

-0.002

0~8°

0.425

( )

0.017

MIN

0.05

0.002

MAX

1.20

0.047

8.00

0.315

TYP

0.25

0.010

0.55

0.0217

+0.10

0.20 -0.05

+0.004

0.008

-0.002

28 PIN THIN SMALL OUTLINE PACKAGE TYPE1 (0813.4R)

0.50

( )

0.020

11.80±0.10

0.465±0.004

0.45 ~0.75

0.018 ~0.030

+0.10

0.15 -0.05

+0.004

0.006

-0.002

0~8°

TYP

0.25

0.010

Units: millimeter(inch)