1
1.8V to 3.3V, Micro-Power, ±15kV ESD, +125°C, Slew
Rate Limited, RS-485/RS-422 Transceivers
ISL32600E, ISL32601E, ISL32602E, ISL32603E
The Intersil ISL32600E, ISL32601E, ISL32602E and
ISL32603E are ±15kV IEC61000 ESD protected, micro power,
wide supply range transceivers for differential communication.
The ISL32600E and ISL32601E operate with VCC ≥ 2.7V and
have maximum supply currents as low as 100µA with both the
transmitter (Tx) and receiver (Rx) enabled. The ISL32602E and
ISL32603E operate with supply voltages as low as 1.8V. These
transceivers have very low bus currents, so they present less
than a “1/8 unit load” to the bus. This allows more than 256
transmitters on the network, without violating the RS-485
specification’s 32 unit load maximum.
Rx inputs feature symmetrical switching thresholds, and up to
65mV of hysteresis, to improve noise immunity and to reduce
duty cycle distortion in the presence of slow moving input
signals (see Figure 9). The Rx input common mode range is the
full -7V to +12V RS-485 range for supply voltages ≥ 3V.
Hot Plug circuitry ensures that the Tx and Rx outputs remain in
a high impedance state while the power supply stabilizes.
This transceiver family utilizes slew rate limited drivers, which
reduce EMI, and minimize reflections from improperly terminated
transmission lines, or unterminated stubs in multidrop and
multipoint applications.
The ISL32600E and ISL32602E are configured for full duplex
(separate Rx input and Tx output pins) applications. The half
duplex versions multiplex the Rx inputs and Tx outputs to allow
transceivers with output disable functions in 8 Ld packages.
See Table 1 for a summary of each device’s features.
Features
• Single 1.8V, 3V, or 3.3V Supply
• Low Supply Currents . . . . . . . ISL32601E, 100µA (Max) @ 3V
. . . . . . ISL32603E, 150µA (Max) @ 1.8V
- Ultra Low Shutdown Supply Current . . . . . . . . . . . . . . 10nA
• IEC61000 ESD Protection on RS-485 I/O Pins . . . . . . ±15kV
- Class 3 ESD Levels on all Other Pins . . . . . . . . . >8kV HBM
• Symmetrical Switching Thresholds for Less Duty Cycle
Distortion (See Figure 9)
• Up to 65mV Hysteresis for Improved Noise Immunity
• Data Rates from 128kbps to 460kbps
• Specified for +125°C Operation
• 1/8 Unit Load Allows up to 256 Devices on the Bus
• -7V to +12V Common Mode Input/Output Voltage Range
(VCC ≥ 3V)
• Half and Full Duplex Pinouts; Three State Rx and Tx Outputs
•5V Tolerant Logic Inputs
• Tiny MSOP Packages Consume 50% Less Board Space
Applications
• Differential Sensor Interfaces
• Process Control Networks
•Security Camera Networks
• Building Environmental Control/Lighting Systems
FIGURE 1. ISL32600E AND ISL32601E HAVE A 9.6kbps
OPERATING ICC LOWER THAN THE STATIC ICC OF
MANY EXISTING 3V TRANSCEIVERS
SUPPLY VOLTAGE (V)
ICC (A)
2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6
10µ
100µ
1m
25°C, RD = ∞, CD = 50pF
DE = VCC, RE = GND
ISL3260XE STATIC
ISL3260XE DYNAMIC (9.6kbps)
ISL3172E STATIC
ISL3172E DYNAMIC (9.6kbps)
FIGURE 2. ISL32602E AND ISL32603E WITH VCC = 1.8V REDUCE
OPERATING ICC BY A FACTOR OF 25 TO 40,
COMPARED WITH ICC AT VCC =3.3V
SUPPLY VOLTAGE (V)
ICC (A)
100µ
1m
10m
1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6
DE = VCC, RE = GND
STATIC
DYNAMIC (128kbps)
DYNAMIC (256kbps)
25°C, RD = ∞, CD = 50pF
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2012. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
June 22, 2012
FN7967.0
ISL32600E, ISL32601E, ISL32602E, ISL32603E
2FN7967.0
June 22, 2012
TABLE 1. SUMMARY OF FEATURES
PART
NUMBER
SUPPLY
RANGE (V)
HALF/FULL
DUPLEX
DATA RATE
(kbps)
SLEW-RATE
LIMITED?
HOT
PLUG?
# DEVICES
ON BUS
RX/TX
ENABLE?
QUIESCENT
ICC (µA)
LOW POWER
SHUTDOWN?
PIN
COUNT
ISL32600E 2.7 to 3.6 FULL 128 - 256 YES YES 256 YES 60 @ 3V YES 10, 14
ISL32601E 2.7 to 3.6 HALF 128 - 256 YES YES 256 YES 60 @ 3V YES 8
ISL32602E 1.8 to 3.6 FULL 256 - 460 YES YES 256 YES 105 @ 1.8V YES 10, 14
ISL32603E 1.8 to 3.6 HALF 256 - 460 YES YES 256 YES 105 @ 1.8V YES 8
Pin Configurations
ISL32601E, ISL32603E
(8 LD MSOP, SOIC)
TOP VIEW
ISL32600E, ISL32602E
(10 LD MSOP)
TOP VIEW
ISL32600E, ISL32602E
(14 LD SOIC)
TOP VIEW
RO
RE
DE
DI
1
2
3
4
8
7
6
5
VCC
B/Z
A/Y
GND
D
R
RO
RE
DE
DI
GND
VCC
A
B
Z
Y
1
2
3
4
5
10
9
8
7
6
D
R
NC
RO
RE
DE
DI
GND
GND
VCC
NC
A
B
Z
Y
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
D
R
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL32600EFBZ 32600EFBZ -40 to +125 14 Ld SOIC M14.15
ISL32600EFUZ 32600 -40 to +125 10 Ld MSOP M10.118
ISL32601EFBZ 32601 EFBZ -40 to +125 8 Ld SOIC M8.15
ISL32601EFUZ 32601 -40 to +125 8 Ld MSOP M8.118
ISL32602EFBZ 32602EFBZ -40 to +125 14 Ld SOIC M14.15
ISL32602EFUZ 32602 -40 to +125 10 Ld MSOP M10.118
ISL32603EFBZ 32603 EFBZ -40 to +125 8 Ld SOIC M8.15
ISL32603EFUZ 32603 -40 to +125 8 Ld MSOP M8.118
NOTES:
1. Add “-T” (full reel) or -T7A (250 piece reel) suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL32600E, ISL32601E, ISL32602E, ISL32603E. For more information
on MSL please see tech brief TB363.
ISL32600E, ISL32601E, ISL32602E, ISL32603E
3FN7967.0
June 22, 2012
Truth Tables
TRANSMITTING
INPUTS OUTPUTS
RE DE DI Z Y
X1101
X1010
0 0 X High-Z High-Z
1 0 X High-Z * High-Z *
NOTE: *Shutdown Mode (See Note 11).
Truth Tables (continued)
RECEIVING
INPUTS OUTPUT
RE DE
Half Duplex
DE
Full Duplex
A-B RO
00 X≥ 0.2V 1
00 X≤ -0.2V 0
00 XInputs Open1
10 0 XHigh-Z *
11 1 XHigh-Z
NOTE: *Shutdown Mode (See Note 11).
Pin Descriptions
PIN
8 LD
PACKAGE
10 LD
PACKAGE
14 LD
PACKAGE FUNCTION
RO 1 1 2 Receiver output: If A-B ≥ 200mV, RO is high; If A-B ≤ -200mV, RO is low; RO = High if A and B are unconnected
(floating).
RE 2 2 3 Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. If the Rx enable
function isn’t required, connect RE directly to GND.
DE 3 3 4 Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high, and are high impedance
when DE is low. If the Tx enable function isn’t required, connect DE to VCC.
DI 4 4 5 Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high
and output Z low.
GND 5 5 6, 7 Ground connection.
A/Y 6 - - ±15kV IEC61000 ESD Protected RS-485/422 level, noninverting receiver input and noninverting driver
output. Pin is an input if DE = 0; pin is an output if DE = 1.
B/Z 7 - - ±15kV IEC61000 ESD Protected RS-485/422 level, Inverting receiver input and inverting driver output. Pin is
an input if DE = 0; pin is an output if DE = 1.
A - 9 12 ±15kV IEC61000 ESD Protected RS-485/422 level, noninverting receiver input.
B - 8 11 ±15kV IEC61000 ESD Protected RS-485/422 level, inverting receiver input.
Y - 6 9 ±15kV IEC61000 ESD Protected RS-485/422 level, noninverting driver output.
Z - 7 10 ±15kV IEC61000 ESD Protected RS-485/422 level, inverting driver output.
VCC 8 10 14 System power supply input (2.7V to 3.6V for ISL32600E and ISL32601E; 1.8V to 3.6V for ISL32602E and
ISL32603E).
NC - - 1, 8, 13 No Internal Connection.
ISL32600E, ISL32601E, ISL32602E, ISL32603E
4FN7967.0
June 22, 2012
Typical Operating Circuits
HALF DUPLEX NETWORK USING ISL32603E
FULL DUPLEX NETWORK USING ISL32600E
0.1µF
+
D
R
7
6
8
1
2
3
4
5
VCC
GND
RO
RE
DE
DI
A/Y
B/Z
+1.8V
0.1µF +
D
R
6
7
8
1
2
3
4
5
VCC
GND
RO
RE
DE
DI
A/Y
B/Z
+1.8V
} NOTE 14
0.1µF
+
D
R
12
11
10
9
14
2
3
4
5
6, 7
VCC
GND
RO
RE
DE
DI
A
B
Y
Z
+3.3V
0.1µF +
D
R
12
11
10
9
14
2
3
4
5
6, 7
VCC
GND
RO
RE
DE
DI
A
B
Y
Z
+3.3V
RT
RT
(PIN NUMBERS FOR SOIC)
} NOTE 14
ISL32600E, ISL32601E, ISL32602E, ISL32603E
5FN7967.0
June 22, 2012
Absolute Maximum Ratings Thermal Information
VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Input Voltages
DI, DE, RE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Input/Output Voltages
A, B, . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8V to +13V
A/Y, B/Z, Y, Z (VCC = 0V or ≥ 3V) . . . . . . . . . . . . . . . . . . . . . . . -8V to +13V
A/Y, B/Z, Y, Z (1.8V ≤ VCC < 3V) . . . . . . . . . . . . . . . . . . . . . . . -8V to +11V
RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC +0.3V)
Short Circuit Duration
Y, Z. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indeterminate
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Latch-up (per JESD78, Level 2, Class A) . . . . . . . . . . . . . . . . . . . . . . +125°C
Recommended Operating Conditions
Supply Voltage Range
ISL32600E, ISL32601E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 3.3V
ISL32602E, ISL32603E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8V to 3.3V
Differential Load Resistance
ISL32600E, ISL32601E . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60Ω or 120Ω
ISL32602E, ISL32603E . . . . . . . . . . . . . . . ≥10kΩ @ 1.8V; 120Ω @ 3.3V
Thermal Resistance (Typical, Notes 4, 5) θJA (°C/W) θJC (°C/W)
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . 105 47
8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . 140 40
10 Ld MSOP Package . . . . . . . . . . . . . . . . . . 160 59
14 Ld SOIC Package . . . . . . . . . . . . . . . . . . . 128 39
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . -65°C to +150°C
Pb-free reflow profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions (continued)
Common Mode Range
ISL32600E, ISL32601E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7V to +12V
ISL32602E, ISL32603E
VCC = 1.8V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2V to +2V
VCC = 3.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7V to +12V
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
5. For θJC, the “case temp” location is taken at the package top center.
Electrical Specifications ISL32600E, ISL32601E: Test Conditions: VCC = 2.7V to 3.6V; Typicals are at VCC = 3V, TA = +25°C;
Unless Otherwise Specified. Boldface limits apply over the operating temperature range. (Note 6)
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C)
MIN
(Note 15) TYP
MAX
(Note 15) UNITS
DC CHARACTERISTICS
Driver Differential VOUT VOD RL = 100Ω (RS-422) (Figure 3A, VCC ≥ 3.15V) Full 1.95 2.1 -V
RL = 54Ω (RS-485)
(Figure 3A)
VCC = 2.7V Full 1.2 1.5 VCC V
VCC ≥ 3V Full 1.4 1.7 VCC V
No Load Full --VCC V
RL = 60Ω, -7V ≤ VCM ≤ 12V (Figure 3B,
VCC ≥ 3V)
Full 1.3 --V
Change in Magnitude of Driver
Differential VOUT for
Complementary Output States
ΔVOD RL = 54Ω or 100Ω (Figure 3A) Full -0.01 0.2 V
Driver Common-Mode VOUT VOC RL = 54Ω or 100Ω (Figure 3A) Full --3V
Change in Magnitude of Driver
Common-Mode VOUT for
Complementary Output States
ΔVOC RL = 54Ω or 100Ω (Figure 3A) Full -0.01 0.2 V
Output Leakage Current (Y, Z) (Full
Duplex Versions Only)
IOZD DE = 0V, VCC = 0V
(-7V ≤VIN ≤12V) or
2.7V ≤ VCC ≤ 3.6V
VIN = 12V (VCC ≥ 3V) Full -360 µA
VIN = 10V (VCC = 2.7V) Full -360 µA
VIN = -7V Full -30 -10 -µA
Driver Short-Circuit Current,
VO = High or Low
IOSD DE = VCC, -7V ≤ VY or VZ ≤ 12V (Note 8) Full --±250 mA
Logic Input High Voltage VIH DI, DE, RE Full 2--V
Logic Input Low Voltage VIL DI, DE, RE Full --0.7 V
Logic Input Current IIN1 DI = DE = RE = 0V or VCC (Note 14) Full -1 -1µA
ISL32600E, ISL32601E, ISL32602E, ISL32603E
6FN7967.0
June 22, 2012
Input Current (A, B, A/Y, B/Z) IIN2 DE = 0V, VCC = 0V
(-7V ≤VIN ≤12V) or
2.7V ≤ VCC ≤ 3.6V
VIN = 12V (VCC ≥ 2.7V
for A, B)
Full -80 125 µA
VIN = 12V (VCC ≥ 3V for
A/Y, B/Z)
Full -80 125 µA
VIN = 10V (VCC = 2.7V
for A/Y, B/Z)
Full -80 125 µA
VIN = -7V Full -100 -50 -µA
Receiver Differential Threshold
Voltage
VTH -7V ≤ VCM ≤ 12V Full -200 0200 mV
Receiver Input Hysteresis ΔVTH -7V ≤ VCM ≤ 12V Full -40 -mV
Receiver Output High Voltage VOH IO = -4mA, VID = 200mV Full VCC - 0.5 --V
Receiver Output Low Voltage VOL IO = 4mA, VID = -200mV Full --0.4 V
Three-State (high impedance)
Receiver Output Current
IOZR 0V ≤ VO ≤ VCC, RE = VCC Full -1 -1µA
Receiver Short-Circuit Current IOSR 0V ≤ VO ≤ VCC Full -30 ±60 mA
SUPPLY CURRENT
No-Load Supply Current (Note 7) ICC DI = 0V or VCC,
DE = VCC, RE = 0V or
VCC
VCC = 3V Full -60 100 µA
VCC = 3.6V Full -70 120 µA
DI = 0V or VCC, Rx Only
(DE = 0V, RE = 0V)
VCC = 3V Full -42 65 µA
VCC = 3.6V Full -46 80 µA
Shutdown Supply Current ISHDN DE = 0V, RE = VCC, DI = 0V or VCC Full -0.01 1µA
ESD PERFORMANCE
RS-485 Pins (A, Y, B, Z, A/Y, B/Z) IEC61000-4-2, Air-Gap Discharge Method 25 -±15 -kV
IEC61000-4-2, Contact Discharge Method 25 -±8 -kV
Human Body Model, From Bus Pins to GND 25 -±15 -kV
All Pins HBM, per MIL-STD-883 Method 3015 25 -±8 -kV
Machine Model 25 -400 -V
SWITCHING CHARACTERISTICS
Maximum Data Rate fMAX RDIFF = 54Ω,
(Figures 6, 7)
VCC = 2.7V Full 128 --kbps
VCC ≥ 3V Full 256 --kbps
Driver Differential Output Delay tDD RDIFF = 54Ω, CD = 50pF (Figure 4) Full -340 600 ns
Driver Differential Output Skew tSKEW RDIFF = 54Ω, CD = 50pF (Figure 4) Full -130 ns
Driver Differential Rise or Fall Time tR, tFRDIFF = 54Ω, CD = 50pF (Figure 4) Full 200 400 1000 ns
Driver Enable to Output High tZH RL = 1kΩ, CL = 50pF, SW = GND (Figure 5),
(Note 9)
Full --1000 ns
Driver Enable to Output Low tZL RL = 1kΩ, CL = 50pF, SW = VCC (Figure 5),
(Note 9)
Full --1000 ns
Driver Disable from Output High tHZ RL = 1kΩ, CL = 50pF, SW = GND (Figure 5) Full --150 ns
Driver Disable from Output Low tLZ RL = 1kΩ, CL = 50pF, SW = VCC (Figure 5) Full --150 ns
Driver Enable from Shutdown to
Output High
tZH(SHDN) RL = 1kΩ, CL = 50pF, SW = GND (Figure 5),
(Notes 11, 12)
Full --10 µs
Electrical Specifications ISL32600E, ISL32601E: Test Conditions: VCC = 2.7V to 3.6V; Typicals are at VCC = 3V, TA = +25°C;
Unless Otherwise Specified. Boldface limits apply over the operating temperature range. (Note 6) (Continued)
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C)
MIN
(Note 15) TYP
MAX
(Note 15) UNITS
ISL32600E, ISL32601E, ISL32602E, ISL32603E
7FN7967.0
June 22, 2012
Driver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 1kΩ, CL = 50pF, SW = VCC (Figure 5),
(Notes 11, 12)
Full --10 µs
Time to Shutdown tSHDN (Note 11) Full 50 -600 ns
Receiver Input to Output Delay tPLH, tPHL (Figure 7) Full -750 1300 ns
Receiver Skew | tPLH - tPHL |t
SKD (Figure 7) Full -115 300 ns
Receiver Enable to Output High tZH RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Note 10)
Full --50 ns
Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Note 10)
Full --50 ns
Receiver Disable from Output High tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 8) Full -12 50 ns
Receiver Disable from Output Low tLZ RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8) Full -13 50 ns
Receiver Enable from Shutdown to
Output High
tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Notes 11, 13)
Full --12 µs
Receiver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Notes 11, 13)
Full --12 µs
NOTES:
6. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
7. Supply current specification is valid for loaded drivers when DE = 0V.
8. Applies to peak current. See “Typical Performance Curves” starting on page 14 for more information.
9. When testing this parameter, keep RE = 0 to prevent the device from entering SHDN.
10. When testing this parameter, the RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
11. Devices are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 50ns, the parts are guaranteed not to enter
shutdown. If the inputs are in this state for at least 600ns (1200ns if VCC=1.8V), the parts are guaranteed to have entered shutdown. See “Low Power
Shutdown Mode” on page 13.
12. Keep RE = VCC, and set the DE signal low time >600ns (1200ns if VCC=1.8V) to ensure that the device enters SHDN.
13. Set the RE signal high time >600ns (1200ns if VCC=1.8V) to ensure that the device enters SHDN.
14. If the Tx or Rx enable function isn’t needed, connect the enable pin to the appropriate supply (see “Pin Descriptions” on page 3).
15. Compliance to data sheet limits is assured by one or more methods: production test, characterization and/or design.
Electrical Specifications ISL32602E, ISL32603E: Test Conditions: VCC = 1.8V to 3.6V; Typicals are at VCC = 1.8V,
TA = +25°C; Unless Otherwise Specified. Boldface limits apply over the operating temperature range. (Note 6)
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C)
MIN
(Note 15) TYP
MAX
(Note 15) UNITS
DC CHARACTERISTICS
Driver Differential VOUT VOD RL = 100Ω (RS-422)
(Figure 3A)
VCC = 1.8V Full 0.8 0.9 -V
VCC ≥ 3.15V Full 1.95 2.25 -V
No Load, VCC = 1.8V Full 1.1 1.4 VCC
RL = 54Ω (RS-485) (Figure 3A, VCC ≥ 3V) Full 1.5 1.95 -V
RL = 60Ω, -7V ≤ VCM ≤ 12V (Figure 3B,
VCC ≥ 3V)
Full 1.3 --V
Change in Magnitude of Driver
Differential VOUT for
Complementary Output States
ΔVOD RL = 100Ω (Figure 3A) Full -0.01 0.2 V
Driver Common-Mode VOUT VOC RL = 100Ω (Figure 3A) Full --3V
Electrical Specifications ISL32600E, ISL32601E: Test Conditions: VCC = 2.7V to 3.6V; Typicals are at VCC = 3V, TA = +25°C;
Unless Otherwise Specified. Boldface limits apply over the operating temperature range. (Note 6) (Continued)
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C)
MIN
(Note 15) TYP
MAX
(Note 15) UNITS
ISL32600E, ISL32601E, ISL32602E, ISL32603E
8FN7967.0
June 22, 2012
Change in Magnitude of Driver
Common-Mode VOUT for
Complementary Output States
ΔVOC RL = 100Ω (Figure 3A) Full -0.01 0.2 V
Output Leakage Current (Y, Z)
(Full Duplex Versions Only)
IOZD DE = 0V, VCC = 0V
(-7V ≤VIN ≤12V) or
1.8V or
3V ≤ VCC ≤ 3.6V
VOUT =12V (V
CC ≥ 3V) Full -160 µA
VOUT =10V (V
CC = 1.8V) Full -160 µA
VOUT = -7V Full -30 -10 -µA
Driver Short-Circuit Current,
VO = High or Low
IOSD DE = VCC, -7V ≤ VY or VZ ≤ 12V (3.0V ≤VCC ≤3.6V) or
-7V ≤ VY or VZ ≤ 10V (VCC =1.8V) (Note 8)
Full --±250 mA
Logic Input High Voltage VIH DI, DE, RE VCC ≥ 1.8V Full 1.26 --V
VCC ≥ 3V Full 2--V
Logic Input Low Voltage VIL DI, DE, RE VCC ≥ 1.8V Full --0.4 V
VCC ≥ 3V Full --0.8 V
Logic Input Current IIN1 DI = DE = RE = 0V or VCC (Note 14) Full -1 -1µA
Input Current (A, B, A/Y, B/Z) IIN2 DE = 0V, VCC = 0V
(-7V ≤VIN ≤12V) or
1.8V or
3V ≤ VCC ≤ 3.6V
VIN = 12V (A, B Only) Full -80 125 µA
VIN =12V (V
CC ≥ 3V for A/Y,
B/Z)
Full -80 125 µA
VIN =10V (V
CC = 1.8V for
A/Y, B/Z)
Full -80 125 µA
VIN = -7V Full -100 -50 -µA
Receiver Differential Threshold
Voltage
VTH -7V ≤ VY or VZ ≤ 2V at VCC = 1.8V or -7V ≤ VY or
VZ ≤ 12V at VCC ≥3V
Full -200 0200 mV
Receiver Input Hysteresis ΔVTH -7V ≤ VY or VZ ≤ 2V at VCC = 1.8V or -7V ≤ VY or
VZ ≤ 12V at VCC ≥3V
Full -65 -mV
Receiver Output High Voltage VOH IO = -1mA, VID = 200mV Full VCC - 0.4 --V
Receiver Output Low Voltage VOL IO = 2.2mA, VID = -200mV Full --0.4 V
Three-State (high impedance)
Receiver Output Current
IOZR 0V ≤ VO ≤ VCC, RE = VCC Full -1 -1µA
Receiver Short-Circuit Current IOSR 0V ≤ VO ≤ VCC Full --±60 mA
SUPPLY CURRENT
No-Load Supply Current (Note 7) ICC DI = 0V or VCC,
DE = VCC, RE = 0V or
VCC
VCC = 1.8V Full -105 150 µA
VCC = 3.6V Full -150 350 µA
DI = 0V or VCC, Rx Only
(DE = 0V,
RE = 0V)
VCC = 1.8V Full -90 115 µA
VCC = 3.6V Full -125 260 µA
Shutdown Supply Current ISHDN DE = 0V, RE = VCC, DI = 0V or VCC Full --1µA
ESD PERFORMANCE
RS-485 Pins (A, Y, B, Z, A/Y, B/Z) IEC61000-4-2, Air-Gap Discharge Method 25 -±15 -kV
IEC61000-4-2, Contact Discharge Method 25 -±8 -kV
Human Body Model, From Bus Pins to GND 25 -±15 -kV
All Pins HBM, per MIL-STD-883 Method 3015 25 -±8 -kV
Machine Model 25 -400 -V
Electrical Specifications ISL32602E, ISL32603E: Test Conditions: VCC = 1.8V to 3.6V; Typicals are at VCC = 1.8V,
TA = +25°C; Unless Otherwise Specified. Boldface limits apply over the operating temperature range. (Note 6) (Continued)
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C)
MIN
(Note 15) TYP
MAX
(Note 15) UNITS
ISL32600E, ISL32601E, ISL32602E, ISL32603E
9FN7967.0
June 22, 2012
SWITCHING CHARACTERISTICS
Maximum Data Rate fMAX (Figures 6, 7) VCC = 1.8V, RDIFF = ∞Full 256 --kbps
VCC ≥ 3V, RDIFF = 54ΩFull 460 --kbps
Driver Differential Output Delay tDD CD = 50pF (Figure 4) VCC = 1.8V, RDIFF = ∞Full -750 2600 ns
VCC ≥ 3V, RDIFF = 54ΩFull -350 1500 ns
Driver Differential Output Skew tSKEW CD = 50pF (Figure 4) VCC = 1.8V, RDIFF = ∞Full -120 220 ns
VCC ≥ 3V, RDIFF = 54ΩFull -2100 ns
Driver Differential Rise or Fall Time tR, tFCD = 50pF (Figure 4) VCC = 1.8V, RDIFF = ∞Full 150 1700 4500 ns
VCC ≥ 3V, RDIFF = 54ΩFull 200 400 900 ns
Driver Enable to Output High tZH RL = 1kΩ, CL = 50pF, SW = GND (Figure 5),
(Note 9)
Full --3000 ns
Driver Enable to Output Low tZL RL = 1kΩ, CL = 50pF, SW = VCC (Figure 5),
(Note 9)
Full --3000 ns
Driver Disable from Output High tHZ RL = 1kΩ, CL = 50pF, SW = GND (Figure 5) Full --250 ns
Driver Disable from Output Low tLZ RL = 1kΩ, CL = 50pF, SW = VCC (Figure 5) Full --250 ns
Driver Enable from Shutdown to
Output High
tZH(SHDN) RL = 1kΩ, CL = 50pF, SW = GND (Figure 5),
(Notes 11, 12)
Full --3000 ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 1kΩ, CL = 50pF, SW = VCC (Figure 5),
(Notes 11, 12)
Full --3000 ns
Time to Shutdown tSHDN (Note 11) Full 50 500 1200 ns
Receiver Input to Output Delay tPLH, tPHL (Figure 7) Full -180 1000 ns
Receiver Skew | tPLH - tPHL |t
SKD (Figure 7) Full -35 250 ns
Receiver Enable to Output High tZH RL = 1kΩ, CL = 15pF, SW = GND (Figure 8), (Note 10) Full --100 ns
Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8), (Note 10) Full --100 ns
Receiver Disable from Output High tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 8) Full --75 ns
Receiver Disable from Output Low tLZ RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8) Full --75 ns
Receiver Enable from Shutdown to
Output High
tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Notes 11, 13)
Full --5500 ns
Receiver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Notes 11, 13)
Full --5500 ns
Electrical Specifications ISL32602E, ISL32603E: Test Conditions: VCC = 1.8V to 3.6V; Typicals are at VCC = 1.8V,
TA = +25°C; Unless Otherwise Specified. Boldface limits apply over the operating temperature range. (Note 6) (Continued)
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C)
MIN
(Note 15) TYP
MAX
(Note 15) UNITS
ISL32600E, ISL32601E, ISL32602E, ISL32603E
10 FN7967.0
June 22, 2012
Test Circuits and Waveforms
FIGURE 3A. VOD AND VOC FIGURE 3B. VOD WITH COMMON MODE LOAD
FIGURE 3. DC DRIVER TEST CIRCUITS
FIGURE 4A. TEST CIRCUIT FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
FIGURE 5A. TEST CIRCUIT FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. DRIVER ENABLE AND DISABLE TIMES
D
DE
DI
VCC
VOD
VOC
RL/2
RL/2
Z
Y
D
DE
DI
VCC
VOD
375Ω
375Ω
Z
Y
RL = 60Ω
VCM
-7V to +12V
D
DE
DI
VCC
SIGNAL
GENERATOR
CD
RDIFF
Z
Y
OUT (Z)
VCC
0V
50%50%
VOH
VOL
OUT (Y)
tDDLH tDDHL
DIFF OUT (Y - Z)
tR
+VOD
-VOD
90% 90%
tF
10% 10%
DI
tSKEW = |tDDLH - tDDHL|
D
DE
DI Z
Y
VCC
GND
SW
PARAMETER OUTPUT RE DI SW
tHZ Y/Z X 1/0 GND
tLZ Y/Z X 0/1 VCC
tZH Y/Z 0 (Note 9) 1/0 GND
tZL Y/Z 0 (Note 9) 0/1 VCC
tZH(SHDN) Y/Z 1 (Note 12) 1/0 GND
tZL(SHDN) Y/Z 1 (Note 12) 0/1 VCC
SIGNAL
GENERATOR
1kΩ
50pF
OUT (Y, Z)
VCC
0V
50%50%
VOH
0V
VOH - 0.25V
tHZ
OUT (Y, Z)
VCC
VOL
VOL + 0.25V
tLZ
DE
OUTPUT HIGH
OUTPUT LOW
tZL, tZL(SHDN)
tZH, tZH(SHDN)
50%
50%
NOTE 11
NOTE 11
NOTE 11
ISL32600E, ISL32601E, ISL32602E, ISL32603E
11 FN7967.0
June 22, 2012
Application Information
RS-485 and RS-422 are differential (balanced) data
transmission standards for use in long haul or noisy
environments. RS-422 is a subset of RS-485, so RS-485
transceivers are also RS-422 compliant. RS-422 is a
point-to-multipoint (multidrop) standard, which allows only one
driver and up to 10 (assuming one unit load devices) receivers
on each bus. RS-485 is a true multipoint standard, which
allows up to 32 one-unit load devices (any combination of
drivers and receivers) on each bus. To allow for multipoint
operation, the RS-485 spec requires that drivers must handle
bus contention without sustaining any damage.
Another important advantage of RS-485 is the extended
common mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
-7V to +12V. RS-422 and RS-485 are intended for runs as long
as 4000’, so the wide CMR is necessary to handle ground
potential differences, as well as voltages induced in the cable
by external fields.
Receiver Features
These devices utilize a differential input receiver for maximum
noise immunity and common mode rejection. Input sensitivity is
better than ±200mV, as required by the RS-422 and RS-485
specifications. The symmetrical ±200mV switching thresholds
FIGURE 6A. TEST CIRCUIT FIGURE 6B. MEASUREMENT POINTS
FIGURE 6. DRIVER DATA RATE
FIGURE 7A. TEST CIRCUIT FIGURE 7B. MEASUREMENT POINTS
FIGURE 7. RECEIVER PROPAGATION DELAY AND DATA RATE
FIGURE 8A. TEST CIRCUIT FIGURE 8B. MEASUREMENT POINTS
FIGURE 8. RECEIVER ENABLE AND DISABLE TIMES
Test Circuits and Waveforms (Continued)
D
DE
DI
VCC
SIGNAL
GENERATOR
Z
Y
50pF VOD
-
+
RDIFF
VCC
0V
DIFF OUT (Y - Z) +VOD
-VOD
DI
0V
SIGNAL
GENERATOR
RRO
RE
A
B
GND
15pF
RO
+1V
-1V
tPLH
0V0V
VCC
0V
50% 50%
tPHL
A
1kΩVCC
GND
SW
PARAMETER DE A SW
tHZ X +1.5V GND
tLZ X -1.5V VCC
tZH (Note 10) 0 +1.5V GND
tZL (Note 10) 0 -1.5V VCC
tZH(SHDN) (Note 13) 0 +1.5V GND
tZL(SHDN) (Note 11) 0 -1.5V VCC
SIGNAL
GENERATOR
RRO
RE
A
B
GND
15pF
RO
VCC
0V
50%50%
VOH
0V
1.5V
VOH - 0.25V
tHZ
RO
VCC
VOL
1.5V
VOL + 0.25V
tLZ
RE
OUTPUT HIGH
OUTPUT LOW
tZL, tZL(SHDN)
tZH, tZH(SHDN)
NOTE 11
NOTE 11
NOTE 11
ISL32600E, ISL32601E, ISL32602E, ISL32603E
12 FN7967.0
June 22, 2012
eliminate the duty cycle distortion that occurs on receivers with
full fail safe (FFS) functionality and with slowly transitioning
input signals (see Figure 9). FFS receiver switching points have a
negative offset, so the RO high time is naturally longer than the
low time. The ISL3260XE’s larger receiver input sensitivity range
enables an increase of the receiver input hysteresis. The 40mV
to 65mV receiver hysteresis increases the noise immunity,
which is a big advantage for noisy networks, or networks with
slow bus transitions.
Receiver input resistance of 96kΩ surpasses the RS-422 spec
of 4kΩ and is eight times the RS-485 “Unit Load (UL)”
requirement of 12kΩ minimum. Thus, these products are
known as “one-eighth UL” transceivers and there can be up to
256 of these devices on a network while still complying with
the RS-485 loading specification.
Receiver inputs function with common mode voltages as great
as +9V/-7V outside the power supplies (i.e., +12V and -7V) at
VCC = 3V, making them ideal for long networks where induced
voltages and ground potential differences are realistic concerns.
The positive CMR is limited to +2V when the ISL32602E or
ISL32603E is operated with VCC = 1.8V.
All the receivers include a “Fail-Safe if open” function that
guarantees a high level receiver output if the receiver inputs
are unconnected (floating). Because the Rx is not full failsafe,
terminated networks may require bus biasing resistors (pull-up
on noninverting input, pull-down on inverting input) to preserve
the bus idle state when the bus is not actively driven.
Receivers operate at data rates from 128kbps to 460kbps -
depending on the supply voltage - and all receiver outputs are
tri-statable via the active low RE input. There are no parasitic
nor ESD diodes to VCC on the RE input, so it is tolerant of input
voltages up to 5.5V, even with the ISL3260XE powered down
(i.e., VCC = 0V).
Driver Features
These drivers are differential output devices that deliver at
least 1.4V with VCC ≥ 3V across a 54Ω load (RS-485) and at
least 1.95V with VCC ≥ 3.15V across a 100Ω load (RS-422).
The 1.8V transmitters deliver a 1.1V unloaded, differential
level. Drivers operate at data rates from 128kbps to 460kbps -
depending on the supply voltage - and they feature low
propagation delay skews to maximize bit width. Driver outputs
are slew rate limited to minimize EMI and to reduce reflections
in unterminated or improperly terminated networks.
All drivers are tri-statable via the active high DE input. There
are no parasitic nor ESD diodes to VCC on the DI and DE inputs,
so these inputs are tolerant of input voltages up to 5.5V, even
with the ISL3260XE powered down (i.e., VCC = 0V).
1.8V Operation
The ISL32602E and ISL32603E are specifically designed to
operate with supply voltages as low as 1.8V. Termination
resistors should be avoided at this operating condition, and the
unterminated driver is guaranteed to deliver a healthy 1.1V
differential output voltage. This low supply voltage limits the
+CMR to +2V, but the CMR increases as VCC increases.
To get good 1.8V operation, the ISL32602E and ISL32603E
have to run at a higher operating current. Thus, their ICC with
VCC = 3.3V is considerably higher than the ICC of the
ISL32600E and ISL32601E, which are optimized for low ICC at
3.3V (see Figures 1 and 2).
Hot Plug Function
When a piece of equipment powers up, there is a period of
time where the processor or ASIC driving the RS-485 control
lines (DE, RE) is unable to ensure that the RS-485 Tx and Rx
outputs are kept disabled. If the equipment is connected to the
bus, a driver activating prematurely during power up may
crash the bus. To avoid this scenario, the ISL3260XE devices
incorporate a “Hot Plug” function. During power up, circuitry
monitoring VCC ensures that the Tx and Rx outputs remain
disabled for a period of time, regardless of the state of DE and RE.
This gives the processor/ASIC a chance to stabilize and drive the
RS-485 control lines to the proper states.
ESD Protection
All pins on these devices include class 3 (>8kV) Human Body
Model (HBM) ESD protection structures, but the RS-485 pins
(driver outputs and receiver inputs) incorporate advanced
structures allowing them to survive ESD events in excess of
±15kV HBM and ±15kV IEC61000. The RS-485 pins are
particularly vulnerable to ESD damage because they typically
connect to an exposed port on the exterior of the finished
product. Simply touching the port pins, or connecting a cable,
can cause an ESD event that might destroy unprotected ICs.
These new ESD structures protect the device whether or not it
is powered up, and without degrading the transceiver’s
common mode range. This built-in ESD protection eliminates
the need for board level protection structures (e.g., transient
suppression diodes), and the associated, undesirable
capacitive load they present.
FIGURE 9. COMPARED WITH A FULL-FAILSAFE ISL3172E
RECEIVER, THE SYMMETRICAL RX THRESHOLDS OF
THE ISL3260XE DELIVER LESS OUTPUT DUTY CYCLE
DISTORTION WHEN DRIVEN WITH SLOW INPUT
SIGNALS
TIME (4µs/DIV)
RECEIVER INPUT (V)
RECEIVER OUTPUT (V)
0
4
-1
0
1
0
4
VCC = 3.3V, DATA RATE = 125kbps
ISL3260XE
ISL3172E
A-B
ISL32600E, ISL32601E, ISL32602E, ISL32603E
13 FN7967.0
June 22, 2012
IEC61000-4-2 Testing
The IEC61000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely
to suffer an ESD event are those that are exposed to the
outside world (the RS-485 pins in this case), and the IC is
tested in its typical application configuration (power applied)
rather than testing each pin-to-pin combination. The lower
current limiting resistor coupled with the larger charge storage
capacitor yields a test that is much more severe than the HBM
test. The extra ESD protection built into this device’s RS-485
pins allows the design of equipment meeting level 4 criteria
without the need for additional board level protection on the
RS-485 port.
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward the IC
pin until the voltage arcs to it. The current waveform delivered
to the IC pin depends on approach speed, humidity,
temperature, etc. so it is difficult to obtain repeatable results.
The ISL3260XE RS-485 pins withstand ±15kV air-gap
discharges.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages
higher than ±8kV. The ISL3260XE survive ±8kV contact
discharges on the RS-485 pins.
Data Rate, Cables, and Terminations
RS-485/422 are intended for network lengths up to 4000’
(1220m), but the maximum system data rate decreases as the
transmission length increases. The ISL32600E and ISL32601E
operate at data rates up to 128kbps at the maximum (4000’)
distance, or at data rates of 256kbps for cable lengths less
than 3000’ (915m). The ISL32602E and ISL32603E, with
VCC = 1.8V, are limited to 1000’ (305m) at 256kbps, or 2000’
(610m) at 128kbps. With VCC = 3.3V, the ISL32602E and
ISL32603E deliver 460kbps over 2000’, 256kbps over 3000’,
or 128kbps over 4000’ cables.
Twisted pair is the cable of choice for RS-485/422 networks.
Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common mode
signals, which are effectively rejected by the differential
receivers in these ICs.
Short networks using these transceivers need not be
terminated, but terminations are recommended for 2.7V to
3.6V powered networks unless power dissipation is an
overriding concern. Terminations are not recommended for
1.8V applications, due to the low drive available from those
transmitters.
In point-to-point, or point-to-multipoint (single driver on bus)
networks, the main cable should be terminated in its
characteristic impedance (typically 120Ω) at the end farthest
from the driver. In multi-receiver applications, stubs
connecting receivers to the main cable should be kept as short
as possible. Multipoint (multi-driver) systems require that the
main cable be terminated in its characteristic impedance at
both ends. Stubs connecting a transceiver to the main cable
should be kept as short as possible.
Terminated networks using the ISL3260XE may require bus
biasing resistors (pull-up on noninverting input, pull-down on
inverting input) to preserve the bus idle state when the bus is
not actively driven. Without bus biasing, the termination
resistor collapses the undriven, differential bus voltage to 0V,
which is an undefined level to the ISL3260XE Rx. Bus biasing
forces a few hundred milli-volt positive differential voltage on
the undriven bus, which all RS-485/422 Rx interpret as a valid
logic high.
Built-In Driver Overload Protection
As stated previously, the RS-485 spec requires that drivers
survive worst case bus contentions undamaged. These devices
meet this requirement via driver output short circuit current
limits, and on-chip thermal shutdown circuitry.
The driver output stages incorporate short circuit current
limiting circuitry that ensures that the output current never
exceeds the RS-485 spec, even at the common mode voltage
range extremes. Additionally, these devices utilize a foldback
circuit which reduces the short circuit current, and thus the
power dissipation, whenever the contending voltage exceeds
either supply.
In the event of a major short circuit condition, these ICs also
include a thermal shutdown feature that disables the drivers
whenever the die temperature becomes excessive. This
eliminates the power dissipation, allowing the die to cool. The
drivers automatically re-enable after the die temperature
drops by about 20°C. If the condition persists, the thermal
shutdown / re-enable cycle repeats until the fault is cleared.
Receivers remain operational during thermal shutdown.
Low Power Shutdown Mode
These micro-power transceivers all use a fraction of the power
required by their counterparts, but they also include a
shutdown feature that reduces the already low quiescent ICC to
a 10nA trickle. These devices enter shutdown whenever the
receiver and driver are simultaneously disabled (RE =V
CC and
DE = GND) for a period of at least 600ns (1200ns at
VCC = 1.8V). Disabling both the driver and the receiver for less
than 50ns guarantees that the transceiver will not enter
shutdown.
Note that most receiver and driver enable times increase when
the transceiver enables from shutdown. Refer to Notes 9 through
13, at the end of the “Electrical Specification table” on page 7, for
more information.
ISL32600E, ISL32601E, ISL32602E, ISL32603E
14 FN7967.0
June 22, 2012
Typical Performance Curves VCC = 3V (ISL32600E, ISL32601E) or 1.8V (ISL32602E, ISL32603E), TA = +25°C; Unless Otherwise
Specified
FIGURE 10. ISL32600E, ISL32601E DRIVER DIFFERENTIAL
OUTPUT VOLTAGE vs TEMPERATURE
FIGURE 11. ISL32600E, ISL32601E RECEIVER OUTPUT CURRENT
vs RECEIVER OUTPUT VOLTAGE
FIGURE 12. ISL32600E, ISL32601E STATIC SUPPLY CURRENT vs
TEMPERATURE
FIGURE 13. ISL32600E, ISL32601E DYNAMIC SUPPLY CURRENT
vs SUPPLY VOLTAGE AT DIFFERENT DATA RATES
FIGURE 14. ISL32600E, ISL32601E PERFORMANCE WITH
VCC = 3V, 256kbps, 3000’ (915m) CAT 5 CABLE
FIGURE 15. ISL32600E, ISL32601E PERFORMANCE WITH
VCC = 2.7V, 128kbps, 4000’ (1220m) CAT 5 CABLE
TEMPERATURE (°C)
DIFFERENTIAL OUTPUT VOLTAGE (V)
1.5
1.7
1.9
2.1
2.3
2.5
2.7
2.9
-40 -25 -10 5 20 35 50 65 80 95 110 125
RDIFF = 10kΩ
RDIFF = 54Ω
RDIFF = 100Ω
RECEIVER OUTPUT VOLTAGE (V)
RECEIVER OUTPUT CURRENT (mA)
-20
-15
-10
-5
0
5
10
15
20
25
30
0 0.5 1.0 1.5 2.0 2.5 3.0
VOH, +25°C
VOL, +125°C
VOH, +125°C
VOL, +25°C
VOL, +85°C
VOH, +85°C
TEMPERATURE (°C)
ICC (µA)
25
30
35
40
45
50
55
60
65
70
-40 -25 -10 5 20 35 50 65 80 95 110 125
RE = 0V
DE = VCC
DE = 0V
VCC = 2.7V
VCC = 3.0V
VCC = 3.3V
VCC = 2.7V
VCC = 3.0V
VCC = 3.3V
VCC (V)
ICC (A)
2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6
100µ
1m
10m
RD = ∞, CD = 50pF
128kbps
9.6kbps
256kbps
DE = VCC, RE = 0V
Tx AND Rx BOTH
SWITCHING
TIME (10µs/DIV)
RECEIVER INPUTS (V)
RECEIVER OUTPUT (V)
-2
0
1
2
3
0
3
2
0
DRIVER INPUT (V)
RD = ∞
A-B
DI
-1
3
1
TIME (20µs/DIV)
RECEIVER INPUTS (V)
RECEIVER OUTPUT (V)
-2
0
1
2
3
0
3
2
0
DRIVER INPUT (V)
RD = ∞
A-B
DI
-1
3
1
ISL32600E, ISL32601E, ISL32602E, ISL32603E
15 FN7967.0
June 22, 2012
FIGURE 16. ISL32600E, ISL32601E DRIVER DIFFERENTIAL
PROPAGATION DELAY vs TEMPERATURE FIGURE 17. ISL32600E, ISL32601E DRIVER DIFFERENTIAL SKEW
vs TEMPERATURE
FIGURE 18. ISL32600E, ISL32601E RECEIVER PROPAGATION
DELAY vs TEMPERATURE
FIGURE 19. ISL32600E, ISL32601E RECEIVER SKEW vs
TEMPERATURE
FIGURE 20. ISL32600E, ISL32601E DRIVER AND RECEIVER
WAVEFORMS, LOW TO HIGH
FIGURE 21. ISL32600E, ISL32601E DRIVER AND RECEIVER
WAVEFORMS, HIGH TO LOW
Typical Performance Curves VCC = 3V (ISL32600E, ISL32601E) or 1.8V (ISL32602E, ISL32603E), TA = +25°C; Unless Otherwise
Specified (Continued)
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
330
340
350
360
370
380
390
400
-40 -25 -10 5 20 35 50 65 80 95 110 125
tDDHL
RD = 54Ω, CD = 50pF
tDDLH
TEMPERATURE (°C)
SKEW (ns)
0
0.5
1.0
1.5
2.0
2.5
3.0
-40 -25 -10 5 20 35 50 65 80 95 110 125
tSKEW = |tDDLH - tDDHL|
RD = 54Ω, CD = 50pF
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
-40 -25 -10 5 20 35 50 65 80 95 110 125
600
650
700
750
800
850
900
950
1000
tPLH
tPHL
TEMPERATURE (°C)
SKEW (ns)
110
112
114
116
118
120
122
124
126
128
130
-40 -25 -10 5 20 35 50 65 80 95 110 125
tSKEW = |tPLH - tPHL|
TIME (200ns/DIV)
RECEIVER OUTPUT (V)
RDIFF = 54Ω, CD = 50pF
0
3
DRIVER OUTPUT (V)
0
3
DRIVER INPUT (V)
DI
RO
-2
-1
1
2
A/Y - B/Z
0
TIME (200ns/DIV)
RECEIVER OUTPUT (V)
RDIFF = 54Ω, CD = 50pF
0
3
DRIVER OUTPUT (V)
0
3
DRIVER INPUT (V)
DI
RO
-2
-1
1
2
A/Y - B/Z
0
ISL32600E, ISL32601E, ISL32602E, ISL32603E
16 FN7967.0
June 22, 2012
FIGURE 22. ISL32600E, ISL32601E DRIVER OUTPUT CURRENT
vs SHORT CIRCUIT VOLTAGE
FIGURE 23. ISL32602E, ISL32603E DRIVER OUTPUT CURRENT
vs SHORT CIRCUIT VOLTAGE
FIGURE 24. ISL32602E, ISL32603E DRIVER DIFFERENTIAL
OUTPUT VOLTAGE vs TEMPERATURE
FIGURE 25. ISL32602E, ISL32603E RECEIVER OUTPUT CURRENT
vs RECEIVER OUTPUT VOLTAGE
FIGURE 26. ISL32602E, ISL32603E STATIC SUPPLY CURRENT vs
TEMPERATURE
FIGURE 27. ISL32602E, ISL32603E DYNAMIC SUPPLY CURRENT
vs SUPPLY VOLTAGE AT DIFFERENT DATA RATES
Typical Performance Curves VCC = 3V (ISL32600E, ISL32601E) or 1.8V (ISL32602E, ISL32603E), TA = +25°C; Unless Otherwise
Specified (Continued)
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
-150
-100
-50
0
50
100
150
200
-7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12
Y OR Z = HIGH
Y OR Z = LOW
+25°C
+125°C
-40°C
+125°C
+25°C
-40°C
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
-40
-20
0
20
40
60
80
100
120
140
-7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12
Y OR Z = HIGH
Y OR Z = LOW
+25°C
+125°C
-40°C
+125°C
-40°C
+25°C
-40°C
TEMPERATURE (°C)
DIFFERENTIAL OUTPUT VOLTAGE (V)
0.7
0.9
1.1
1.3
1.5
1.7
1.9
2.1
2.3
2.5
-40 -25 -10 5 20 35 50 65 80 95 110 125
VCC = 3.3V, RDIFF = 54Ω
VCC = 1.8V, RDIFF = 10kΩ
VCC = 1.8V, RDIFF = 100Ω
VCC = 3.3V, RDIFF = 100Ω
RECEIVER OUTPUT VOLTAGE (V)
RECEIVER OUTPUT CURRENT (mA)
-30
-20
-10
0
10
20
30
0 0.5 1.0 1.5 2.0 2.5 3.0 3.3
VOH, +25°C
VOL, +25°C
VOL, +125°C
VOH, +125°C
VCC = 3.3V
VCC = 1.8V
VCC = 3.3V
VOL, +25°C
VOL, +85°C
VOL, +125°C
VOH, +85°C
VOL, +85°C
VOH, +25°C, +85°C, +125°C
TEMPERATURE (°C)
ICC (µA)
60
80
100
120
140
160
180
-40 -25 -10 5 20 35 50 65 80 95 110 125
RE = 0V
VCC = 1.8V, DE = VCC
VCC = 3.3V, DE = VCC
VCC = 1.8V, DE = 0V
VCC = 3.3V, DE = 0V
VCC (V)
ICC (A)
10µ
100µ
1m
10m
1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6
100m
RD = ∞, CD = 50pF
9.6kbps
460kbps
DE = VCC, RE = 0V
Tx AND Rx BOTH
SWITCHING
STATIC
128kbps
256kbps
ISL32600E, ISL32601E, ISL32602E, ISL32603E
17 FN7967.0
June 22, 2012
FIGURE 28. ISL32602E, ISL32603E PERFORMANCE WITH
VCC = 1.8V, 256kbps, 1000’ (305m) CAT 5 CABLE
FIGURE 29. ISL32602E, ISL32603E PERFORMANCE WITH
VCC = 3.3V, 460kbps, 2000’ (610m) CAT 5 CABLE
FIGURE 30. ISL32602E, ISL32603E DRIVER DIFFERENTIAL
PROPAGATION DELAY vs TEMPERATURE
FIGURE 31. ISL32602E, ISL32603E DRIVER DIFFERENTIAL SKEW
vs TEMPERATURE
FIGURE 32. ISL32602E, ISL32603E RECEIVER PROPAGATION
DELAY vs TEMPERATURE
FIGURE 33. ISL32602E, ISL32603E RECEIVER SKEW vs
TEMPERATURE
Typical Performance Curves VCC = 3V (ISL32600E, ISL32601E) or 1.8V (ISL32602E, ISL32603E), TA = +25°C; Unless Otherwise
Specified (Continued)
TIME (10µs/DIV)
RECEIVER INPUTS (V)
RECEIVER OUTPUT (V)
-1.5
0
1.0
1.5
2
0
DRIVER INPUT (V)
RD = ∞
A-B
DI
-1.0
2.0
0
0.5
1.0
1.5
2.0
-0.5
0.5
TIME (10µs/DIV)
RECEIVER INPUTS (V)
RECEIVER OUTPUT (V)
-3
0
1
2
3
0
3
2
0
DRIVER INPUT (V)
RD = ∞
A-B
DI
-2
4
1
4
-1
3
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
300
400
500
600
700
800
900
1000
1100
1200
-40 -25 -10 5 20 35 50 65 80 95 110 125
VCC = 3.3V, RD = 54Ω
tDDHL
CD = 50pF
tDDHL
VCC = 1.8V, RD = ∞
tDDLH
tDDLH
TEMPERATURE (°C)
SKEW (ns)
0
20
40
60
80
100
120
-40 -25 -10 5 20 35 50 65 80 95 110 125
VCC = 3.3V, RD = 54Ω
VCC = 1.8V, RD = ∞
CD = 50pF tSKEW = |tDDLH - tDDHL|
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
100
120
140
160
180
200
220
240
260
280
300
-40 -25 -10 5 20 35 50 65 80 95 110 125
VCC = 3.3V, tPLH
VCC = 3.3V, tPHL
VCC = 1.8V, tPLH
VCC = 1.8V, tPHL
TEMPERATURE (°C)
SKEW (ns)
0
20
40
60
80
100
120
140
-40 -25 -10 5 20 35 50 65 80 95 110 125
VCC = 3.3V
VCC = 1.8V
tSKEW = |tPLH - tPHL|
ISL32600E, ISL32601E, ISL32602E, ISL32603E
18 FN7967.0
June 22, 2012
FIGURE 34. ISL32602E, ISL32603E DRIVER AND RECEIVER
WAVEFORMS, LOW TO HIGH
FIGURE 35. ISL32602E, ISL32603E DRIVER AND RECEIVER
WAVEFORMS, HIGH TO LOW
FIGURE 36. ISL32602E, ISL32603E DRIVER AND RECEIVER
WAVEFORMS, LOW TO HIGH
FIGURE 37. ISL32602E, ISL32603E DRIVER AND RECEIVER
WAVEFORMS, HIGH TO LOW
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
PROCESS:
Si Gate BiCMOS
Typical Performance Curves VCC = 3V (ISL32600E, ISL32601E) or 1.8V (ISL32602E, ISL32603E), TA = +25°C; Unless Otherwise
Specified (Continued)
TIME (1µs/DIV)
RECEIVER OUTPUT (V)
RDIFF = 10kΩ, CD = 50pF
0
2
DRIVER OUTPUT (V)
0
2
DRIVER INPUT (V)
DI
RO
-1.5
-1.0
-0.5
0
0.5
1.0
1.5
A/Y - B/Z
VCC = 1.8V
TIME (1µs/DIV)
RECEIVER OUTPUT (V)
RDIFF = 10kΩ, CD = 50pF
0
2
DRIVER OUTPUT (V)
0
2
DRIVER INPUT (V)
DI
RO
-1.5
-1.0
-0.5
0
0.5
1.0
1.5
A/Y - B/Z
VCC = 1.8V
TIME (200ns/DIV)
RECEIVER OUTPUT (V)
RDIFF = 54Ω, CD = 50pF
0
3
DRIVER OUTPUT (V)
0
3
DRIVER INPUT (V)
DI
RO
-3
-2
-1
0
1
2
3
A/Y - B/Z
VCC = 3.3V
TIME (200ns/DIV)
RECEIVER OUTPUT (V)
RDIFF = 54Ω, CD = 50pF
0
3
DRIVER OUTPUT (V)
0
3
DRIVER INPUT (V)
DI
RO
-3
-2
-1
0
1
2
3
A/Y - B/Z
VCC = 3.3V
ISL32600E, ISL32601E, ISL32602E, ISL32603E
19
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7967.0
June 22, 2012
For additional products, see www.intersil.com/product_tree
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products
address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks.
Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a
complete list of Intersil product families.
For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on
intersil.com: ISL32600E, ISL32601E, ISL32602E, ISL32603E
To report errors or suggestions for this data sheet, please go to: www.intersil.com/askourstaff
FITs are available from our website at: http://rel.intersil.com/reports/search.php
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest revision.
DATE REVISION CHANGE
June 22, 2012 FN7967.0 Initial Release.
ISL32600E, ISL32601E, ISL32602E, ISL32603E
20 FN7967.0
June 22, 2012
Package Outline Drawing
M8.118
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 7/11
DETAIL "X"
SIDE VIEW 2
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
PIN# 1 ID
0.25 - 0.36
DETAIL "X"
0.10 ± 0.05
(4.40)
(3.00)
(5.80)
H
C
1.10 MAX
0.09 - 0.20
3°±3°
GAUGE
PLANE 0.25
0.95 REF
0.55 ± 0.15
B
0.08 C A-B D
3.0±0.05
12
8
0.85±010
SEATING PLANE
A
0.65 BSC
3.0±0.05 4.9±0.15
(0.40)
(1.40)
(0.65)
D
5
5
SIDE VIEW 1
Dimensioning and tolerancing conform to JEDEC MO-187-AA
Plastic interlead protrusions of 0.15mm max per side are not
Dimensions in ( ) are for reference only.
Dimensions are measured at Datum Plane "H".
Plastic or metal protrusions of 0.15mm max per side are not
Dimensions are in millimeters.
3.
4.
5.
6.
NOTES:
1.
2.
and AMSEY14.5m-1994.
included.
included.
0.10 C
M
ISL32600E, ISL32601E, ISL32602E, ISL32603E
21 FN7967.0
June 22, 2012
Package Outline Drawing
M8.15
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 1/12
DETAIL "A"
TOP VIEW
INDEX
AREA
123
-C-
SEATING PLANE
x 45°
NOTES:
1. Dimensioning and tolerancing per ANSI Y14.5M-1994.
2. Package length does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
3. Package width does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
4. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
5. Terminal numbers are shown for reference only.
6. The lead width as measured 0.36mm (0.014 inch) or greater above the
seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
7. Controlling dimension: MILLIMETER. Converted inch dimensions are not
necessarily exact.
8. This outline conforms to JEDEC publication MS-012-AA ISSUE C.
SIDE VIEW “A
SIDE VIEW “B”
1.27 (0.050)
6.20 (0.244)
5.80 (0.228)
4.00 (0.157)
3.80 (0.150)
0.50 (0.20)
0.25 (0.01)
5.00 (0.197)
4.80 (0.189)
1.75 (0.069)
1.35 (0.053)
0.25(0.010)
0.10(0.004)
0.51(0.020)
0.33(0.013)
8°
0°
0.25 (0.010)
0.19 (0.008)
1.27 (0.050)
0.40 (0.016)
1.27 (0.050)
5.20(0.205)
1
2
3
45
6
7
8
TYPICAL RECOMMENDED LAND PATTERN
2.20 (0.087)
0.60 (0.023)
ISL32600E, ISL32601E, ISL32602E, ISL32603E
22 FN7967.0
June 22, 2012
Package Outline Drawing
M10.118
10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
Rev 1, 4/12
DETAIL "X"
SIDE VIEW 2
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
PIN# 1 ID
0.18 - 0.27
DETAIL "X"
0.10 ± 0.05
(4.40)
(3.00)
(5.80)
H
C
1.10 MAX
0.09 - 0.20
3°±3°
GAUGE
PLANE 0.25
0.95 REF
0.55 ± 0.15
B
0.08 C A-B D
3.0±0.05
12
10
0.85±010
SEATING PLANE
A
0.50 BSC
3.0±0.05 4.9±0.15
(0.29)
(1.40)
(0.50)
D
5
5
SIDE VIEW 1
Dimensioning and tolerancing conform to JEDEC MO-187-BA
Plastic interlead protrusions of 0.15mm max per side are not
Dimensions in ( ) are for reference only.
Dimensions are measured at Datum Plane "H".
Plastic or metal protrusions of 0.15mm max per side are not
Dimensions are in millimeters.
3.
4.
5.
6.
NOTES:
1.
2.
and AMSEY14.5m-1994.
included.
included.
0.10 C
M
ISL32600E, ISL32601E, ISL32602E, ISL32603E
23 FN7967.0
June 22, 2012
Package Outline Drawing
M14.15
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 1, 10/09
A
D
4
0.25 A-BMC
C
0.10 C
5B
D
3
0.10 A-BC
4
0.20 C 2X
2X
0.10 DC 2X
H
0.10 C
6
36
ID MARK
PIN NO.1 (0.35) x 45°
SEATING PLANE
GAUGE PLANE
0.25
(5.40)
(1.50)
1.27
0.31-0.51
4° ± 4°
DETAIL"A" 0.22±0.03
0.10-0.25
1.25 MIN
1.75 MAX
(1.27) (0.6)
6.0
8.65
3.9
7
14 8
Dimensioning and tolerancing conform to AMSEY14.5m-1994.
Dimension does not include interlead flash or protrusions.
Dimensions in ( ) for Reference Only.
Interlead flash or protrusions shall not exceed 0.25mm per side.
Datums A and B to be determined at Datum H.
4.
5.
3.
2.
Dimensions are in millimeters.
NOTES:
1.
The pin #1 identifier may be either a mold or mark feature.
6. Does not include dambar protrusion. Allowable dambar protrusion
7. Reference to JEDEC MS-012-AB.
shall be 0.10mm total in excess of lead width at maximum condition.
DETAIL "A"
SIDE VIEW
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Intersil:
ISL32600EFBZ-T7A ISL32600EFUZ-T7A ISL32601EFBZ-T7A ISL32601EFBZ-T ISL32602EFUZ-T7A
ISL32602EFBZ-T7A ISL32602EFBZ-T ISL32601EFBZ ISL32603EFUZ-T7A ISL32600EFUZ ISL32603EFBZ-T7A
ISL32603EFUZ ISL32601EFUZ-T7A ISL32600EFBZ-T ISL32603EFUZ-T ISL32603EFBZ ISL32602EFUZ
ISL32600EFUZ-T ISL32602EFUZ-T ISL32600EFBZ ISL32601EFUZ-T ISL32602EFBZ ISL32603EFBZ-T
ISL32601EFUZ
