UBA20270T/N1 - NXP - Datasheet.Directory

1. General description

The UBA20270 is a high-voltage power IC intended to control higher powered self

ballasted Compact Fluorescent Lamp (CFL) lighting applications. The UBA20270 is a

controller circuit with advanced features for dimming and has a lamp current controlled

boost feature for boosting cold (amalgam) CFLs.

The controller contains a half-bridge drive function for CFL, a high-voltage level-shift

circuit with integrated bootstrap diode. In addition, the controller contains an oscillator

function, a current control function both for preheat and burn, a timer function and

protection circuits. The UBA20270 is supplied via a dV/dt current charge supply circuit

from the half-bridge circuit.

Remark: Mains voltages noted are AC.

2. Features and benefits

2.1 Half-bridge features

Integrated high-voltage level-shift function with integrated bootstrap diode

2.2 Preheat and ignition features

Coil saturation protection during ignition

Adjustable preheat time

Adjustable preheat curr en t

Ignition lamp current detection

2.3 Lamp boost features

Adjustable boost timing

Fixed boost current ratio of 1.5

Gradually boost to burn transition timing

2.4 Dim features

Continuously variable dimming function for standard phase cut dimmers

Natural dimming curve by logarithmic correction

Adjustable Minimum Dimm in g Le vel (MD L)

Controlled lamp ON/OFF

UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

Rev. 2 — 8 September 2011 Product data sheet

Product data sheet Rev. 2 — 8 September 2011 2 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

2.5 Protection

OverCurrent Protection (OCP) in boost and burn state

Capacitive Mode Protection (CMP)

OverPower Protection (OPP)

Power-down function

OverTemperature Protection (OTP)

2.6 Other features

Current controlled operating in boost and burn state

External power- down function

Lamp flicker suppression

3. Applications

Dimmable compact fluorescent lamps for power levels above 20 W and for universal

mains voltages.

4. Ordering information

Table 1. Ordering information

Type number Package

Name Description Version

UBA20270T/N1 SO16 Plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx

xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx

xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx

xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x

Product data sheet Rev. 2 — 8 September 2011 3 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

5. Block diagram

Fig 1. Block diagram

LEVEL SHIFT

BOOTSTRAP FS

LOGIC

Vph(SLS)

25 μA

Vth(det)ign(CSI)

LOGIC

PGND

DIMMER

CONTROL

DCI

LEVEL

SHIFTER

driver

SLS

REFERENCE

CURRENT

1.27 V

RREF CF CI CSI

FREQUENCY

CONTROL

LOGIC

DSR

OTA

LAMP

CURRENT

SENSOR

BOOST

AMPLIFIER

BOOST ENABLE

IGNITION CURRENT DETECTOR

START ENABLE

VOLTAGE

CONTROLLED OSCILLATOR

VCO

TEMPERATURE

SENSOR

160° 120° 80°

DIVIDE BY 2

LOGIC

DRIVER

LOGIC

VDD

SUPPLY

5 V DIGITAL

REFERENCE

VOLTAGES

5 V

1 μA 6 μA

LOGIC COUNTER

PREHEAT/

BOOST TIMER

VS LOW

RESET

60 μA

Vclamp

(CSI)

SGND

Vth(capm)SLS

Vth(ocp)SLS

001aam663

MDL

Votp(CSI)

VLD

Vth(bst)

(DCI)

Vth(start)

(DCI)

VT(hec1)

DCI

GHS16

79865

HBO15

GLS2

RESET STATE

START-UP STATE

PREHEAT STATE

IGNITION STATE

HOLD STATE

BOOST STATE

BURN STATE

POWER-DOWN STATE

STATE LOGIC

5 V ANALOG

INDUCTOR SATURATION/

OVERCURRENT DETECTOR

PREHEAT CURRENT SENSOR

CAPACITIVE MODE DETECTOR

Product data sheet Rev. 2 — 8 September 2011 4 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

6. Pinning information

6.1 Pinning

6.2 Pin description

Fig 2. Pin confi gura tio n (SO1 6 )

UBA20270

SLS GHS

GLS HBO

PGND FS

VDD SGND

RREF CB

CF CP

MDL DCI

CI CSI

001aam664

Tabl e 2. Pin description

Symbol Pin Description

SLS 1source low-side switch input

GLS 2low-side gate driver output

PGND 3power ground

VDD 4low voltage supply

RREF 5internal reference current input

CF 6voltage controlled oscillator capacitor

MDL 7minimum dimming level input

CI 8voltage controlled oscillator input integrating capacitor

CSI 9current feedback sense input

DCI 10 dimming level input

CP 11 preheat timing capacitor

CB 12 boost timing capacitor

SGND 13 signal ground

FS 14 floating supply voltage

HBO 15 half-bridge output

GHS 16 high-side gate driver outp ut

Product data sheet Rev. 2 — 8 September 2011 5 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

7. Functional description

The UBA20270 is an IC for driving external half-bridge MOSFETs in self ballasted

high-power CFL and their de rivatives. T he U BA20 270 is equ ipp ed with a dimm ing co ntrol

input that has a logarithmic corrected natural dimming fu nct ion . Th is fu nct i on enab l es a

less sensitive brightness control of the lamp at low dim levels.

The UBA20270 is rated up to a maximum continuous rectified mains voltage of 500 V

(peak 600 V). The UBA20270 includes all the necessary functions for preheat, ignition,

boost, and on-state operation of the lamp. In addition, the UBA20270 includes several

protection measures that safeguard the functioning of the CFL and controller. The

controller states are shown in Figure 3.

(1) VDD > VDD(start) AND Vi(DCI) > Vth(start)DCI AND (HOLD = 0 OR VCP < Vth(rel)CP)

(2) VDD < VDD(stop) OR Vi(DCI) < Vth(start)DCI  Vth(hys)DCI

(3) (End of ignition time AND HOLD = 0) OR VDD < VDD(stop) OR Vi(DCI) < Vth(start)DCI  Vth(hys)DCI

(4) End of ignition time AND HOLD = 1

(5) VCP < Vth(pd)CP OR overcurrent fault time > 1⁄10 tph OR fbridge(max) detected in capacitive mode

(6) VDD < VDD(stop) OR Vi(DCI) < Vth(start)DCI  Vth(hys)DCI

Fig 3. State diagram

001aam665

VDD = 0

RESET STATE

HOLD = 0

START-UP STATE

PREHEAT STATE

IGNITION STATE

HOLD STATE

HOLD = 1

POWER-DOWN STATE

BOOST AND BURN

STATES

preheat time

completed

Ignition_Detected

VDD > VDD(rst) VDD < VDD(rst)

VDD < VDD(rst)

VCP < Vth(rel)CP

(3)

(2)

(1)

(4)

(5)(6)

Product data sheet Rev. 2 — 8 September 2011 6 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

7.1 Lamp start-up cycle

7.1.1 Reset state

The UBA20270 is in a reset stat e while the supply voltage on the VDD pin is below the

VDD(rst) level. In the reset state, a part of the internal supply is turned off, all registers,

counters and timers are undefined. In addition, the hold state latch is reset and both the

applied external high and low-side transistor (Q1, Q2) are non-conductive. During

power-up, the low voltage supply capacitor on the VDD pin is charged via an external

start-up resistor. When the voltage on the VDD pi n is above the VDD(rst) level, the start-up

state is entered. The UBA20270 enters the reset state when the supply voltage on the

VDD pin drops lower th an VDD(rst).

7.1.2 Start-up state

Start-up is achieved by charging the low voltage supply capacitor on the VDD pin via an

external start-up resistor. At start-up the High-Side (HS) transistor is non-conductive and

the Low-Side (LS) is conductive to enable charging of the bootstrap capacitor. This

capacitor supplies the HS driver and level shifter circuit connected between the FS and

HBO pin. A DC reset circuit is incorporated in the ICs HS driver. This circuit ensures that

lower than the lockout voltage on the FS pin the output voltage (VGHS - VHBO) is zero.

As the start-up state is entered, the circuit only starts oscillating when the low voltage

supply (VDD) reaches the value of VDD(start) AND Vi(DCI) > Vth(start)DCI. The circuit starts

oscillating at fbridge(max).

The circuit enters the preh eat state as soon as the capacito r on the CP pin is charged to a

voltage level above Vth(CP)max. To remain oscillating, the VDD voltage must remain higher

than VDD(stop) and lower than the upper limit VDD(clamp). In addition, the typical voltage level

on the DCI pin must be higher than Vth(start)DCI  Vth(hys)DCI = 0.24 V.

An UnderVoltage LockOut (UVLO) is implemen ted on the DCI pin to create a guaranteed

turn-off for multiple lamps when the lamps are at low dim levels. The UVLO also

guarantees that there is a preheat phase when the dim level is turned up again.

The typical turn-on level on the DCI pin is set to lower than Vth(start)DCI = 0.36 V, else it

increases the turn- on hysteresis of the lamp. This level enables the UBA20270 to perform

a stable ignition of the lamp when there is already sufficient power from the dimmer at

lower dim levels.

During the start-up state, the voltage on the CF pin is at zero and the CB pin is close to

zero. The voltage on the CP pin rises to higher than Vth(CP)max level during the start-up

state. See Figure 9.

7.1.3 Preheat state

Starting at fbridge(max), the frequency decreases by charging capacitor CCI via an output

current circuit controlled by the preheat current sensor circuit. This state continues until

the momentary valu e of th e vo ltag e acro ss sens e re sist or RSLS reaches the internally

fixed preheat voltage level (SLS pin). At this level, the current of the preheat current

sensor reaches a charge and discharge balanced state on capacitor CCI to set the

frequency.

Product data sheet Rev. 2 — 8 September 2011 7 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

The preheat time consists of eight saw-toothed pulses at the CP pin. Prehe at be g ins as

soon as the capacitor on the CP pin is char ged to a voltage higher than Vth(CP)max. During

the preheat time, the current feedback sensor circuit (input CSI pin) is disabl ed. To

increase noise immunity, an internal filter of 30 ns is included at the SLS pin.

If during preheat, the level on the DCI pin drops lower than Vth(start)DCI  Vth(hys)DCI

= 0.24 V or the VDD pin drops lower than VDD(stop), the preheat state is immediately

stopped. The circuit enters the hold state delaying a new preheat cycle. A fixed voltage

drop on the preheat capacitor CCP and a fixed discharge current on the CP pin sets the

delay time.

A new preheat cycle starts after the CP pin level slowly discharges. This condition

continues until VCP < Vth(rel)CP and recharges higher than Vth(CP)max provided

VDD > VDD(start) AND Vi(DCI) > Vth(start)DCI. See Figure 5.

7.1.4 Ignition state

Directly after the preheat state has been completed, the ignition state is entered. In the

ignition state, the frequency sweeps down due to charging of the capacitor CCI on the CI

pin with an internally fixed current. See Figure 4. During this continuous decrease in

frequency, the circ uit appro a ch es th e re so na nt frequency of the resonant tank L2, C5.

This results in a high voltage across the lamp to igni te the lamp. The cu rrent sensor circuit

which monitors the voltage over resistor RCSI detects lamp ignition. See Figure 11.

If the voltage on the CSI pin is above the typical ignition detection threshold voltage level

of 0.6 V, lamp ignition is detected. The system then changes from ignition state to the

boost or burn state. If no ignition is detected, the frequency decreases further to the

minimum half-bridge frequency fbridge(min). To prevent continuous ignition attempts and

over-heating of the applicatio n due to lamp damage, the UBA20270 only attempt s to ignite

the lamp twice after powe r-up. The ignition attempt coun ter is incremente d when the lamp

ignition threshold voltage on the CSI pin is not exceeded at the end of the ignition

enabling time. If a second ignition attempt also exceeds the ignition tim e-out period, the IC

enters the power-down state. See Figure 5.

Fig 4. CFL frequency from start to burn state

boostignition burntransitionpreheat

100

(kHz)

start frequency

preheat frequency

CFL ignition

time (s)

100 %

001aam764

boost bottom ~22 kHz

A CB

Product data sheet Rev. 2 — 8 September 2011 8 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

7.1.5 Boost state and transition to burn state

When ignition is dete cted by me asuring lamp cur rent on th e CSI pin, the circuit en ters the

boost state. Figure 7 shows the boost and burn state in more detail. In the b oost state, the

nominal burn state lamp current can be increased with a fixed boost ratio of 1.5:1. This

boosts up the slow luminescence increase of a cold amalgam CFL lamp, provided

VDCI > Vth(bst)DCI. If the IC is at a temperature (T j(bp)bst) before entering the boost state, the

burn state is bypassed.

A boost timing circuit is included to determine th e boost time and transition to burn time.

The circuit consists of a clo ck generator comprising CCB, R ext(RREF) and a 64 -step counter.

When the timer is not operating, CCB is discharged to lower than the Vth(CB)min level of

1.1 V. This voltage, about 0.6 V, is still higher than the level at which the comparator on

CCB detects if the CB pin is shorted to ground.

The boost time consists of 63 saw-toothed pulses at the CB pin and automatically

followed by the transition time at the CP pin. The 32 saw-tooth pulses form the transition

time from boost to burn ena bling a smooth tr ansitio n between the cu rrent con trolled boost

and burn state. The total transition time is approximate ly four times the preheat time as

shown in Figure 6.

Fig 5. Retry cycle

001aan537

voltage

(V)

VCP

Vth(CP)max

5 V

0 V

Vth(CP)min

Vth(rel)CP

tph tph

restart

delay time

startup

time

ten(ign) ten(ign)

2nd

startup

td(restart)

discharge

to 0 V

time (s)

1st preheat

time

1st ignition

enabling time

2nd ignition

enabling time

2nd preheat

time

2nd failed

ignition

attempt

1st failed

ignition

attempt

POWER DOWN STATE

HOLD STATE

Product data sheet Rev. 2 — 8 September 2011 9 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

In the boost state, the lamp current feedback control circuit operates the same as in the

burn state. This action is used to improve lamp stability. Lamp current boosted by a fixed

ratio of 1.5 compared to the burn state, boosts up the slow luminescence increase of a

cold CFL lamp. In the boost to burn transition time there is a slow 15-step ratio decrease

from 1.5 to 1. For the transition to burn time, the preheat timer is reused and the boost

ratio is gradually decreased in 15 steps from 1.5 to 1. The steps occur within 32

saw-toothed pulses on the CP pin. The 32 saw-toothed pulses form the transition time

from boost to burn to enab le a smooth transition between the current controlled bo ost and

burn state. Given the application values of CCB and Rext(RREF) a boost time of more than

300 s is possible. In addition to boost bypass at temperature Tj(bp)bst ( 80 C), there is a

temperature protection function during the boo st state of Tj(end)bst ( 120 C). If the IC

temperature passes this level during boost, the transition timer is immediately started in

order to enter the burn state faster. This action effectively reduces the boost time. See

Figure 4 [B].

The current boost in the boost state does not start when Vi(DCI) is lower than Vth(bst)DCI.

Current boos t en ds when Vi(DCI) is lower than Vth(bst)DCI  Vth(bst)hys(DCI) without a boost

transition. See Figure 4 [A].

Remark: If the CB pin is shorted to ground, the boost function is disabled. During such

conditions, the bottom frequency fbridge(min) is 1.8 times higher than the boost bottom

frequency fbridge(bst)min.

7.1.6 Burn state

After the boost state, or when the boost state is bypassed burn state starts. The lamp

current sensor circuit is still enabled. See Figure 4 [A]. The CSI pin (current sense input)

measures the RMS voltage across sense resistor RCSI. It then passes through a

Double-Sided Rectifier (DSR) circuit and fed towards an Operational Transconductor

Amplifier (OTA). When the RMS voltage on the CSI pin reaches the internal reference

level, the lamp current sensor circuit takes over the control of the lamp current. The

Fig 6. Boost timing

001aam765

voltage

(V)

5 V

VCB

VCP

Vth(CP)max 4.5 V

Vth(CP)min 3.8 V

Vth(CB)max 3.6 V

Vth(CB)min

0.6 V

ignition boost transition burn

time (s)

132

2616263

0 V

1.1 V

Product data sheet Rev. 2 — 8 September 2011 10 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

internal curr ent output of th e OTA is tran sferred via an inte grator on the CI pin to the input

of the Voltage Controlled Oscillator (VCO). The VCO regulates the frequency and as a

result, the lamp current.

7.1.7 Hold state

The hold state is a special state to reduce lamp flicker at deep dim levels, on or near dim

and ignition threshold level. See Figure 3.

The hold state is entered following:

•a failed ignition attempt

•or when the low supply voltage VDD is lower than VDD(stop) in the ignition or preheat

state

•or when VDCI < Vth(start)DCI  Vth(hys)DCI in the ignition or preheat state

A repeated aborted preheat or ignition cycle due to a drop in DCI voltage that is lower than

Vth(start)DCI  Vth(hys)DCI or a drop in supply volt age that is lower than VDD(stop) in preheat or

ignition state does no t increment the ignition attempt counte r . The UBA20271/2 enters the

hold state only delaying a new preheat cycle by the same time delay and mechanism. As

shown in Figure 5 hold state retention time.

(1) Temp > Tj(bp)bst OR Boost_Disable

(2) Temp < Tj(bp)bst AND NOT Boost_Disable

(3) NOT (Boost OR Boost transition)

(4) Temp > Tj(end)bst OR Boost timer ended OR (Boost_ratio = 1.5 AND VDCI < Vth(bst)DCI - Vth(bst)hys(DCI))

(5) Boost_Transition timer ended OR VDCI < Vth(bst)DCI  Vth(bst)hys(DCI) OR Temp > Tj(otp)

Fig 7. Boost and burn state machine

001aam668

BOOST AND BURN

STATES

boost

boost timer running

Boost_ratio = 1 Boost_ratio = 1.5

boost transition

burn select

burn

temp < (Tj(otp) - Tj(otp)hys

(3)

Vi(DCI) > Vth(bst)DCI AND boost

(1) (4)

(5)

(2)

temp > (Tj(otp)

Vi(CSI) = Votp(CSI)

(66 % level)

Vi(CSI) = Vclamp(CSI)

(100 % level)

Product data sheet Rev. 2 — 8 September 2011 11 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

When CP is lower than Vth(rel)CP, the IC is released from the hold state and moves to the

start-up state. See Figure 3. Alternatively, the hold state ends when the supply voltage is

lower than VDD(rst) and the IC is reset.

With a 470 nF capacito r on the CP pin, the typical hold state retention delay is between

1.0 seconds and 1.7 seconds. However, it depends on where the preheat cycle is cut off

on the rising or falling edge of the preheat timing. The retention time for a failed ignition

always st arts fro m the top of the rising edge on the CP pin. See Figure 5. In the hold state,

a latch is set (hold state latch = 1), the oscillator is stopped, transistor HS is

non-conductive and transistor LS conducting. The voltage on pin VDD alternates between

VDD(start) and VDD(stop) as long as the voltage on the CP pin has no t reach ed Vth(rel)CP. See

Figure 5.

The alternating supply voltage is a result of the current drawn by the IC supply pin VDD.

The supply current is less than 220 A, when the supply voltage VDD is increasing

between VDD(stop) and VDD(start). The supply current is typically 2 mA when VDD is

decreasing between VDD(start) and VDD(stop). More current is drawn during the decreasing

slope of VDD as the internal analog supply is turned on when VDD > VDD(start). This

condition enables comp arators in the IC to monitor the volt a ge on the CP pin and whether

the supply voltage VDD decreases lower than VDD(stop).

7.2 Oscillation and timing

7.2.1 Oscillation

The internal oscillator is a VCO circuit which generates a sawtooth waveform between the

Vth(CF)max level and 0 V. Capacitor CCF, resistor Rext(RREF), and the voltage at the CI pin

determine the frequency of the sawtooth. Rext(RREF) and CCF determine the minimum and

maximum switching frequencies. Their ratio is internally fixed. There are two ratios, the

ratio between fbridge(max) and fbridge(min) is 2.5 and the ratio be tw ee n fbridge(max) and

fbridge(bst)min is 4.6. The sawtooth frequency is twice the half-bridge frequ ency.

Transistors HS (Q1) and LS (Q2) are brought into conduction with a duty cycle of

approximately 50 %. Figure 8 provides an overview of the oscillator signal and driver

signals. The oscillator starts oscillating at fbridge(max). The non-overlap time between the

gate drive signals VGLS and VGHS is tno.

Product data sheet Rev. 2 — 8 September 2011 12 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

7.2.2 Combined timing circuit

A combined timing cir cuit is in cluded to deter mine the prehea t time , ignitio n enablin g time

and overcurrent time, see Figure 9. The circuit consists of a clock generator defined by

CCP and Rext(RREF) and a counter. When the timer is not op erating, CCP is char ged to 5 V.

The timing circuit starts operating after the start-up state, as soon as the low supply

voltage has reached VDD(start). Additionally the DCI input voltage must be higher than

Vth(start)DCI and the voltag e on the CP pin must pass Vth(CP)max. The preheat time consists

of eight saw-tooth pulses on the CP pin as shown in Figure 9. The maximum ignition

enabling time following the preheat phase is two complete sawtooth (triangular) pulses.

During the boost and burn state, part of the timer is used to generate the maximum

overcurren t tim e (m or e th an on e ha lf of the saw-toothed pulse). If a continuous

overcurren t is det ec t ed, the timer starts.

Fig 8. Sawtooth, gate driver and half-brid ge output signals

001aam766

0tdch

VCF

voltage

(V)

V(GHS-HBO)

VGLS

VHBO

tno

time (s)

tno

Product data sheet Rev. 2 — 8 September 2011 13 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

7.3 Natural linear dimming

What determines the actual internal set point level used for the current control feedback

loop is an external level applied via the DCI pin for dimming. Th e DCI voltage is a function

of the phase cut angle of the applied dimmer. To ensure that the external input for the

control on the DCI pin internally stays within a certain range, this input signal passes an

internal linear to logarithmic conversion circuit followed by a limiting circuit.

The linear to logarithmic conversion circuit is designed to improve dimming control by

correcting for the higher sensitivity of the human eye to small changes in low light levels.

See Figure 10. The conversion circuit also provides a natural perceived linear brightness

adjustment of the lamp.

The limiting circuit prevents the signal falling below the MDL or rising above the 100 %

reference level of Vclamp(CSI). The ou tput of the linear to logarithmic conversion circuit is

the actual reference voltage for the lamp current control loop. See signal VLD in Figure 1

(dimmer control block). When the IC is in the burn state, the voltage is equal to the RMS

voltage on the CSI pin. When the control loop is regulating correctly, the upper limit is

clamped at the 10 0 % reference level. This condition prevents lamp current values that

are too high in mains overvoltage situations. See Figure 10.

The MDL level pr esets a minimu m to which the la mp current clips at low dim levels and is

adjustable via the MDL pin. An accurate minimum dimming voltage level is set by using an

internal reference current (derived from the internal band gap reference circuit and

resistor Rext(RREF)) and an applied external resistor RMDL on the MDL pin.

Fig 9. Timing diagram preheat, igni tion and overcurrent

001aam768

voltage

(V)

5 V

0 V

4.5 V

3.8 V

VCP

startup

time

preheat time boost-burn power down

overcurrent

fault time

CFL ignition

ignition

time

ignition

enabling time

time (s)

Vth(CP)max

Vth(CP)min

Product data sheet Rev. 2 — 8 September 2011 14 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

7.4 Protection and power-down

7.4.1 Coil saturation protection

Coil saturation protection is integrated into the IC to allow for the use of small CFL lamps

and use of small coils. Saturation of these co ils is detected and excessive overcurre nt due

to saturation is prevented. Coil saturation protection is only enabled during the ignition

state. To limit voltages and currents in the reso nant circuit when there is no ignition or

delayed ignition, a cycle-by-cycle control mechanism is used to prevent coil saturation.

This control also limits the high peak current and dissipation in the half-bridge power

transistors.

Coil saturation is detected by monito rin g the vo ltage acro ss th e RSLS resistor. A trigger is

generated when this voltage exceeds the Vth(sat)SLS level. When saturation is detected, a

fixed current Io(sat)CF is injected into the CCF capacitor to shorten the switching cycle of

the half-bridge. The injected current is maintained until the end of the switching cycle. This

action immediately increases the half-bridge switching frequency. Furthermore, in each

successive cycle that coil saturation is detected, capacitor CCI is discharged to enable an

ignition time-out detection in the ignition state.

(1) Vi(CSI) = VLD = f(Vi(DCI))

Fig 10. CSI voltage as a func tion of DCI volt age

0.2

Vth(hys)DCI

VT(hec1)DCI

midcurve

MDL

VT(hec2)DCI

Vth(start)DCI

0.9

100 %

VLD

Vclamp(CSI)

internal

clamp

0.4 0.6

(1)

0.8 1.0 1.2 1.4 1.6

001aam671

VT(hec3)DCI

0.2

0.4

0.6

0.8

1.0

1.2

Vi(DCI) (V)

Vi(CSI)

[VRMS]

voltage

(V)

voltage

(V)

Product data sheet Rev. 2 — 8 September 2011 15 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

Coil saturation protectio n is triggered when the voltage on the SLS pin exceeds Vth(sat)SLS.

The voltage VSLS on the SLS pin is also used to set the preheat current. T he value of

external resist or RSLS determines this voltage.

7.4.2 OverCurrent Protection (OCP)

OCP is active in the burn and boost states (not during boost transition). When the peak

absolute value of the voltage across the current sense resistor on the SLS pin exceeds

the OCP reference level Vth(ocp)SLS, overcurrent is detected . A current Io(CP) is then sunk

from the capacitor connected to the CP pin for the next full cycle. If the overcurrent is

absent at the end of this cycle, the current is disabled. Instead a current, also equal to

Io(CP), is sourced to the CP pin. If the overcurrent occurs in more than half the number of

cycles, there is a net disc ha rg in g of the capacitor connected to the CP pin. When the

voltage, on the CP pin is lower than Vth(CP)min the IC enters power-down mode. In a

continuous overcurrent condition, the overcurrent time-out of tfault(oc) takes about 1⁄10 tph.

The IC then enters the power-down mode. The Vth(ocp)SLS level corresponds with the

Vth(sat)SLS level during the ignition state.

7.4.3 OverPower Protection (OPP)

OPP is active in boost and burn state. The lamp current is limited and regulated to its

nominal designed lamp current in case overvoltage situations on the mains supply occur.

The overpower comes into action when the DCI voltage, that regulates the lamp cur rent is

exceeding the maximum DCI input range. Internally the DCI voltage is clamped to the

maximum input voltage level VT(hec3)DCI, see Figure 10. The DCI clamp level is

independent of any supply voltage fluctuations.

7.4.4 Capacitive Mode Protection (CMP)

CMP is active in the ignition, burn and boost states and during boost tra nsition. The signal

across resistor RSLS also provides inform a tio n ab ou t th e switc hin g beh av ior of the

half-bridge. When conditions are normal, the current flows from the source of the LS

transistor to the half-bridge when the LS transistor is switched on. This results in a

negative voltage on the SLS pin. As the circuit yields to capacitive mode, the voltage

decreases and eventually rever s es polarity. The protectio n pr events this condition fro m

happening by checking if the voltage on the SLS pin is higher than Vth(capm)SLS.

If the voltage across resistor RSLS is above the Vth(capm)SLS threshold when the LS

transistor is switched on, the circuit assumes that it is in capacitive mode. When

capacitive mod e is detected, the curren ts fr om the OT A are di sabl e d an d the ca pa citive

mode sink current, I o(sink)CI, is enabled. This sink current discharges the capacitor/resistor

circuitry on the CI pin and as a result gradually increase the half-bridge frequency.

Discharge continues for the remainder of the current switching cycle, so the total current

on CI is equal to the sink current. If capacitive mode persists, the action is repeated until

capacitive mode is not detected. If the capacitive mode is no longer detected, the OTA

starts regulating again.

If the conditions causing the capacitive mode persist, the OTA regulates the system back

towards capacitive mode with the protection system taking control. The system operates

on the edge of capacitive mode. During boost and burn state, if the load on the half-bridge

continues to be cap acitive at higher frequ encies, CMP eventually drives the half-bridge to

the maximum frequency fbridge(max). From this point, the IC enters power- d own mode .

Product data sheet Rev. 2 — 8 September 2011 16 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

7.4.5 Power-down mode

Power-down mode is entered when:

•a continuous overcurr ent exceeds th e maximum overcur rent time-out t fault(oc). Or over

a longer period if the overcurrent occurs in more than half the number of cycles as

soon as Vth(CP)min is reached.

•during the boost or the burn state fbridge(max) is reached due to capacitive mode

detection

•two consecutive failed lamp ignition attempts occur

In power-down mode, the oscillator is stopped and the HS transistor is non-conductive

while the LS transistor is conductive. The VDD supply is internally clamped. The circuit is

released from power-down mode by lowering the low voltage supply lower than VDD(rst)

(mains switch reset).

An option exists to set the IC in power-down mode via external logic. The external

power-down option is only available when the IC is in the boost or burn state. To enable

the external power-down option, the CP pin is used. When pin CP, is connected via a

10 k resistor to either PGND or SGND the voltage on pin CP is pulled down lower than

Vth(pd)CP. This results in the IC entering power-down mode.

Remark: Do not connect the CP pin directly to SGND or PGND pin. Connect the SGND or

PGND pin via a series 10 kresistor otherwise excessive currents flow during reset and

start-up state. Excessive current prevent the IC from starting up.

7.4.6 OverTemperature Protection (OTP)

The OTP circuit is designed to prevent the IC from overheating in hazardous

environments. The circuit is triggered when the IC temperature exceeds the maximum

temperature value Tj(otp). OTP changes the lamp current to the level that corresponds to

Votp(CSI) level. This condition remains until the IC temperature reduces by 20 C

(=Tj(otp)hys) and returns to the DCI controlled level.

Product data sheet Rev. 2 — 8 September 2011 17 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

8. Limiting values

[1] In accordance with SNW-FQ-303: all pins.

9. Thermal characteristics

Table 3. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

General

Rext(RREF) external resistance on pin RREF fixed nominal value

33 k

30 36 k

SR slew rate on pins HBO with

respect to GND 4+4 V/ns

Tamb ambient temperature P = 0.8 W 40 85 C

Tjjunction temperature 40 +150 C

Tstg storage temperature 55 +150 C

Currents

Ii(CF) input current on pin CF 0200 A

Voltages

VHBO voltage on pin HBO operating -500 V

during 1 second -600 V

VFS voltage on pin FS with respect to HBO 0.3 +14 V

VDD supply voltage 0.3 +14 V

Vi(CSI) input voltage on pin CSI 5+5 V

Vi(DCI) input voltage on pin DCI 0 5 V

Vi(SLS) input voltage on pin SLS 6+6 V

VCI voltage on pin CI 03.5 V

VMDL voltage on pin MDL 0 5 V

ESD

VESD electrostatic discharge voltage human body model:

all pins, except pins

14,15, and 16 2000 +2000 V

pins 14,15, and 16 1000 +1000 V

charged device model:

all pins 500+500 V

Latch-up [1] - - -

Table 4. Thermal characteristics

Symbol Parameter Conditions Typ Unit

Rth(j-a) thermal resistance from junction to

ambient in free air; SO16 package 100 K/W

Product data sheet Rev. 2 — 8 September 2011 18 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

10. Characteristics

Table 5. Characteristics

VDD = 13 V; VFS - VHBO = 13 V ; Tamb = 25



C; settings according to default setting in Table 6, all voltages referenced to GND,

positive currents flow into the IC, unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Unit

Start-up state (VDD)

VDD(rst) reset supply voltage high-side switch = off;

low side switch = on 5.7 6.2 6.7 V

VDD(stop) stop supply volt age 9.6 10.0 10.4 V

VDD(start) start supply voltage 11.9 12.4 12.9 V

VDD(hys) hysteresis of supply

voltage 2.2 2.4 2.6 V

VDD(clamp) clamp supply voltage Iclamp(VDD) = 5 mA 13.0 13.4 13.8 V

IDD(clamp) clamp supply current VDD = 14 V 20 30 -mA

IDD(startup) start-up supply current VDD = 9 V - 190 220 A

IDD(pd) power-down supply

current VDD = 9 V - 190 220 A

IDD supply current default setting; VDCI = 1.4 V

VCI = Vclamp(CI), VCB = 0 V

[1] -1.6 2.0 mA

High-voltage supply (GHS, HBO and FS)

Ileak leakage current 500 V on high-voltage pins - - 30 A

Voltage controlled oscillator

Output pin IC

VCI(max) maximum voltage on

pin CI 2.7 3.0 3.3 V

Vhr(CI) headroom voltage on

pin CI Vclamp(CI) = Vhr(CI)) + VCI(max) ;

burn and boost state -80 -mV

Voltage controlled oscillator

Output pin CF

fbridge(max) maximum bridge

frequency CCF = 100 pF; VCI = 0 V [2] 88 100 112 kHz

fbridge(bst)min minimum boost bridge

frequency CCF = 100 pF;

VCI = Vclamp(CI)

[2] 21 22 23 kHz

fbridge(min) minimum bridge

frequency CCF = 100 pF;

VCI = Vclamp(CI); VCB = 0 V [2] 38 40 42 kHz

tno non-overlap time VHBO rising edge 1.3 1.5 1.7 s

VHBO falling edge 1.3 1.5 1.7 s

Vth(CF)max maximum threshold

voltage on pin CF CCF = 100 pF;

VCI = Vclamp(CI); VCB = 0 V 2.40 2.50 2.60 V

Io(bst)CF boost output current on

pin CF VCF = 1.5 V; VCI = Vclamp(CI) 12.3 11.8 11.3 A

Product data sheet Rev. 2 — 8 September 2011 19 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

Io(CF)min minimum output current

on pin CF VCF = 1.5 V; VCB = 0 V ;

VCI = Vclamp(CI)

22.8 21.8 20.8 A

Io(CF)max m aximum output

current on pin CF VCF = 1.5 V; VCB = 0 V 67.0 60.0 53.0 A

Gate driver output

Output pins GLS, GHS

Isource(drv) driver source current VG = 4 V (GLS or GHS);

VHBO = 0 V; VDD = VFS

= 12 V

105 90 75 mA

Rsink(drv) driver sink resistance VG = 2 V (GLS or GHS);

VHBO = 0 V;

VDD = VFS = 12 V

13 15.5 18 

Table 5. Characteristics …continued

VDD = 13 V; VFS - VHBO = 13 V ; Tamb = 25



C; settings according to default setting in Table 6, all voltages referenced to GND,

positive currents flow into the IC, unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 2 — 8 September 2011 20 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

Bootstrap diode

VFforward voltage bootstrap diode; IFS = 5 mA;

(VF = VDD - VFS)1.3 1.7 2.1 V

Preheat current sensor

Input: pin SLS

II(SLS) input current on pin

SLS Vi(SLS) = 0.4 V - - 1 A

Vph(SLS) preheat voltage on pin

SLS [3] 0.57 0.60 0.63 V

Output: pin CI

Io(source)CI source outpu t current

on pin CI VCI = 2.0 V; Vi(SLS) < 0.6 V 10.6 9.6 8.6 A

Io(sink)CI sink output current on

pin CI VCI = 2.0 V; Vi(SLS) > 0.6 V 26 29 32 A

Preheat timer, ignition timer, overcurrent fault timer

Pin CP

tph preheat time CCP = 470 nF;

Rext(RREF) = 33 k

-0.93 - s

ten(ign) ignition enable time CCP = 470 nF;

Rext(RREF) = 33 k

-0.22 - s

tfault(oc) overcurrent fault time CCP = 470 nF;

Rext(RREF) = 33 k;

initial voltage VCP = 5.0 V

-0.10 - s

Io(CP) output current on pin

CP VCP = 4.1 V; source () and

sink (+) 5.5 5.9 6.3 A

Vth(CP)min minimum threshold

voltage on pin CP -3.8 - V

Vth(CP)max maximum threshold

voltage on pin CP -4.5 - V

Vhys(CP) hysteresis voltage on

pin CP 0.6 0.7 0.8 V

Ipu(CP) pull-up current on pin

CP VCP = 3.8 V - 60 -A

Vth(pd)CP power-down threshold

voltage on pin CP burn state, pin CP connected

to SGND via 10 k -1.0 - V

Vth(rel)CP release threshold

voltage on pin CP hold state, VDCI = 1.4 V - 2.7 - V

Boost timer

Pin CB

tbst boost time CCB = 470 nF; Tj < 80 C - 148 - s

Io(CB) output current on pin

CB VCB = 2.35 V; source () and

sink (+) 0.8 1.0 1.2 A

Vth(CB)min minimum threshold

voltage on pin CB -1.1 - V

Table 5. Characteristics …continued

VDD = 13 V; VFS - VHBO = 13 V ; Tamb = 25



C; settings according to default setting in Table 6, all voltages referenced to GND,

positive currents flow into the IC, unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 2 — 8 September 2011 21 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

Vth(CB)max maximum threshold

voltage on pin CB -3.6 - V

Vhys(CB) hysteresis voltage on

pin CB 2.3 2.5 2.7 V

Tj(bp)bst boost bypass junction

temperature Tj sensed at end ignition time 65 80 95 C

Tj(end)bst boost end junction

temperature Tj during boost time 105 120 135 C

Idet(dis)bst boost disable detection

current VCB = 0 V 30 25 20 A

tt(bst-burn) transition time from

boost to burn CCP = 470 nF; Tj < 80 C - 3.6 - s

Pin CSI

NLCBR lamp current boost ratio VCSI in boost state versus

VCSI in burn state;

VDCI = 1.34 V

1.4 1.5 1.6

Coil saturation protection and overcurrent detection

Input: pin SLS

Vth(sat)SLS saturation threshold

voltage on pin SLS ignition state 2.3 2.5 2.7 V

Vth(ocp)SLS overcurrent protection

threshold voltage on

pin SLS

boost state and burn state 2.3 2.5 2.7 V

tleb leading edge blanking

time detection disabled first part

of GLS time -800 -ns

Output: pin CI

Io(sink)CI sink output current on

pin CI VCI = 2.0 V; ignition state;

Vi(SLS) > Vth(sat)SLS; cycle

clocked

26 29 32 A

Output: pin CF

Io(sat)CF saturation output

current difference on

pin CF

VCF = 1.5 V; ignition state;

low-side switch = on -160 -A

Ignition current detection

Input: pin CSI

Vth(det)ign(CSI) ignition detection

threshold voltage on

pin CSI

0.55 0.60 0.65 V

tw(det)ign(min) minimum ignition

detection pulse width Vth(det)ign(CSI) = 0.75 V

square pulse 685 885 1085 ns

Table 5. Characteristics …continued

VDD = 13 V; VFS - VHBO = 13 V ; Tamb = 25



C; settings according to default setting in Table 6, all voltages referenced to GND,

positive currents flow into the IC, unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 2 — 8 September 2011 22 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

Capacitive mode detection

Input: pin SLS

Vth(capm)SLS capacitive mode

threshold voltage on

pin SLS

[4] 15 5 0 mV

Output: pin CI

Io(sink)CI sink output current on

pin CI VSLS > Vth(capm)SLS;

VCI = 2.0 V; ignition state or

boost and burn state

26 29 32 A

Lamp current sens or and dimming control

Input: pin CSI

Ri(CSI) input resistance on pin

CSI Vi(CSI) = 1 V 1 - - M

Vi(CSI) = 1 V 40 50 60 k

Vi(CSI) input voltage on pin

CSI controlled fe ed b a ck RMS

voltage at minimum dim

level; Vi(DCI) = 0 V;

Rext(RREF) = 33 k;

RMDL = 2.0 k

44 50 56 mV

controlled fe ed b a ck RMS

voltage at mid scale of lin log

curve in burn state;

Vi(DCI) = 0.9 V;

Rext(RREF) = 33 kW

-215 -mV

voltage rectification range for

linear operation 2.5 -+2.5 V

Vclamp(CSI) clamping voltage on pin

CSI 100 % light output; Vi(DCI)

1.34 V -1.0 - V

Input: pin DCI

Vi(DCI) input voltage on pin

DCI minimum voltage set by MDL

pin resistor VT(hec2)DCI -1.34 V

Ri(DCI) input resistance on pin

DCI Vi(CSI) = 1 V 1 - - M

Vth(bst)DCI boost threshold voltage

on pin DCI 1.00 1.05 1.10 V

Vth(bst)hys(DCI) hysteresis boost

threshold voltage on

pin DCI

80 100 120 mV

Vth(start)DCI start threshold voltage

on pin DCI -0.35 - V

Vth(hys)DCI hysteresis threshold

voltage on pin DCI 80 100 120 mV

VT(hec1)DCI human eye correction 1

transition voltage on pin

DCI

Vi(CSI) = 0 V; VMDL = 0 V - 0.17 - V

Table 5. Characteristics …continued

VDD = 13 V; VFS - VHBO = 13 V ; Tamb = 25



C; settings according to default setting in Table 6, all voltages referenced to GND,

positive currents flow into the IC, unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 2 — 8 September 2011 23 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

[1] For the default setting, see Table 6.

[2] Switching frequency of the half-bridge output HBO. The sawtooth frequency on pin CF is twice as high.

[3] Data sampling of Vph(SLS) is performed at the end of the conduction period of the low-side power MOSFET, in preheat state.

[4] Data sampling of Vth(capm)SLS is performed at the start of conduction of the low-side power MOSFET, in all states with oscillator active.

VT(hec2)DCI human eye correction 2

transition voltage on pin

DCI

Rext(RREF) = 33 k;

RMDL = 2.0 k;

Vi(CSI) = Vclamp(CSI)

-0.44 - V

VT(hec3)DCI human eye correction 3

transition voltage on pin

DCI

Vi(CSI) = 1 V - 1.34 - V

Votp(CSI) overtemperature

protection voltage on

pin CSI

RMS voltage;

Rext(RREF) = 33 k;

RMDL = 2.0 k;

Vi(DCI) = 1.5 V;

Tj > Tj(otp)  Tj(otp)hys

380 400 420 mV

Output: pin CI

Io(CI) output current on pin CI burn state; source () and

sink (+); VCI = 2.0 V 85 95 105 A

Input: pin MDL

Isource(MDL) source current on pin

MDL 26.3 25.0 23.7 A

VMDL voltage on pin MDL Rext(RREF) = 33 k;

RMDL = 2.0 k

-50 -mV

Te mperature protection

Tj(otp) overtemperature

protection junction

temperature

145 160 175 C

Tj(otp)hys hysteresis

overtemperature

protection junction

temperature

10 20 30 C

Table 5. Characteristics …continued

VDD = 13 V; VFS - VHBO = 13 V ; Tamb = 25



C; settings according to default setting in Table 6, all voltages referenced to GND,

positive currents flow into the IC, unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 2 — 8 September 2011 24 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

11. Application information

11.1 Design equations

All equations are only valid for Rext(RREF) = 33 k

11.1.1 CCP related timing equations:

•Preheat time:

(1)

•Ignition enabling time:

(2)

•Overcurrent fau lt time:

(3)

•Transition to burn time:

(4)

•Restart delay time:

(5)

Where: Irestart(CP) = 0.5 A (typical)

11.1.2 CCB related timing equations:

•Boost time:

(6)

11.1.3 CCF related frequency equations:

•Maximum bridge frequency:

(7)

•Minimum bridge frequency with disabled boost:

tph CCP

IoCP

-------------- 16 Vhys CP5V

th CPmax

–+=

ten ign

CCP

IoCP

-------------- 4V

hys CP

=

tfault oc

CCP

IoCP

-------------- 5V

th CPmin

–=

tt bst burn–

CCP

IoCP

-------------- 64 Vhys CP5V

th CPmax

–+=

tdrestart

CCP

Irestart CP

--------------------------Vth CPmax Vth relCP

–=

tbst CCB

IoCB

-------------- 126 Vhys CBVth CBmin 0.6–+=

fbridge max

0.5

CCF Cpar

IoCFmax

--------------------------- Vth CFmax tdch

+

----------------------------------------------------------------------------

Product data sheet Rev. 2 — 8 September 2011 25 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

(8)

•Minimum bridge frequency with enabled boost:

(9)

Where: Cpar = 4.7 [pF] and tdch = 0.4 [s] (typical)

11.1.4 RSLS related preheat current:

(10)

11.1.5 RMDL related MDL:

•MDL threshold voltage:

(11)

Detailed in Table 6 is a list of typical application components. See Figure 11.

fbridge min

0.5

CCF Cpar

IoCFmin

--------------------------- Vth CFmax tdch

+

----------------------------------------------------------------------------

fbridge bstmin 0.5

CCF Cpar

IobstCF

--------------------------- Vth CFmax tdch

+

----------------------------------------------------------------------------

Iph M

Vph SLS

RSLS

--------------------

=Iph RMS

Vph SLS

RSLS 3

-------------------------



VMDL RMDL Isource MDL

=

Fig 11. Applicatio n dia gram

001aam672

R10

RMDL

RREF

D5 D6

CCB

CCF

CCP

C15

C16

CFL

R4 RSLS

RCSI

R5 Q1

HBO

MDL

RREF

GHS

GLS

PGND

VDD

SLS

CSI

DCI

C1 C2

C12

C14 C6R11 C7

C10 C13

C17

C5C4

C11

D3 D4

D1 D2

UBA20270

SGND

313

Table 6. Typical components for a 230 V mains application

Reference Component UBA20270 Description

R1 10 2 W fusible resistor

R2, R3 220 k

R4 22 k

Product data sheet Rev. 2 — 8 September 2011 26 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

R5, R6 330 k

R7, R10 100 k

R8 1 k

R9 1 k

R11 39 k

RREF 33 k; 1 %

RSLS 1.2 

RMDL 1 k

RCSI 8.2 adjust for nominal lamp current

C1, C2 22 nF; 630 V

C3 3.3 nF; 1000 V

C4 10 F; 400 V

C5 4.7 nF; 1000 V lamp capacitor

C6, C14 470 nF

C7 100 pF

C8 47 nF; 400 V

C9 560 pF; 500 V VDD charge pump capacitor

C10 not mounted

C11 4.7 nF

C12 100 nF

C13 470 nF

C15 220 nF

C16 not mounted

C17 22 nF; 400 V

CCB 150 nF

CCP 470 nF

CCF 100 pF; 2 %

Q1, Q2 SPS02N60C3

D1 to D4 1N4007

D5, D6 1N4937

D7 BZX84JC12

D8 1N4148

L1 4.7 mH mains filter inductor; ISAT = 300 mA

L2 2000/2/2 Hlamp inductor

D9 1N4148

Table 6. Typical components for a 230 V mains application …continued

Reference Component UBA20270 Description

Product data sheet Rev. 2 — 8 September 2011 27 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

12. Package outline

Fig 12. Package outline SOT109-1 (SO16)

detail X

(A )

pin 1 index

UNIT A

max. A

(1)

(1) (1)

QZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

1.75 0.25

0.10 1.45

1.25 0.25 0.49

0.36 0.25

0.19 10.0

9.8 4.0

3.8 1.27 6.2

5.8 0.7

0.6 0.7

0.3 8

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.0

0.4

SOT109-1 99-12-27

03-02-19

076E07 MS-012

0.069 0.010

0.004 0.057

0.049 0.01 0.019

0.014 0.0100

0.0075 0.39

0.38 0.16

0.15 0.05

1.05

0.041

0.244

0.228 0.028

0.020 0.028

0.012

0.01

0.25

0.01 0.004

0.039

0.016

0 2.5 5 mm

scale

SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

Product data sheet Rev. 2 — 8 September 2011 28 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

13. Abbreviations

Table 7. Abbreviations

Acronym Description

CFL Compact Fluorescent Lamp

CMP Capacitive Mode Protection

DSR Double-Sided Rectifier

ESD ElectroStatic Discharge

HS High-Side

LS Low-Side

MDL Minimum Dimming Level

OCP OverCurrent Protection

OPP OverPower Protection

OTA Operational Transconductance Amplifier

OTP OverTemperature Protection

RMS Root Mean Square

SR Slew Rate

UVLO UnderVoltage LockOut

VCO Voltage Controlled Osci llator

Product data sheet Rev. 2 — 8 September 2011 29 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

14. Revision history

Table 8. Revisio n history

Document ID Release date Data sheet status Change notice Supersedes

UBA2027 0 v.2 20110908 Prroduct data sheet -UBA20270 v.1

UBA2027 0 v.1 20110816 Preliminary data sheet - -

Product data sheet Rev. 2 — 8 September 2011 30 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

15. Legal information

15.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

15.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liab ility for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and tit le. A short data sh eet is intended

for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conflict with the shor t data sheet, the

full data sheet shall pre vail.

Product specificat ion — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to off er functions and qualities beyond those described in the

Product data sheet.

15.3 Disclaimers

Limited warr a nty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequ ential damages (including - wit hout limitatio n - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ aggreg ate and cumulative l iability towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semicondu ctors.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all informa tion supplied prior

to the publication hereof .

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suit able for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in perso nal injury, death or severe property or environmental

damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty tha t such application s will be suitable for the

specified use without further testing or modification.

Customers are responsible for the design and ope ration of their applications

and products using NXP Semicondu ctors products , and NXP Semiconductors

accepts no liability for any assistance with applications or cu stomer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suit able and fit for the custome r’s applications and

products planned, as well as fo r the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with their

applications and products.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by custo m er’s

third party customer(s). Customer is responsible for doing all necessary

testing for th e customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanent ly and irreversibly affect

the quality and reliability of the device.

Terms and conditions of commercial sale — NXP Semicon ductors

products are so ld subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individua l agreement. In case an individual

agreement is concluded only the term s and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing i n this document may be interpreted or

construed as an of fer t o sell product s that is open for accept ance or t he grant,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from national authorities.

Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contains data from the objective specification for product development.

Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.

Product [short] dat a sheet Production This document contains the product specification.

Product data sheet Rev. 2 — 8 September 2011 31 of 32

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

Non-automotive qualified products — Unless this data sheet expressly

states that this specific NXP Semiconductors product is automotive qualifi ed,

the product is not suitable for automo tive use. It is neither qua lif ied nor test ed

in accordance with automotive testing or application requirements. NXP

Semiconductors accepts no liability for inclusion and/or use of

non-automotive qualified products in automotive equipment or applications.

In the event that customer uses the product for design-in and use in

automotive applications to automot ive specifications and standard s, customer

(a) shall use the product without NXP Semiconductors’ warranty of the

product for such automotive applicat ions, use and specifications, and (b)

whenever customer uses the product for automotive applications beyond

NXP Semiconductors’ specifications such use shall be solely at customer’s

own risk, and (c) customer fully indemnifies NXP Semiconductors for any

liability, damages or failed product claims resulting from customer design and

use of the product for automotive applications beyond NXP Semiconductors’

standard warranty and NXP Semiconductors’ product specifications.

15.4 Trademarks

Notice: All referenced b rands, produc t names, service names and trademarks

are the property of their respect i ve ow ners.

16. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors UBA20270

600 V Driver IC for dimmable compact fluorescent lamps

For more information, please visit: http://www.nxp.co m

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 8 September 2011

Document identifier: UBA20270

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

17. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1

2.1 Half-bridge features . . . . . . . . . . . . . . . . . . . . . 1

2.2 Preheat and ign ition features . . . . . . . . . . . . . . 1

2.3 Lamp boost features. . . . . . . . . . . . . . . . . . . . . 1

2.4 Dim features . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

2.5 Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

2.6 Other features. . . . . . . . . . . . . . . . . . . . . . . . . . 2

3 Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3

6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4

6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4

7 Functional description . . . . . . . . . . . . . . . . . . . 5

7.1 Lamp start-up cycle . . . . . . . . . . . . . . . . . . . . . 6

7.1.1 Reset state . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

7.1.2 Start-up state . . . . . . . . . . . . . . . . . . . . . . . . . . 6

7.1.3 Preheat state . . . . . . . . . . . . . . . . . . . . . . . . . . 6

7.1.4 Ignition state . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

7.1.5 Boost state and transition to burn state . . . . . . 8

7.1.6 Burn state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

7.1.7 Hold state . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

7.2 Oscillation and timing . . . . . . . . . . . . . . . . . . . 11

7.2.1 Oscillation. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

7.2.2 Combined timing circuit . . . . . . . . . . . . . . . . . 12

7.3 Natural linear dimming . . . . . . . . . . . . . . . . . . 13

7.4 Protection and powe r -down . . . . . . . . . . . . . . 14

7.4.1 Coil saturation protection . . . . . . . . . . . . . . . . 14

7.4.2 OverCurrent Protection (OCP) . . . . . . . . . . . . 15

7.4.3 OverPower Protection (OPP) . . . . . . . . . . . . . 15

7.4.4 Capacitive Mode Protection (CMP) . . . . . . . . 15

7.4.5 Power-down mode . . . . . . . . . . . . . . . . . . . . . 16

7.4.6 OverTemperature Protection (OTP) . . . . . . . . 16

8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 17

9 Thermal characteristics . . . . . . . . . . . . . . . . . 17

10 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 18

11 Application information. . . . . . . . . . . . . . . . . . 24

11.1 Design equations . . . . . . . . . . . . . . . . . . . . . . 24

11.1.1 CCP related timing equations: . . . . . . . . . . . . 24

11.1.2 CCB related timing equations:. . . . . . . . . . . . . 24

11.1.3 CCF related frequency equations:. . . . . . . . . . 24

11.1.4 RSLS related preheat current: . . . . . . . . . . . . . 25

11.1.5 RMDL related MDL: . . . . . . . . . . . . . . . . . . . . . 25

12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 27

13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 28

14 Revision history . . . . . . . . . . . . . . . . . . . . . . . 29

15 Legal information . . . . . . . . . . . . . . . . . . . . . . 30

15.1 Data sheet status. . . . . . . . . . . . . . . . . . . . . . 30

15.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

15.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 30

15.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 31

16 Contact information . . . . . . . . . . . . . . . . . . . . 31

17 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32