19-2195; Rev 1; 10/04 10-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 Features The MAX5711 is a small footprint, low-power, 10-bit digital-to-analog converter (DAC) that operates from a single +2.7V to +5.5V supply. The MAX5711 on-chip precision output amplifier provides rail-to-rail output swing. Drawing an 85A supply current at 3V, the MAX5711 is ideally suited to portable battery-operated equipment. The MAX5711 utilizes a 3-wire serial interface compatible with SPITM/QSPITM/MICROWIRETM and DSP-interface standards. All logic inputs are CMOS-logic compatible and buffered with Schmitt triggers to allow direct interfacing to optocouplers. The MAX5711 incorporates a poweron reset (POR) circuit that ensures that the DAC begins in a zero-volt-state upon power-up. A power-down mode that reduces current consumption to 0.3A may be initiated through a software command. Wide -40C to +125C Operating Temperature Range The MAX5711 is available in a small 6-pin SOT23 package. For dual and quad 10-bit versions, see the MAX5721 and MAX5741 data sheets. For single, dual, and quad 12-bit versions, see the MAX5712, MAX5722, and MAX5742 data sheets. The MAX5711 is specified over the automotive temperature range of -40C to +125C. Three Software-Selectable Power-Down Output Impedances (100k, 1k, Hi-Z) Low 85A Supply Current Ultra Low 0.3A Power-Down Supply Current Single +2.7V to +5.5V Supply Voltage Fast 20MHz 3-Wire SPI/QSPI/MICROWIRE and DSP-Compatible Serial Interface Schmitt-Triggered Inputs for Direct Interfacing to Optocouplers Rail-to-Rail Output Buffer Power-On Reset to Zero Volts Tiny 6-Pin SOT23 Package Applications Automatic Tuning Gain and Offset Adjustment Power Amplifier Control Process Control I/O Boards Battery-Powered Equipment VCO Control Ordering Information TEMP RANGE PINPACKAGE MAX5711EUT-T -40C to +85C 6 SOT23-6 ABCP MAX5711AUT-T -40C to +125C 6 SOT23-6 AAUC PART TOP MARK SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor, Corp. Functional Diagram VDD GND TOP VIEW REF+ REFDAC REGISTER 10-BIT DAC MAX5711 OUTPUT BUFFER OUT 100k INPUT CONTROL LOGIC __________________Pin Configuration VDD 1 OUT 5 CS 4 SCLK 1k GND 2 POWER-DOWN CONTROL LOGIC 6 MAX5711 DIN 3 POWER-ON RESET SOT23 CS SCLK DIN ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. 1 MAX5711 General Description MAX5711 10-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 ABSOLUTE MAXIMUM RATINGS VDD to GND ..............................................................-0.3V to +6V OUT, SCLK, DIN, CS to GND .....................-0.3V to (VDD + 0.3V) Maximum Current into Any Pin .........................................50mA Continuous Power Dissipation (TA = +70C) 6-Pin SOT23 (derate 9.1mW/C above +70C)...........727mW Operating Temperature Range MAX5711EUT .................................................-40C to +85C MAX5711AUT ...............................................-40C to +125C Maximum Junction Temperature .....................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD = +2.7V to +5.5V, GND = 0, RL = 5k, CL = 200pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +5V, TA = +25C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 0.5 4 LSB 1 LSB 1.5 % of FS STATIC ACCURACY (NOTE 1) Resolution N 10 Integral Nonlinearity Error INL (Note 2) Differential Nonlinearity Error DNL Guaranteed monotonic (Note 2) Zero-Code Error OE Code = 000 0.4 Zero-Code Error Tempco Gain Error Bits 2.3 GE Code = 3FF hex ppm/C -3 Gain Error Tempco 0.26 % of FS ppm/C DAC OUTPUT Output Voltage Range No load (Note 3) DC Output Impedance Short-Circuit Current Wake-Up Time Output Leakage Current 0 VDD Code = 200 hex 0.8 VDD = +3V 15 VDD = +5V 48 VDD = +3V 8 VDD = +5V 8 Power-down mode = output high impedance V mA s 18 nA DIGITAL INPUTS (SCLK, DIN, CS) 2 Input High Voltage VIH VDD = +3V, +5V Input Low Voltage VIL VDD = +3V, +5V Input Leakage Current IIN Digital inputs = 0 or VDD Input Capacitance CIN 0.7 x VDD V 0.1 5 _______________________________________________________________________________________ 0.3 x VDD V 1 A pF 10-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 (VDD = +2.7V to +5.5V, GND = 0, RL = 5k, CL = 200pF, TA = TMIN to TMAX, TA = +25C, unless otherwise noted. Typical values are at VDD = +5V, TA = +25C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DYNAMIC PERFORMANCE Voltage Output Slew Rate SR 0.5 V/s Voltage Output Settling Time 100 hex to 300 hex (Note 4) Digital Feedthrough Any digital inputs from 0 or VDD 0.2 4 10 nV-s s Digital-Analog Glitch Impulse Major carry transition (code 1FF hex to code 200 hex) 12 nV-s POWER REQUIREMENTS Supply Voltage Range VDD Supply Current with No Load IDD Power-Down Supply Current IDDPD 2.7 5.5 All digital inputs at 0 or VDD, VDD = 3.6V 85 150 All digital inputs at 0 or VDD, VDD = 5.5V 105 0.29 187 1 All digital inputs at 0 or VDD, VDD = 5.5V V A A TIMING CHARACTERISTICS (FIGURE 2) (Timing is tested with no load) fSCLK 0 tCH 20 ns SCLK Pulse Width Low tCL 20 ns CS Fall to SCLK Rise Setup tCSS 15 ns DIN Setup Time tDS 15 ns DIN Hold Time tDH 0 ns SCLK Falling Edge to CS Rising Edge tCSH 10 ns CS Pulse Width High tCSW 80 ns SCLK Clock Frequency SCLK Pulse Width High Note 1: Note 2: Note 3: Note 4: 20 MHz DC specifications are tested without output loads. Linearity guaranteed from code 29 to code 995. Offset and gain error limit the FSR. Guaranteed by design. Typical Operating Characteristics (TA = +25C, unless otherwise noted.) 0.15 0.10 VDD = +5V DNL (LSB) 1 0 0.05 0 -0.05 -1 VDD = +3V 1.0 0.8 0.6 0.4 0.2 0 -0.4 -0.10 -3 -0.15 -0.8 -4 -0.20 -1.0 128 256 384 512 640 768 896 1024 CODE 0 128 256 384 512 640 768 896 1024 CODE VDD = +5V -0.2 -2 0 MAX5711 toc03 VDD = +3V OR +5V TOTAL UNADJUSTED ERROR (%) 2 MAX5711 toc02 3 INL (LSB) 0.20 MAX5711 toc01 4 TOTAL UNADJUSTED ERROR vs. CODE (TA = +25C) DIFFERENTIAL NONLINEARITY vs. CODE (TA = +25C) INTEGRAL NONLINEARITY vs. CODE (TA = +25C) -0.6 VDD = +3V 0 128 256 384 512 640 768 896 1024 CODE _______________________________________________________________________________________ 3 MAX5711 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (continued) (TA = +25C, unless otherwise noted.) DIFFERENTIAL NONLINEARITY vs. CODE (TA = +125C) 0.15 0.10 VDD = +5V 0 -1 0 -0.05 VDD = +3V -2 -0.10 -3 -0.15 -0.6 VDD = +3V 128 256 384 512 640 768 896 1024 0 128 256 384 512 640 768 896 1024 DIFFERENTIAL NONLINEARITY vs. CODE (TA = -40C) TOTAL UNADJUSTED ERROR vs. CODE (TA = -40C) 0.15 DNL (LSB) 0.05 0 -1 0 -0.05 VDD = +3V -2 -0.10 -3 -0.15 -4 1.0 0.8 0.6 0.4 0.2 0 VDD = +5V -0.2 -0.4 VDD = +3V -0.6 -0.8 -0.20 128 256 384 512 640 768 896 1024 MAX5711 toc09 VDD = +3V OR +5V TOTAL UNADJUSTED ERROR (%) MAX5711 toc07 0.20 0.10 1 0 0 128 256 384 512 640 768 896 1024 128 256 384 512 640 768 896 1024 CODE CODE CODE WORST-CASE INL AND DNL vs. TEMPERATURE SOURCE AND SINK CURRENT CAPABILITY (VDD = +3V) SOURCE AND SINK CURRENT CAPABILTIY (VDD = +5V) MAXIMUM INL 2.5 MAXIMUM DNL CODE = 300 HEX, SOURCING CURRENT FROM OUT 2.0 VOUT (V) 1 0 1.5 CODE = 100 HEX, SINKING CURRENT INTO OUT 1.0 MINIMUM INL MINIMUM DNL -4 0 20 40 60 80 TEMPERATURE (C) 100 120 4.0 3.5 3.0 CODE = 300 HEX, SOURCING CURRENT FROM OUT 2.5 2.0 CODE = 100 HEX, SINKING CURRENT INTO OUT 1.5 CODE = 000, SINKING CURRENT INTO OUT CODE = 000, SINKING CURRENT INTO OUT 0.5 0 -20 CODE = 3FF HEX, SOURCING CURRENT FROM OUT 4.5 1.0 0.5 -3 5.0 VOUT (V) 3 CODE = 3FF HEX, SOURCING CURRENT FROM OUT MAX5711 toc11 3.0 MAX5711 toc10 4 -40 -0.4 INTEGRAL NONLINEARITY vs. CODE (TA = -40C) VDD = +5V -2 VDD = +5V CODE 2 -1 0 -0.2 CODE 3 2 0.2 CODE 4 0 0.4 -1.0 0 128 256 384 512 640 768 896 1024 0.6 -0.8 MAX5711 toc08 0 4 0.8 -0.20 -4 INL (LSB) 0.05 DNL (LSB) 1 1.0 MAX5711 toc06 VDD = +3V OR +5V MAX5711 toc12 2 MAX5711 toc05 3 INL (LSB) 0.20 MAX5711 toc04 4 TOTAL UNADJUSTED ERROR vs. CODE (TA = +125C) TOTAL UNADJUSTED ERROR (%) INTEGRAL NONLINEARITY vs. CODE (TA = +125C) INL AND DNL (LSB) MAX5711 10-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 0 0 2 4 6 8 10 ISOURCE/SINK (mA) 12 14 16 0 5 10 15 20 25 ISOURCE/SINK (mA) _______________________________________________________________________________________ 30 35 40 10-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 POWER-DOWN SUPPLY CURRENT vs. SUPPLY VOLTAGE 80 CODE = 000 60 40 20 0 250 200 150 100 3.2 3.7 4.2 4.7 5.2 800 700 VDD = +5V 600 500 400 300 VDD = +3V 200 50 100 0 0 2.7 900 SUPPLY CURRENT (A) SUPPLY CURRENT (A) 100 300 MAX5711 toc14 CODE = 3FF HEX POWER-DOWN SUPPLY CURRENT (nA) MAX5711 toc13 120 SUPPLY CURRENT vs. CS INPUT VOLTAGE MAX5711 toc15 SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX5711 Typical Operating Characteristics (continued) (TA = +25C, unless otherwise noted.) 2.7 3.2 3.7 4.2 4.7 0 5.2 1 2 3 4 5 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) CS INPUT VOLTAGE (V) FULL-SCALE SETTLING TIME (VDD = +5V) FULL-SCALE SETTLING TIME (VDD = +5V) HALF-SCALE SETTLING TIME (VDD = +3V) MAX5711 toc16 MAX5711 toc17 VSCLK 5V/div MAX5711 toc18 VSCLK 5V/div VSCLK 5V/div VOUT VOUT 1V/div VOUT 1V/div 1V/div CODE 000 TO 3FF HEX RL = 5k CL = 200pF CODE 3FF HEX TO 000 RL = 5k CL = 200pF CODE 100 HEX TO 300 HEX RL = 5k CL = 200pF 1s/div 2s/div 1s/div HALF-SCALE SETTLING TIME (VDD = +3V) EXITING POWER-DOWN (VDD = +5V) DIGITAL-TO-ANALOG GLITCH IMPULSE (VDD = +5V) MAX5711 toc20 MAX5711 toc19 MAX5711 toc21 VSCLK 5V/div VSCLK 5V/div VOUT CODE 200 HEX VOUT 1V/div 10mV/div VOUT CODE 300 HEX TO 100 HEX RL = 5k CL = 200pF 1s/div RL = 5k CL = 200pF 5s/div 1V/div CODE 200 HEX TO 1FF HEX RL = 5k CL = 200pF 500ns/div _______________________________________________________________________________________ 5 MAX5711 10-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 Typical Operating Characteristics (continued) (TA = +25C, unless otherwise noted.) DIGITAL-TO-ANALOG GLITCH IMPULSE (VDD = +5V) CLOCK FEEDTHROUGH (VDD = +5V) MAX5711 toc22 MAX5711 toc23 VSCLK 2V/div VOUT 10mV/div VOUT 1mV/div CODE 1FF HEX TO 200 HEX RL = 5k CL = 200pF RL = 5k CL = 200pF 500ns/div 500ns/div Pin Description 6 PIN NAME 1 VDD 2 GND Ground 3 DIN Serial Data Input 4 SCLK Serial Clock Input 5 CS 6 OUT FUNCTION Power-Supply Input Active-Low Chip-Select Input DAC Output Voltage _______________________________________________________________________________________ 10-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 The MAX5711 voltage-output, 10-bit DAC, offers a full 10-bit performance in a small 6-pin SOT23 package. The SOT23 footprint is less than 9mm2. The MAX5711 has less than 1LSB differential nonlinearity error, ensuring monotonic performance. The device uses a simple 3-wire, SPI/QSPI/MICROWIRE and DSP-compatible serial interface that operates up to 20MHz. The MAX5711 incorporates three shutdown modes, making it ideal for low-power applications. Power-On Reset The MAX5711 has a POR circuit to set the DACs output to zero when VDD is first applied. This ensures that unwanted DAC output voltages will not occur immediately following a system startup, such as after a loss of power. Upon initial power-up, an internal power-on reset circuit ensures that all DAC registers are cleared, the DAC is powered-down, and its output is terminated to GND by a 100k resistor. An 8s recovery time after issuing a wake-up command is needed before writing to the DAC registers. Analog Section The MAX5711 consists of a resistor string, an output buffer, and a POR circuit. Monotonic digital-to-analog conversion is achieved using a resistor string architecture. Since VDD is the reference for the MAX5711, the accuracy of the DAC depends on the accuracy of VDD. The low bias current of the MAX5711 allows its power to be supplied by a voltage reference such as the MAX6030. The 10-bit DAC code is binary-unipolar with 1LSB = VDD/1024. Digital Section 3-Wire Serial Interface The MAX5711 digital interface is a standard 3-wire connection compatible with SPI/QSPI/MICROWIRE/DSP interfaces. The chip-select input (CS) frames the serial data loading at DIN. Immediately following CS high-tolow transition, the data is shifted synchronously and latched into the input register on the falling edge of the serial clock input (SCLK). After 16 bits have been loaded into the serial input register, the serial input register transfers its contents to the DAC latch. CS may then either be held low or brought high. CS must be brought high for a minimum of 80ns before the next write sequence, since a write sequence is initiated on a Output Buffer The DAC output buffer has a rail-to-rail output and is capable of driving a 5k resistive load in parallel with a 200pF capacitive load. With a capacitive load of 200pF, the output buffer slews 0.5V/s. With a 1/4FS to 3/4FS output transition, the amplifier output settles to 1/2LSB in less than 10s when loaded with 5k in parallel with 200pF. The buffer amplifier is stable with any combination of resistive loads greater than 5k and capacitive loads less than 200pF. tCH SCLK tCL tCSS tCSW tDH tCSH tDS CS C3 DIN SO Figure 1. Timing Diagram _______________________________________________________________________________________ 7 MAX5711 Program the input register bits to power-down the device. The DAC registers are preserved during powerdown and upon wake-up, the DAC output is restored to its pre-power-down voltage. Detailed Description MAX5711 10-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 Table 1. Serial Interface Mapping 16-BIT SERIAL WORD MSB LSB MODE OUTPUT 0 Set and Update DAC VOUT = VDD x CODE/1024 0 0 Wake-Up Current DAC setting (initially 0) X 0 1 Power-Down Floating X 1 0 Power-Down 1k to GND X 1 1 Power-Down 100k to GND C3 C2 C1 C0 D09 D08 D07 D06 D05 D04 D03 D02 D01 D00 S1 S0 0 0 0 0 10-Bit DAC Code 0 1 1 1 1 X X X X X X X X X X 1 1 1 1 X X X X X X X X X 1 1 1 1 X X X X X X X X X 1 1 1 1 X X X X X X X X X X = Don't Care falling edge of CS. Not keeping CS low during the first 15 SCLK cycles discards input data. The serial clock (SCLK) can idle either high or low between transitions. Figure 1 shows the complete 3-wire serial interface transmission. Table 1 lists serial-interface mapping. The first command after VDD is applied must be the wakeup command. IN OUT VDD MAX6050 MAX6030 MAX5711 GND Power-Down Modes The MAX5711 includes three software-controlled power-down modes that reduce the supply current to below 1A. In two of the three power-down modes, OUT is connected to GND through a resistor. Table 1 lists the three power-down modes of operation. When in power-down, the MAX5711 does not respond to the "set and update" command. Applications Information Device Powered by an External Reference The MAX5711 generates an output voltage proportional to VDD, coupling power-supply noise to the output. The circuit in Figure 2 rejects this power-supply noise by powering the device directly with a precision voltage reference, improving overall system accuracy. The MAX6030 (+3V, 75ppm) or the MAX6050 (+5V, 75ppm) precision voltage references are ideal choices due to the low-power requirements of the MAX5711. This solution is also useful when the required full-scale output voltage is less than the available supply voltages. Digital Inputs and Interface Logic GND Figure 2. MAX5711 Powered By Reference Schmitt-trigger buffers to accept slow-transition interfaces. This allows optocouplers to interface directly to the MAX5711 without additional external logic. The digital inputs are compatible with CMOS-logic levels. Power-Supply Bypassing and Layout Careful PC board layout is important for optimal system performance. Keep analog and digital signals separate to reduce noise injection and digital feedthrough. Use a ground plane to ensure that the ground return from GND to the supply ground is short and low impedance. Bypass VDD with a 0.1F capacitor to ground as close as possible to the device. Chip Information TRANSISTOR COUNT: 3856 PROCESS: BiCMOS The 3-wire digital interface for the MAX5711 is compatible with SPI, QSPI, MICROWIRE, and DSP. The three digital inputs (CS, DIN, and SCLK) load the digital input serially into the DAC. All of the digital inputs include 8 OUT _______________________________________________________________________________________ 10-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 6LSOT.EPS PACKAGE OUTLINE, SOT-23, 6L 21-0058 F 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 9 (c) 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX5711 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)