RT8452GQW - Richtek - Datasheet.Directory

RT8452

DS8452-03 May 2012 www.richtek.com

Ordering Information

High Voltage High Current LED Driver Controller for Buck

Boost or Buck-Boost Topology

Features

zHigh Voltage Capability : VIN Up to 36V, VOUT Up to

48V

zBuck, Boost or Buck-Boost Operation

zCurrent Mode PWM with 350kHz Switching

Frenquency

zEasy Dimming Control : Analog or Digital

Converting to Analog with One External Capacitor

zTrue PWM Dimming : External FET Driver is Build-

zProgrammable Soft Start to Avoid Inrush Current

zProgrammable Over Voltage Protection

zVIN Undervoltage Lockout and Thermal Shutdown

z16-Lead WQFN and SOP Packages.

zRoHS Compliant and Halogen Free

Pin Configurations

(TOP VIEW)

WQFN-16L 3x3

General Description

The RT8452 is a current mode PWM controller designed

to drive an external MOSFET for high current LED

applications. With a current sense amplifier threshold of

190mV, the LED current is programmable with one

external current sense resistor. With the maximum

operating input voltage of 36V and output voltage up to

48V, the RT8452 is ideal for Buck, Boost or Buck-Boost

operation.

With 350kHz operating frequency, the external inductor

and capacitors can be small while maintaining high

efficiency.

Dimming can be done by either analog or digital. A built-in

clamping comparator and filter allow easy low noise analog

dimming conversion from digital signal with only one

external capacitor. An unique True PWM dimming control

is made easy with MOSFET under LED string. A very high

dimming ratio can be achieved by adopting both analog/

digital dimming and True PWM dimming together.

The RT8452 is available in WQFN-16L 3x3 and SOP-16

packages.

Applications

zGeneral Industrial High Power LED Lighting

zDesk Lights and Room Lighting

zBuilding and Street Lighting

zIndustrial Display Backlight

SOP-16

ISW

PWMOUT

GBIAS

GATE

ACTL

DCTL

PWMDIM

ISN

ISP

GND

VCC

OVP

13141516

8765

GND

GBIAS

GATE

PWMOUT

ISW

PWMDIM

ISP

ISN

VC ACTL

DCTL

OVP

VCC

GND

RT8452

Package Type

S : SOP-16

QW : WQFN-16L 3x3 (W-Type)

Lead Plating System

G : Green (Halogen Free and Pb Free)

Note :

Richtek products are :

` RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

` Suitable for use in SnPb or Pb-free soldering processes.

RT8452

DS8452-03 May 2012www.richtek.com

Typical Application Circuit

Figure 1. Analog Dimming in Boost Configuration

Figure 2. PWM to Analog Dimming in Boost Configuration

Marking Information

F4=YM

DNN

RT8452

GSYMDNN

RT8452GS : Product Number

YMDNN : Date Code

F4= : Product Code

YMDNN : Date Code

RT8452GS RT8452GQW

RT8452

ISP

ISN

VCC

VIN

RSENSE

47µH

COUT

1µF

10µF

RVC

0.1µF

3.3nF

10k

GND

OVP

VOUT

0.09

GATE

ISW

DCTL

Analog

Dimming 10

ACTL

PWMOUT

PWMDIM

16, 17 (Exposed Pad)

GBIAS

RSW

VOUT

CIN

CVC CSS

1µF

14 LEDs

0.05

48V (Max.)

4.5V to 36V

RT8452

ISP

ISN

VCC

VIN

GND

OVP

GATE

ISW

DCTL

ACTL

PWMOUT

PWMDIM

16, 17 (Exposed Pad)

GBIAS

VOUT

PWM

Dimming control

47µH

COUT

10µF

RVC

0.1µF

3.3nF

10k

VOUT

0.09

RSW

CIN

CVC CSS

1µF

14 LEDs

0.05

1µF

0.47µF

48V (Max.)

4.5V to 36V

RSENSE

RT8452

DS8452-03 May 2012 www.richtek.com

Figure 3. True PWM Dimming in Boost Configuration

Figure 4. Analog Dimming in Buck-Boost Configuration

Figure 5. Analog Dimming in Buck Configuration

RT8452

ISP

ISN

VCC

VIN

GND

OVP

GATE

ISW

DCTL

ACTL

PWMOUT

PWMDIM

16, 17 (Exposed Pad)

GBIAS

1VOUT

L1 RSENSE

47µH

COUT

1µF

10µF

RVC

0.1µF

3.3nF

10k

VOUT

0.09

RSW

CIN

CVC CSS

1µF

14 LEDs

0.05

48V (Max.)

4.5V to 36V

RT8452

ISP

ISN

VCC

GND

OVP

GATE

ISW

DCTL

Analog

Dimming 10

ACTL

PWMOUT

PWMDIM

16, 17 (Exposed Pad)

GBIAS

1VOUT

VIN

RSENS

47µH

COUT

1µF

10µF

RVC

0.1µF

3.3nF

10k

VOUT

0.09

RSW

CIN

CVC

CSS

1µF

10 LEDs

0.05

48V (Max.)

4.5V to 36V

RT8452

ISW

GATE

VCC

GND

OVP

ISP

ISN

DCTL

Analog

Dimming 10

ACTL

PWMOUT

PWMDIM

16, 17 (Exposed Pad)

GBIAS

VIN

RSENSE

47µH

COUT

1µF

10µF

RVC

0.1µF

3.3nF

10k

8 LEDs

RSW

CIN

CVC

CSS

1µF

0.05

0.09

RT8452

DS8452-03 May 2012www.richtek.com

Functional Pin Description

Pin No.

SOP-16 WQFN-16L 3x3

Pin Na me Pin Function

1 1 GBIAS Internal Gate Driver Bias. A good bypass capacitor is required.

2 2 GATE External MOSFET Switch Gate Driver Output.

3 3 PWMOUT Output Pin for the PWM Dimming FET Driver.

4 4 ISW

External MOSFET Switch Current Sense. Connect the current sense

resistor between external N-MOSFET switch and the ground.

5 5 PWMDIM Control Input Pin for the PWM Dimming FET Driver.

6 6 ISP LED Current Sense Amplifier Positive Input.

7 7 ISN

LED Current Sense Amplifier Negative Input. Voltage threshold

between ISP and ISN is 190mV.

8 8 VC PWM Control Loop Compensation.

9 9 ACTL

Analog Dimming Control. The effective programming voltage range

of the pin is between 0.2V and 1.2V.

10 10 DCTL

By adding a 0.47μF filtering capacitor on ACTL pin, the PWM

dimming signal on DCTL pin can be averaged and converted into

analog dimming signal on the ACTL pin.

11 11 SS Soft-Start. A capacitor of at least 10nF is required for proper soft start.

12 12 NC No Internal Connection.

13 13 EN

Chip Enable (Active High). When this pin voltage is low, the chip is in

shutdown mode.

14 14 OVP

Over Voltage Protection. The PWM converter turns off when

the voltage of the pin goes to higher than 1.2V.

15 15 VCC

Power Supply Pin of the Chip. For good bypass, a low ESR capacitor

is required.

16 16

17 (Exposed Pad) GND Ground. The exposed pad must be soldered to a large PCB and

connected to GND for maximum power dissipation.

RT8452

DS8452-03 May 2012 www.richtek.com

Function Block Diagram

Figure 6

VACTL (V)

VISP – VISN

(mV)

0.2 1.2

190

OSC

4.5V

1.2V

1.4V

Shutdown

6µA

ISP

ISN

DCTL

ACTL

VCC

GND

OVP

1.2V

GBIAS

100mV

5.7V

VOC

100k

ISW

PWMOUT

GBIAS

GATE

PWMDIM

RT8452

DS8452-03 May 2012www.richtek.com

Electrical Characteristics

Parameter Symbol Test Conditions Min Typ Max Unit

Overall

Supply Current IVCC VC ≤ 0.4V (Switching off) -- 6 7.2 mA

Shutdown Current ISHDN V

EN ≤ 0.7V -- 12 -- μA

Logic-High VIH 2 -- --

EN Threshold

Voltage Logic-Low VIL -- -- 0.5

EN Input Current VEN ≤ 3V -- -- 1.2 μA

Current Sense Amplifier

Input Threshold (VISP − VISN) 12V ≤ common mode ≤ 36V 180 190 200 mV

ISP / ISN Input Current IISP / IISN 4.5V ≤ VISP = VISN ≤ 48V -- 140 -- μA

VC Output Current IVC VISP − VISN = 190mV,

0.5V ≤ VC ≤ 2.4V -- ±20 -- μA

VC Threshold for PWM Switch

Off -- 0.7 -- V

Recommended Operating Conditions (Note 4)

zSupply Input Voltage Range, VCC------------------------------------------------------------------------------------- 4.5V to 36V

zJunction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C

Absolute Maximum Ratings (Note 1)

zSupply Input Voltage, VCC ---------------------------------------------------------------------------------------------- 38V

zGBIAS, GATE, PWMDIM, PWMOUT -------------------------------------------------------------------------------- 10V

zISW --------------------------------------------------------------------------------------------------------------------------- 1V

zISP, ISN ---------------------------------------------------------------------------------------------------------------------- 54V

zDCTL, ACTL, OVP Pin Voltage ---------------------------------------------------------------------------------------- 8V (Note 6)

zEN Pin Voltage ------------------------------------------------------------------------------------------------------------- 20V

zPower Dissipation, PD @ TA = 25°C

SOP-16 ---------------------------------------------------------------------------------------------------------------------- 1.0W

WQFN-16L 3x3 ------------------------------------------------------------------------------------------------------------ 1.4W

zPackage Thermal Resistance (Note 2)

SOP-16, θJA ----------------------------------------------------------------------------------------------------------------- 95°C/W

WQFN-16L 3x3, θJA ------------------------------------------------------------------------------------------------------- 68°C/W

WQFN-16L 3x3, θJC ------------------------------------------------------------------------------------------------------ 7.5°C/W

zJunction Temperature ----------------------------------------------------------------------------------------------------- 150°C

zLead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------- 260°C

zStorage Temperature Range -------------------------------------------------------------------------------------------- −65°C to 150°C

zESD Susceptibility (Note 3)

HBM (Human Body Model) ---------------------------------------------------------------------------------------------- 2kV

MM (Machine Model) ----------------------------------------------------------------------------------------------------- 200V

(VCC = 24V, No Load on any Output, TA = 25°C, unless otherwise specified)

RT8452

DS8452-03 May 2012 www.richtek.com

Parameter Symbol Test Conditions Min Typ Max Unit

LED Dimm ing

VACTL = 1.2V -- 1 --

Analog Dimming ACTL Pin

Input Current IACTL

VACTL = 0.2V -- 10 --

μA

LED Current Off Threshold at

ACTL VACTL_Off -- 0.3 -- V

DCTL Input Current IDCTL 0.3V ≤ VDCTL ≤ 6V -- -- 0.5 μA

PWM Control

Switching Frequency fSW 280 350 420 kHz

Minimum Off Time

(Note 5) -- 250 -- ns

Switch Gate Driver

GBIAS Voltage VGBIAS I

GBIAS = 20mA -- 8.5 -- V

IGate = −50mA -- 7.2 --

Gate Voltage High VGate_H IGate = −100μA -- 7.8 --

IGate = 50mA -- 0.25 --

Gate Voltage Low VGate_L IGate = 100μA -- 0.1 --

GATE Drive Rise and Fall Time 1nF Load at GATE -- 15 -- ns

PWM Switch Current Limit

Threshold ISW_ LIM -- 110 -- mV

PWM Dimming Gate Driver

Logic-High VPWMDIM_H 2 -- --

PWMDIM

Threshold Voltage Logic-Low VPWMDIM_L -- -- 0.5 V

VPWMOUT_H I

PWMOUT = 1mA -- 7.5 --

PWMOUT Output Voltage VPWMOUT_L I

PWMOUT = −100μA -- 0.45 --

PWMOUT Drive Rise and Fall

Time 1nF Load at PWMOUT -- 40 -- ns

OVP and Soft Start

OVP Threshold VOVP_th -- 1.18 -- V

OVP Input Current IOVP 0.7V ≤ VOVP ≤ 1.5V -- -- 0.1 μA

Soft-Start Pin C urrent ISS V

SS ≤ 2V -- 6 -- μA

Thermal Shutdown Protection TSD -- 145 --

Thermal Shutdown Hysteresis ΔTSD -- 10 -- °C

RT8452

DS8452-03 May 2012www.richtek.com

Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are

stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the

operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect

device reliability.

Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is

measured at the exposed pad of the package.

Note 3. Devices are ESD sensitive. Handling precaution is recommended.

Note 4. The device is not guaranteed to function outside its operating conditions.

Note 5. When the natural maximum duty cycle of 350kHz switching frequency is reached, the switching cycle will be skipped (not

reset) as the operating condition requires to effectively stretch and achieve higher on cycle than the natural maximum

duty cycle set by the 350kHz switching frequency.

Note 6. If connected with a 20kΩ serial resistor, ACTL and DCTL can go up to 36V.

RT8452

DS8452-03 May 2012 www.richtek.com

Typical Operating Characteristics

Supply Current vs. Input Voltage

4 8 12 16 20 24 28 32 36

Input Voltage (V)

Supply Current (mA

)

Efficiency vs. Input Voltage

100

9 12151821242730

Input Voltage (V)

Efficiency (%)

Boost Application, VOUT = 48V, IOUT = 1A

Efficiency vs. Output Current

100

0 200 400 600 800 1000 1200

Output Current(mA)

Efficiency (%)

Boost Application, VIN = 24V, VOUT = 48V

Swit ching Frequency vs. Input Voltage

300

320

340

360

380

400

4 8 12 16 20 24 28 32 36

Input Voltage (V)

Switching Frequency (kHz

)

Shutdown Current vs. Input Voltage

4 7 10 13 16 19 22 25 28 31 34 37 40

Input Voltage (V)

Shutdown Current (μA

)

Switching Frequency vs. Tem pe rature

300

320

340

360

380

400

-50-25 0 25 50 75100125

Temperature (°C)

Switching Frequency (kHz

)

VIN = 24V

RT8452

DS8452-03 May 2012www.richtek.com

OVP vs. Input Voltage

1.15

1.16

1.17

1.18

1.19

1.20

1.21

4 8 12 16 20 24 28 32 36

Input Voltage (V)

OVP (V)

OVP_H

OVP_L

LED Curre nt vs. DCTL Dut y

0.0

0.5

1.0

1.5

2.0

2.5

0 102030405060708090100

DCTL Duty (%)

LED Current (A)

DCTL high level is 3V and low level is 0V,

DCTL = 10kHz, VIN = 24V, RSENSE = 90mΩ

OVP vs. Tempe rature

1.15

1.16

1.17

1.18

1.19

1.20

1.21

-40 -25 -10 5 20 35 50 65 80 95 110 125

Temperature (°C)

OVP (V)

OVP_H

OVP_L

VIN = 24V

Power On from EN

Time (250μs/Div)

(2V/Div)

VGate

(10V/Div)

IOUT

(200mA/Div)

VOUT

(20V/Div)

Boost Application, VIN = 24V, VOUT = 48V

VIN = 24V

Power Off from EN

Time (100ms/Div)

(2V/Div)

VGate

(10V/Div)

IOUT

(500mA/Div)

VOUT

(50V/Div)

Boost Application, VIN = 24V, VOUT = 48V

LED Current vs. ACTL

0.0

0.5

1.0

1.5

2.0

2.5

0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4

ACTL (V)

LED Current (A)

VIN = 24V, RSENSE = 90mΩ

RT8452

DS8452-03 May 2012 www.richtek.com

Applications Information

The RT8452 is a current mode PWM controller designed

to drive an external MOSFET for high current LED

applications. The LED current can be programmed by an

external resistor. The input voltage range of the RT8452

can be up to 36V and the output voltage can be up to 48V.

The RT8452 provides analog and PWM dimming to achieve

LED current control.

SS SS 2.4V

TC 6μ

=×

A typical value for the soft-start capacitor is 0.1μF. The

soft-start capacitor is discharged when EN/UVLO falls

below its threshold, during an over-temperature event or

during an GBIAS under-voltage event.

Where,

RSENSE is the resister between ISP and ISN.

When the voltage of ACTL is higher than 1.2V, the LED

current is regulated to :

LED(MAX)

SENSE

190mV

GBIAS Regulator a nd Bypass Ca pa citor

The GBIAS pin requires a capacitor for stable operation

and to store the charge for the large GATE switching

currents. Choose a 10V rated low ESR, X7R or X5R

ceramic capacitor for best performance. The value of a

1μF capacitor will be adequate for many applications.

Place the capacitor close to the IC to minimize the trace

length to the GBIAS pin and also to the IC ground. An

internal current limit on the GBIAS output protects the

RT8452 from excessive on-chip power dissipation.

The GBIAS pin has its own under-voltage disable (UVLO)

set to 4.3V(typical) to protect the external FETs from

excessive power dissipation caused by not being fully

enhanced. If the input voltage, VIN, will not exceed 8V,

then the GBIAS pin should be connected to the input

supply. Be aware if GBIAS supply is used to drive extra

circuits besides RT8452, typically the extra GBIAS load

should be limited to less than 10mA.

Loop Compensation

The RT8452 uses an internal error amplifier whose

compensation pin (VC) allowing the loop response

optimized for specific application. The external inductor,

output capacitor and the compensation resistor and

capacitor determine the loop stability. The inductor and

output capacitor are chosen based on performance, size

and cost. The compensation resistor and capacitor at VC

are selected to optimize control loop response and

stability. For typical LED applications, a 3.3nF

compensation capacitor at VC is adequate, and a series

resistor should always be used to increase the slew rate

on the VC pin to maintain tighter regulation of LED current

during fast transients on the input supply to the converter

an external resistor in series with a capacitor is connected

Soft-Start

The soft-start of the RT8452 can be achieved by connecting

a capacitor from SS pin to GND. The built-in soft-start

circuit reduces the start-up current spike and output

voltage overshoot. The soft-start time is determined by

the external capacitor charged by an internal 6μA constant

charging current. The SS pin directly limits the rate of

voltage rise on the VC pin, which in turn limits the peak

switch current.

The soft-start interval is set by the soft-start capacitor

selection according to the equation :

LED current Setting

The LED current is programmed by placing an appropriate

value current sense resistor between the ISP and ISN pins.

Typically, sensing of the current should be done at the

top of the LED string. The ACTL pin should be tied to a

voltage higher than 1.2V to get the full-scale 190mV

(typical) threshold across the sense resistor. The ACTL

pin can also be used to dim the LED current to zero,

although relative accuracy decreases with the decreasing

voltage sense threshold. When the ACTL pin voltage is

less than 1.2V, the LED current is :

×0.2 0.19ACTL

LED

SENSE

(V - )

I= R

from the VC pin to GND to provide a pole and a zero for

proper loop compensation. The typical compensation

forthe RT8452 is 10k and 3.3nF.

RT8452

DS8452-03 May 2012www.richtek.com

The ACTL pin can also be used in conjunction with a

thermistor to provide over temperature protection for the

LED load, or with a resistor divider to VIN to reduce output

power and switching current when VIN is low. The presence

of a time varying differential voltage signal (ripple) across

ISP and ISN at the switching frequency is expected.

The amplitude of this signal is increased by high LED load

current, low switching frequency and/or a smaller value

output filter capacitor. The compensation capacitor on the

VC pin filters the signal so the average difference between

ISP and ISN is regulated on the user-programmed value.

Dimming Control

For LED applications where a wide dimming range is

required, two competing methods are available : analog/

digital dimming and True PWM dimming. The easiest

method is to simply vary the DC current through the LED

by analog dimming.

The other better dimming method is the True PWM

dimming, which switches the LED on and off by different

duty cycle to control the average LED current.

The True PWM dimming offers several advantages over

analog dimming and is much preferred by LED manu-

facturers. One advantage is the chromaticity of the LEDs

remains unchanged in this scheme since the LED current

is either zero or at the programmed current. Another profit

of True PWM dimming over analog/digital dimming is that

a wider dimming range is possible. True PWM method

modulate the current source between zero and full current

to achieve a precisely programmed average current. For

best current accuracy, the minimum True PWM low or

high time should be at least 18μS.

The maximum True PWM period is determined by the

system and suggested shorter than 9ms. The maximum

True PWM dimming ratio (PWMRATIO) can be calculated

from the maximum True PWM period (tMAX) and the

minimum True PWM pulse width (tMIN) as follows :

=MAX

RATIO

MIN

PWM t

tMAX = 9ms, tMIN = 18μs (fSW = 350kHz)

PWMRATIO = 9ms / 12μs = 500 : 1

⎛⎞

=×+

⎜⎟

⎝⎠

OUT, OVP R1

V1.181

Where,

R1 and R2 are the voltage divider from Vout to GND with

the divider center node connected to OVP pin.

ISW Sense Resistor Selection

The resistor, RSW, between the source of the external

N-MOSFET and GND should be selected to provide

adequate switch current to drive the application without

exceeding the 110mV (typical) current limit threshold on

the ISW pin of RT8452. For real applications, select a

resistor that gives a switch current at least 30% greater

than the required LED current.

For Buck application, select a resistor according to :

SW, Buck-Boost

IN OUT OUT

V0.08V

R(V V ) I

⎛⎞

=⎜⎟

+×

⎝⎠

For Boost application, select a resistor according to :

SW, Boost

OUT OUT

V0.08V

RVI

⎛⎞

=⎜⎟

⎝⎠

For Buck-Boost application, select a resistor according

to :

⎛⎞

=⎜⎟

⎝⎠

SW, Buck

OUT

0.08V

The RT8452 features both analog and digital dimming

control. Analog dimming is linearly controlled by an

external voltage (0.2V < VACTL < 1.2V). With an on chip

output clamping amplifier and a resistor, digital dimming

signal fed at DCTL pin can be easily low-pass filtered to

an analog dimming signal with one external capacitor from

ACTL pin to GND for noise-free digital dimming. A high

contrast ratio digital dimming can also be achieved by

driving ACTL pin with a digital signal from 100Hz to10kHz.

Output Over Voltage Setting

The RT8452 is equipped with over voltage protection (OVP)

function. When the voltage at OVP pin exceeds a

threshold of approximately1.18V, the power switch is

turned off. The power switch can be turned on again once

the voltage at OVP pin drops below 1.18V. For the Boost

and Buck-Boost application, the output voltage could be

clamped at a certain voltage level. The OVP voltage can

be set by the following equation :

RT8452

DS8452-03 May 2012 www.richtek.com

(

)

SW IN OUT IN

Boost

OUT SW

RVV V

L0.02 V f

×× −

=××

()

SW IN OUT

Buck Boost

IN OUT SW

RVV

L0.02 V V f

−××

=×+ ×

For Buck-Boost application

Schottky Diode Selection

The Schottky diode, with their low forward voltage drop

and fast switching speed, is necessary for the RT8452

applications. In addition, power dissipation, reverse voltage

rating and pulsating peak current are the important

parameters for the Schottky diode selection. Choose a

suitable Schottky diode whose reverse voltage rating is

greater than maximum output voltage. The diode’s

average current rating must exceed the average output

current. The diode conducts current only when the power

switch is turned off (typically less than 50% duty cycle).

If using the PWM feature for dimming, it is important to

consider diode leakage, which increases with the

temperature, from the output during the PWM low interval.

Therefore, choose the Schottky diode with sufficiently low

leakage current.

Capacitor Selection

The input capacitor reduces current spikes from the input

supply and minimizes noise injection to the converter. For

most the RT8452 applications, a 10μF ceramic capacitor

is sufficient. A value higher or lower may be used

depending on the noise level from the input supply and

the input current to the converter.

In Boost application, the output capacitor is typically a

ceramic capacitor and is selected based on the output

voltage ripple requirements. The minimum value of the

output capacitor COUT is approximately given by the

following equation :

=××

OUT OUT

OUT

IN RIPPLE SW

CVV f

For Boost application

()

××−

=××

SW OUT IN OUT

Buck

IN SW

RV VV

L0.02 V f

The placement of RSW should be close to the source of

the N-MOSFET and GND of the RT8452. The ISW pin

input to RT8452 should be a Kelvin connection to the

positive terminal of RSW.

Over Temperature Protection

The RT8452 has over temperature protection (OTP)

function to prevent the excessive power dissipation from

overheating. The OTP function will shut down switching

operation when the die junction temperature exceeds

150°C. The chip will automatically start to switch again

when the die junction temperature cools off.

Inductor Selection

The inductor used with the RT8452 should have a

saturation current rating appropriate to the maximum

switch current selected with the RSW resistor. Choose

an inductor value based on operating frequency, input and

output voltage to provide a current mode ramp on ISW pin

during the switch on-time of approximately 20mV

magnitude. The following equations are useful to estimate

the inductor value.

For Buck application :

Power MOSFET Selection

For applications operating at high input or output voltages,

the power N-MOS FET switch is typically chosen for drain

voltage VDS rating and low gate charge. Consideration of

switch on-resistance, RDS(ON), is usually secondary

because switching losses dominate power loss. The

GBIAS regulator on the RT8452 has a fixed current limit

to protect the IC from excessive power dissipation at high

VIN, so the N-MOSFET should be chosen so that the

product of Qg at 5V and switching frequency does not

exceed the GBIAS current limit.

For LED applications, the equivalent resistance of the LED

is typically low and the output filter capacitor should be

sized to attenuate the current ripple. Use of X7R type

ceramic capacitors is recommended. Lower operating

frequencies will require proportionately higher capacitor

values.

Thermal Considerations

For continuous operation, do not exceed absolute

maximum operation junction temperature. The maximum

power dissipation depends on the thermal resistance of

IC package, PCB layout, the rate of surroundings airflow

RT8452

DS8452-03 May 2012www.richtek.com

The maximum power dissipation can be calculated by

following formula :

PD(MAX) = ( TJ(MAX) − TA ) / θJA

Where TJ(MAX) is the maximum operation junction

temperature, TA is the ambient temperature and the θJA is

the junction to ambient thermal resistance.

For recommended operating conditions specification, the

maximum junction temperature is 125°C. The junction to

ambient thermal resistance θJA is layout dependent. For

WQFN-16L 3x3 packages, the thermal resistance θJA is

68°C/W on the standard JEDEC 51-7 four layers thermal

test board. For SOP-16 packages, the thermal resistance

θJA is 95°C/W on the standard JEDEC 51-7 four layers

thermal test board. The maximum power dissipation at

TA = 25°C can be calculated by following formula :

PD(MAX) = (125°C − 25°C) / (68°C/W) =1.471W for

WQFN-16L 3x3 packages

PD(MAX) = (125°C − 25°C) / (95°C/W) =1.053W for

SOP-16 packages

The maximum power dissipation depends on operating

ambient temperature for fixed TJ(MAX) and thermal

resistance θJA. The Figure 6 of derating curves allows the

designer to see the effect of rising ambient temperature

on the maximum power allowed.

Figure 7. Derating Curve of Maximum Power Dissipation

Layout Consideration

PCB layout is very important to design power switching

converter circuits. Some recommended layout guide lines

are suggested as follows :

`The power components L1, D1, CIN, M1 and COUT must

be placed as close to each other as possible to reduce

the ac current loop area. The PCB trace between power

components must be as short and wide as possible

due to large current flow through these traces during

operation.

`The input capacitors CVCC must be placed as close to

VCC pin as possible.

`Place the compensation components to VC pin as close

as possible to avoid noise pick up.

`Connect GND pin ane Exposed Pad to a large ground

plane for maximum power dissipation and noise

reduction.

Figure 8. PCB Layout Guide

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1.1

1.2

1.3

1.4

1.5

1.6

0255075100125

Ambient Temperature (°C)

Maximum Power Dissipation (W)

SOP-16

WQFN-16L 3x3

Four-Layer PCB

Place these components as close as possible

Locate input

capacitor as

close VCC as

possible

GBIAS

GATE

PWMOUT

ISW

PWMDIM

ISP

ISN

VC ACTL

DCTL

OVP

VCC

GND

CVCC

CIN

RSW

COUT

D1 L1

GND

RVC

CVC

CSS

GND

VIN

RSENS

Locate the compensation components to

VC pin as close as possible

RT8452

DS8452-03 May 2012 www.richtek.com

Outline Dimension

Dim ensions In M illimet ers Dimensions In Inches

Symbol Min Max Min Max

A 9.804 10.008 0.386 0.394

B 3.810 3.988 0.150 0.157

C 1.346 1.753 0.053 0.069

D 0.330 0.508 0.013 0.020

F 1.194 1.346 0.047 0.053

H 0.178 0.254 0.007 0.010

I 0.102 0.254 0.004 0.010

J 5.791 6.198 0.228 0.244

M 0.406 1.270 0.016 0.050

16–Lead SOP Plastic Package

RT8452

DS8452-03 May 2012www.richtek.com

Richtek Technology Corporation

5F, No. 20, Taiyuen Street, Chupei City

Hsinchu, Taiwan, R.O.C.

Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should

obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot

assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be

accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third

parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

A1 A3

SEE DETAIL A

Note : The configuration of the Pin #1 identifier is optional,

but must be located within the zone indicated.

DETAIL A

Pin #1 ID and Tie Bar Mark Options

Dim ensions In M illimet ers Dimensions In Inches

Symbol Min Max Min Max

A 0.700 0.800 0.028 0.031

A1 0.000 0.050 0.000 0.002

A3 0.175 0.250 0.007 0.010

b 0.180 0.300 0.007 0.012

D 2.950 3.050 0.116 0.120

D2 1.300 1.750 0.051 0.069

E 2.950 3.050 0.116 0.120

E2 1.300 1.750 0.051 0.069

e 0.500 0.020

L 0.350 0.450

0.014 0.018

W-Type 16L QFN 3x3 Package