IRF840S, SiHF840S
www.vishay.com Vishay Siliconix
S16-0754-Rev. D, 02-May-16 1Document Number: 91071
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Power MOSFET
FEATURES
• Surface mount
• Available in tape and reel
• Dynamic dV/dt rating
• Repetitive avalanche rated
• Fast switching
• Ease of paralleling
• Simple drive requirement
• Material categorization: for definitions of
compliance please see www.vishay.com/doc?99912
Note
*
This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non-RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details.
DESCRIPTION
Third generation power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The D2PAK (TO-263) is a surface mount power package
capable of accommodating die size up to HEX-4. It provides
the highest power capability and the lowest possible
on-resistance in any existing surface mount package. The
D2PAK (TO-263) is suitable for high current applications
because of its low internal connection resistance and can
dissipate up to 2.0 W in a typical surface mount application.
Note
a. See device orientation.
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 50 V, starting TJ = 25 °C, L = 14 mH, Rg = 25 , IAS = 8.0 A (see fig. 12).
c. ISD 8.0 A, dI/dt 100 A/μs, VDD VDS, TJ 150 °C.
d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).
PRODUCT SUMMARY
VDS (V) 500
RDS(on) ()V
GS = 10 V 0.85
Qg max. (nC) 63
Qgs (nC) 9.3
Qgd (nC) 32
Configuration Single
N-Channel MOSFET
G
D
S
D
2
PAK (TO-263)
GD
S
Available
Available
ORDERING INFORMATION
Package D2PAK (TO-263) D2PAK (TO-263) D2PAK (TO-263)
Lead (Pb)-free and Halogen-free SiHF840S-GE3 SiHF840STRL-GE3 a SiHF840STRR-GE3 a
Lead (Pb)-free IRF840SPbF IRF840STRLPbF a IRF840STRRPbF a
SiHF840S-E3 SiHF840STL-E3 a SiHF840STR-E3 a
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage VDS 500 V
Gate-Source Voltage VGS ± 20
Continuous Drain Current VGS at 10 V TC = 25 °C ID
8.0
ATC = 100 °C 5.1
Pulsed Drain Current aIDM 32
Linear Derating Factor 1.0 W/°C
Linear Derating Factor (PCB mount) e 0.025
Single Pulse Avalanche Energy bEAS 510 mJ
Avalanche Current aIAR 8.0 A
Repetitive Avalanche Energy aEAR 13 mJ
Maximum Power Dissipation TC = 25 °C PD
125 W
Maximum Power Dissipation (PCB mount) e TA = 25 °C 3.1
Peak Diode Recovery dV/dt cdV/dt 3.5 V/ns
Operating Junction and Storage Temperature Range TJ, Tstg -55 to +150 °C
Soldering Recommendations (Peak temperature) dfor 10 s 300
IRF840S, SiHF840S
www.vishay.com Vishay Siliconix
S16-0754-Rev. D, 02-May-16 2Document Number: 91071
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width 300 μs; duty cycle 2 %.
THERMAL RESISTANCE RATINGS
PARAMETER SYMBOL TYP. MAX. UNIT
Maximum Junction-to-Ambient RthJA -62
°C/W
Maximum Junction-to-Ambient
(PCB mount) a RthJA -40
Maximum Junction-to-Case (Drain) RthJC -1.0
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage VDS VGS = 0, ID = 250 μA 500 - - V
VDS Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.78 - V/°C
Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V
Gate-Source Leakage IGSS V
GS = ± 20 V - - ± 100 nA
Zero Gate Voltage Drain Current IDSS
VDS = 500 V, VGS = 0 V - - 25 μA
VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 250
Drain-Source On-State Resistance RDS(on) V
GS = 10 V ID = 4.8 A b - - 0.85
Forward Transconductance gfs VDS = 50 V, ID = 4.8 A b 4.9 - - S
Dynamic
Input Capacitance Ciss VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
- 1300 -
pFOutput Capacitance Coss - 310 -
Reverse Transfer Capacitance Crss - 120 -
Total Gate Charge Qg
VGS = 10 V ID = 8.0 A, VDS = 400 V,
see fig. 6 and 13 b
--63
nC Gate-Source Charge Qgs --9.3
Gate-Drain Charge Qgd --32
Turn-On Delay Time td(on)
VDD = 250 V, ID = 8.0 A,
Rg = 9.1 , RD = 31 , see fig. 10b
-14-
ns
Rise Time tr -23-
Turn-Off Delay Time td(off) -49-
Fall Time tf -20-
Internal Drain Inductance LD Between lead,
6 mm (0.25") from
package and center of
die contact
-4.5-
nH
Internal Source Inductance LS-7.5-
Gate Input Resistance Rgf = 1 MHz, open drain 0.6 - 2.8
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current ISMOSFET symbol
showing the
integral reverse
p - n junction diode
--8.0
A
Pulsed Diode Forward Current a ISM --32
Body Diode Voltage VSD TJ = 25 °C, IS = 8.0 A, VGS = 0 V b --2.0V
Body Diode Reverse Recovery Time trr TJ = 25 °C, IF = 8.0 A, dI/dt = 100 A/μs b - 460 970 ns
Body Diode Reverse Recovery Charge Qrr -4.28.9μC
Forward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
D
S
G
S
D
G
IRF840S, SiHF840S
www.vishay.com Vishay Siliconix
S16-0754-Rev. D, 02-May-16 3Document Number: 91071
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
91071_01 VDS, Drain-to-Source Voltage (V)
ID, Drain Current (A)
101
100
100101
Bottom
To p
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
4.5 V
20 µs Pulse Width
TC = 25 °C
4.5 V
91071_02
101
100
100101
ID, Drain Current (A)
4.5 V
Bottom
To p
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
4.5 V
20 µs Pulse Width
TC = 150 °C
VDS, Drain-to-Source Voltage (V)
91071_03
25 °C
150 °C
20 µs Pulse Width
VDS = 50 V
101
100
ID, Drain Current (A)
VGS, Gate-to-Source Voltage (V)
5678910
4
91071_04
3.0
0.0
0.5
1.0
1.5
2.0
2.5
- 60 - 40 - 20 0 20 40 60 80 100 120 140 160
TJ, Junction Temperature (°C)
RDS(on), Drain-to-Source On Resistance
(Normalized)
ID = 8.0 A
VGS = 10 V
91071_06 QG, Total Gate Charge (nC)
VGS, Gate-to-Source Voltage (V)
20
16
12
8
0
4
015 75
6045
30
I
D
= 8.0 A
For test circuit
see figure 13
V
DS
= 250 V
V
DS
= 100 V
V
DS
= 400 V
IRF840S, SiHF840S
www.vishay.com Vishay Siliconix
S16-0754-Rev. D, 02-May-16 4Document Number: 91071
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10a - Switching Time Test Circuit
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
91071_07
101
100
VSD, Source-to-Drain Voltage (V)
ISD, Reverse Drain Current (A)
0.4 1.00.80.6
25 °C
150 °C
V
GS
= 0 V
1.4
1.2
91071_08
10 µs
100 µs
1 ms
10 ms
TC = 25 °C
TJ = 150 °C
Single Pulse
VDS, Drain-to-Source Voltage (V)
ID, Drain Current (A)
102
0.1
2
5
2
1
5
10
2
5
25
125
10 25
10225
10325
104
0.1
Operation in this area limited
by RDS(on)
91071_09
ID, Drain Current (A)
TC, Case Temperature (°C)
0.0
2.0
4.0
6.0
8.0
25 1501251007550
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
RD
VGS
Rg
D.U.T.
10 V
+
-
VDS
VDD
VDS
90 %
10 %
VGS
td(on) trtd(off) tf
Single Pulse
(Thermal Response)
PDM
t1
t2
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC
91071_11
t
1
, Rectangular Pulse Duration (s)
Thermal Response (Z
thJC
)
10-5 10-4 10-3 10-2 0.1 1 10 102
10
1
0.1
10-3
10-2
0.2
0.05
0.02
0.01
0.1
D = 0.5
IRF840S, SiHF840S
www.vishay.com Vishay Siliconix
S16-0754-Rev. D, 02-May-16 5Document Number: 91071
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit
Rg
IAS
0.01 Ω
tp
D.U.T.
L
VDS
+
-VDD
10 V
Vary tp to obtain
required IAS
I
AS
V
DS
V
DD
V
DS
t
p
91071_12c
Bottom
To p
ID
3.6 A
5.1 A
8.0 A
VDD = 50 V
1200
0
200
400
600
800
1000
25 150
125
10075
50
Starting T
J
, Junction Temperature (°C)
E
AS
, Single Pulse Energy (mJ)
QGS QGD
QG
V
G
Charge
10 V
D.U.T.
3 mA
VGS
VDS
IGID
0.3 µF
0.2 µF
50 kΩ
12 V
Current regulator
Current sampling resistors
Same type as D.U.T.
+
-
IRF840S, SiHF840S
www.vishay.com Vishay Siliconix
S16-0754-Rev. D, 02-May-16 6Document Number: 91071
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91071.
P.W. Period
dI/dt
Diode recovery
dV/dt
Ripple ≤ 5 %
Body diode forward drop
Re-applied
voltage
Reverse
recovery
current
Body diode forward
current
VGS = 10 Va
ISD
Driver gate drive
D.U.T. lSD waveform
D.U.T. VDS waveform
Inductor current
D = P.W.
Period
+
-
+
+
+
-
-
-
Peak Diode Recovery dV/dt Test Circuit
VDD
• dV/dt controlled by Rg
• Driver same type as D.U.T.
• ISD controlled by duty factor “D”
• D.U.T. - device under test
D.U.T. Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
Rg
Note
a. VGS = 5 V for logic level devices
VDD
Document Number: 91364 www.vishay.com
Revision: 15-Sep-08 1
Package Information
Vishay Siliconix
TO-263AB (HIGH VOLTAGE)
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions are shown in millimeters (inches).
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the
outmost extremes of the plastic body at datum A.
4. Thermal PAD contour optional within dimension E, L1, D1 and E1.
5. Dimension b1 and c1 apply to base metal only.
6. Datum A and B to be determined at datum plane H.
7. Outline conforms to JEDEC outline to TO-263AB.
5
4
13
L1
L2
D
BB
E
H
B
A
Detail A
A
A
c
c2
A
2 x e
2 x b2
2 x b
0.010 A B
MM ± 0.004 B
M
Base
metal
Plating b1, b3
(b, b2)
c1
(c)
Section B - B and C - C
Scale: none
Lead tip
4
34
(Datum A)
2CC
BB
5
5
View A - A
E1
D1
E
4
4
B
H
Seating plane
Gauge
plane
0° to 8°
Detail “A”
Rotated 90° CW
scale 8:1
L3 A1
L4
L
MILLIMETERS INCHES MILLIMETERS INCHES
DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX.
A 4.06 4.83 0.160 0.190 D1 6.86 - 0.270 -
A1 0.00 0.25 0.000 0.010 E 9.65 10.67 0.380 0.420
b 0.51 0.99 0.020 0.039 E1 6.22 - 0.245 -
b1 0.51 0.89 0.020 0.035 e 2.54 BSC 0.100 BSC
b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625
b3 1.14 1.73 0.045 0.068 L 1.78 2.79 0.070 0.110
c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066
c1 0.38 0.58 0.015 0.023 L2 - 1.78 - 0.070
c2 1.14 1.65 0.045 0.065 L3 0.25 BSC 0.010 BSC
D 8.38 9.65 0.330 0.380 L4 4.78 5.28 0.188 0.208
ECN: S-82110-Rev. A, 15-Sep-08
DWG: 5970
Legal Disclaimer Notice
www.vishay.com Vishay
Revision: 08-Feb-17 1Document Number: 91000
Disclaimer
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RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
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including but not limited to the warranty expressed therein.
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