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1. General description
The 74HC4316; 74HCT4316 is a quad single pole, single throw analog switch (SPST).
Each switch features two input/output terminals (nY and nZ) and an active HIGH enable
input (nS). When nS is LOW, the analog switch is turned off. When E is HIGH all four
analog switches are turned off. Inputs include clamp diodes. This enables the use of
current limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
Input levels E and nS inputs:
For 74HC4316: CMOS leve l
For 74HCT4316: TTL level
Low ON resistance:
160 (typical) at VCC VEE = 4.5 V
120 (typical) at VCC VEE = 6.0 V
80 (typical) at VCC VEE = 9.0 V
Logic level translation:
To enable 5 V logic to communicate with 5 V analog signals
Typical break-before-make built in
Specified in compliance with JEDEC standard no. 7A
ESD protection:
HBM JESD22-A114 F exceeds 2000 V
MM JESD22-A115-A exceeds 20 0 V
Multiple package options
Specified from 40 Cto +85C and 40 Cto +125C
3. Applications
Signal gating
Modulation
Demodulation
Chopper
74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
Rev. 3 — 2 January 2017 Product data sheet
74HC_HCT4316 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 2 January 2017 2 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
4. Ordering information
5. Functional diagram
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC4316D 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
74HCT4316D
74HC4316DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm SOT338-1
74HCT4316DB
74HC4316PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads;
body widt h 4.4 mm SOT403-1
74HCT4316PW
Fig 1. Logic symbol Fig 2. IEC logic symbol
DDD
<
=
<
=
<
=
<
=
(
6
6
6
6
D
E
;
* *
DDD
74HC_HCT4316 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 2 January 2017 3 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
Fig 3. Functional diag ram
DDD
/2*,&/(9(/
&219(56,21
$1'&21752/
*1' 9((
<
=
<
=
<
=
<
=
(
6
6
6
6
9&&
Fig 4. Schematic diagram (one sw itc h )
/2*,&/(9(/
&219(56,21
(
/2*,&/(9(/
&219(56,21
Q6
9
((
9
&&
9
(
(
9
(
(
DDD
Q<
Q=
9
&&
9
&&
74HC_HCT4316 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 2 January 2017 4 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
6. Pinning information
6.1 Pinning
6.2 Pin description
7. Functional description
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
Fig 5. Pin configuration SO16 Fig 6. Pin configuration SSOP16 and TSSOP16
+&
+&7
=
9&&
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6
<
6
=
=
6
<
6
<
(
=
*1' 9((
DDD
(
+&
+&7
=
9&&
<
6
<
6
=
=
6
<
6
<
=
*1' 9((
DDD
Table 2. Pin description
Symbol Pin Description
1Z, 2Z, 3Z, 4Z 1, 4, 10, 13 independent input or output
1Y, 2Y, 3Y, 4Y 2, 3, 11, 12 independent input or output
E7 enable input (active LOW)
GND 8 ground (0 V)
VEE 9 negative su pply voltage
1S, 2S, 3S, 4S 15, 5, 6, 14 select input (active HIGH)
VCC 14 positive supply voltage
Table 3. Function table[1]
Input Switch
EnS
LLOFF
LHON
HXOFF
74HC_HCT4316 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 2 January 2017 5 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
8. Limiting values
[1] To avoid drawing VCC current out of terminal nZ, when switch current flow s in terminals nY, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no VCC current will flow out of terminals nY. In this case there
is no limit for the voltage drop across the switch, but the voltages at nY and nZ may not exceed VCC or VEE.
[2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C.
For (T)SSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
9. Recommended operating conditions
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V ).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +11.0 V
IIK input clamping current VI<0.5 V or VI>V
CC +0.5V - 20 mA
ISK switch clamping current VSW <0.5 V or VSW >V
CC +0.5V - 20 mA
ISW switch current VSW =0.5 V to VCC +0.5V [1] -25 mA
IEE supply current - 20 mA
ICC supply current - 50 mA
IGND ground current 50 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb = 40 C to +125 C
SO16 and (T)SSOP16 packages [2] - 500 mW
P power dissipation per switch - 100 mW
Table 5. Recommended operating con ditions
Symbol Parameter Conditions 74HC4316 74HCT4316 Unit
Min Typ Max Min Typ Max
VCC supply voltage see Figure 7 and Figure 8
VCC GND 2.0 5.0 10.0 4.5 5.0 5.5 V
VEE GND 2.0 5.0 10.0 2.0 5.0 10.0 V
VIinput voltage GND - VCC GND - VCC V
VSW switch voltage VEE -V
CC VEE -V
CC V
Tamb ambient temperature 40 +25 +125 40 +25 +125 C
t/V input transition rise
and fall rate VCC = 2.0 V - - 625 - - - ns/V
VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V
VCC = 6.0 V - - 83 - - - ns/V
VCC = 10.0 V - - 35 - - - ns/V
74HC_HCT4316 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 2 January 2017 6 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
10. Static characteristics
Fig 7. Guaranteed ope rating area a s a function of th e
supply voltages for 74HC4316 Fig 8. Guaranteed operating area as a function of the
supply voltages for 74HCT4316
9&&9
((9
DDG
RSHUDWLQJDUHD
9&& *1'
9
9&&9
((9
DDG
9&& *1'
9
RSHUDWLQJDUHD
Table 6. RON resistance per switch for types 74HC4316 and 74HCT4316
VI = VIH or VIL; for test circuit see Figure 9.
Vis is the input voltage at a nY or nZ terminal, whichever is assigned as an input.
Vos is the output voltage at a nY or nZ terminal, whichever is assigned as an output.
For 74HC4316: VCC
GND or VCC
VEE = 2.0 V, 4.5 V, 6.0 V and 9.0 V.
For 74HCT4316: VCC
GND = 4.5 V and 5.5 V; VCC
VEE = 2.0 V, 4.5 V, 6.0 V and 9.0 V.
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Typ[1] Max Min Max Min Max
RON(peak) ON resistance
(peak) Vis = VCC to VEE [2]
VCC = 2.0 V; VEE = 0 V;
ISW = 100 A-- - - - -
VCC = 4.5 V; VEE =0V;
ISW = 1000 A160 320 - 400 - 480
VCC = 6.0 V; VEE = 0 V;
ISW = 1000 A120 240 - 300 - 360
VCC = 4.5 V; VEE = 4.5 V;
ISW = 1000 A85 170 - 215 - 255
74HC_HCT4316 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 2 January 2017 7 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
[1] Typical values are measured at Tamb = 25 C.
[2] When supply voltages (VCC VEE) near 2.0 V the analog switch ON resistance becomes extremely non-linear. When using a supply of
2 V, it is recommended to use these devices only for transmitting digital signals.
RON(rail) ON resistance
(rail) Vis = VEE [2]
VCC = 2.0 V; VEE = 0 V;
ISW = 100 A160 - - - - -
VCC = 4.5 V; VEE =0V;
ISW = 1000 A80 160 - 200 - 240
VCC = 6.0 V; VEE = 0 V;
ISW = 1000 A70 140 - 175 - 210
VCC = 4.5 V; VEE = 4.5 V;
ISW = 1000 A60 120 - 150 - 180
Vis = VCC [2]
VCC = 2.0 V; VEE = 0 V;
ISW = 100 A170 - - - - -
VCC = 4.5 V; VEE =0V;
ISW = 1000 A90 180 - 225 - 270
VCC = 6.0 V; VEE = 0 V;
ISW = 1000 A80 160 - 200 - 240
VCC = 4.5 V; VEE = 4.5 V;
ISW = 1000 A65 135 - 170 - 205
RON ON resistance
mismatch
between
channels
Vis = VCC to VEE [2]
VCC = 2.0 V; VEE = 0 V - - - - - -
VCC = 4.5 V; VEE =0V 16 - - - - -
VCC = 6.0 V; VEE = 0 V 9 - - - - -
VCC = 4.5 V; VEE = 4.5 V 6 - - - - -
Table 6. RON resistance per switch for types 74HC4316 and 74HCT4316 …continued
VI = VIH or VIL; for test circuit see Figure 9.
Vis is the input voltage at a nY or nZ terminal, whichever is assigned as an input.
Vos is the output voltage at a nY or nZ terminal, whichever is assigned as an output.
For 74HC4316: VCC
GND or VCC
VEE = 2.0 V, 4.5 V, 6.0 V and 9.0 V.
For 74HCT4316: VCC
GND = 4.5 V and 5.5 V; VCC
VEE = 2.0 V, 4.5 V, 6.0 V and 9.0 V.
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Typ[1] Max Min Max Min Max
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Product data sheet Rev. 3 — 2 January 2017 8 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
Vis = 0 V to (VCC VEE)V
is = 0 V to (VCC VEE)
Fig 9. Test circuit for measuring RON Fig 10. Typical RON as a function of input voltage Vis
DDD
9
9&&
9VZ
9LV ,VZ
9,+
Q6
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9,/
Q=Q<
*1' 9((
9
LV
9
DDD
521
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9&& 9
9&& 9
9&& 9
RON VSW
ISW
----------
=
Table 7. Static characteristics 74 HC4316
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at a nY or nZ terminal, whichever is assigned as an input.
Vos is the output voltage at a nY or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ[1] Max Unit
Tamb = 25 C
VIH HIGH-level input voltage VCC = 2.0 V 1.5 1.2 - V
VCC = 4.5 V 3.15 2.4 - V
VCC = 6.0 V 4.2 3.2 - V
VCC = 9.0 V 6.3 4.3 - V
VIL LOW-level input voltage VCC = 2.0 V - 0.8 0.5 V
VCC = 4.5 V - 2.1 1.35 V
VCC = 6.0 V - 2.8 1.8 V
VCC = 9.0 V - 4.3 2.7 V
IIinput leakage current VI = VCC or GND
VCC = 6.0 V; VEE = 0 V - - 0.1 A
VCC = 10.0 V; VEE = 0 V - - 0.2 A
IS(OFF) OFF-state leakage current VCC = 10.0 V; VEE = 0 V; VI=V
IH or VIL;
VSW=V
CC VEE; see Figure 11 --0.1 A
IS(ON) ON-state leakage current VCC = 10.0 V; VEE = 0 V; VI=V
IH or VIL;
VSW=V
CC VEE; see Figure 12 --0.1 A
ICC supply current VI = VCC or GND; Vis = VEE or VCC;
Vos =V
CC or VEE
VCC = 6.0 V; VEE = 0 V - - 8.0 A
VCC = 10.0 V; VEE = 0 V - - 16.0 A
74HC_HCT4316 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 2 January 2017 9 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
CIinput capacitance - 3.5 - pF
Csw switch capacitance - 5 - pF
Tamb = 40 C to +85 C
VIH HIGH-level input voltage VCC = 2.0 V 1.5 - - V
VCC = 4.5 V 3.15 - - V
VCC = 6.0 V 4.2 - - V
VCC = 9.0 V 6.3 - - V
VIL LOW-level input voltage VCC = 2.0 V - - 0.5 V
VCC = 4.5 V - - 1.35 V
VCC = 6.0 V - - 1.8 V
VCC = 9.0 V - - 2.7 V
IIinput leakage current VI = VCC or GND
VCC = 6.0 V; VEE = 0 V - - 1.0 A
VCC = 10.0 V; VEE = 0 V - - 2.0 A
IS(OFF) OFF-state leakage current VCC = 10.0 V; VEE = 0 V; VI=V
IH or VIL;
VSW=V
CC VEE; see Figure 11 --1.0 A
IS(ON) ON-state leakage current VCC = 10.0 V; VEE = 0 V; VI=V
IH or VIL;
VSW=V
CC VEE; see Figure 12 --1.0 A
ICC supply current VI = VCC or GND; Vis = VEE or VCC;
Vos =V
CC or VEE
VCC = 6.0 V; VEE = 0 V - - 80.0 A
VCC = 10.0 V; VEE = 0 V - - 160.0 A
Tamb = 40 C to +125 C
VIH HIGH-level input voltage VCC = 2.0 V 1.5 - - V
VCC = 4.5 V 3.15 - - V
VCC = 6.0 V 4.2 - - V
VCC = 9.0 V 6.3 - - V
VIL LOW-level input voltage VCC = 2.0 V - - 0.5 V
VCC = 4.5 V - - 1.35 V
VCC = 6.0 V - - 1.8 V
VCC = 9.0 V - - 2.7 V
IIinput leakage current VI = VCC or GND
VCC = 6.0 V; VEE = 0 V - - 1.0 A
VCC = 10.0 V; VEE = 0 V - - 2.0 A
IS(OFF) OFF-state leakage current VCC = 10.0 V; VEE = 0 V; VI=V
IH or VIL;
VSW=V
CC VEE; see Figure 11 --1.0 A
IS(ON) ON-state leakage current VCC = 10.0 V; VEE = 0 V; VI=V
IH or VIL;
VSW=V
CC VEE; see Figure 12 --1.0 A
Table 7. Static characteristics 74 HC4316 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at a nY or nZ terminal, whichever is assigned as an input.
Vos is the output voltage at a nY or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ[1] Max Unit
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Product data sheet Rev. 3 — 2 January 2017 10 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
[1] Typical values are measured at Tamb = 25 C.
ICC supply current VI = VCC or GND; Vis = VEE or VCC;
Vos =V
CC or VEE
VCC = 6.0 V; VEE = 0 V - - 160 A
VCC = 10.0 V; VEE = 0 V - - 320 A
Table 7. Static characteristics 74 HC4316 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at a nY or nZ terminal, whichever is assigned as an input.
Vos is the output voltage at a nY or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ[1] Max Unit
Table 8. Static characteristics 74 HCT4316
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at a nY or nZ terminal, whichever is assigned as an input.
Vos is the output voltage at a nY or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ[1] Max Unit
Tamb = 25 C
VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - V
VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 V
IIinput leakage curren t V I = VCC or GND; VCC = 5.5 V; VEE = 0 V - - 0.1 A
IS(OFF) OFF-state leakage current VCC = 10 V; VEE = 0 V; VI = VIH or VIL;
VSW=V
CC VEE; see Figure 11 --0.1 A
IS(ON) ON-state leakage current VCC = 10 V ; VEE = 0 V; VI = V IH or VIL;
VSW=V
CC VEE; see Figure 12 --0.1 A
ICC supply current VI = VCC or GND; Vis = VEE or VCC;
Vos =V
CC or VEE
VCC = 5.5 V; VEE = 0 V - - 8.0 A
VCC = 5.0 V; VEE = 5.0 V - - 16.0 A
ICC additional supply current nS and E; per input pin; VI = VCC 2.1 V;
other inputs at VCC or GND; VCC = 4.5 V to
5.5 V; VEE =0V
-50180A
CIinput capacitance - 3.5 - pF
Csw switch capacitance - 5 - pF
74HC_HCT4316 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 2 January 2017 11 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
[1] Typical values are measured at Tamb = 25 C.
Tamb = 40 C to +85 C
VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - V
VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 V
IIinput leakage curren t V I = VCC or GND; VCC = 5.5 V; VEE = 0 V - - 1.0 A
IS(OFF) OFF-state leakage current VCC = 10 V; VEE = 0 V; VI = VIH or VIL;
VSW=V
CC VEE; see Figure 11 --1.0 A
IS(ON) ON-state leakage current VCC = 10 V ; VEE = 0 V; VI = V IH or VIL;
VSW=V
CC VEE; see Figure 12 --1.0 A
ICC supply current VI = VCC or GND; Vis = VEE or VCC;
Vos =V
CC or VEE
VCC = 5.5 V; VEE = 0 V - - 80 A
VCC = 5.0 V; VEE = 5.0 V - - 160 A
ICC additional supply current nS and E; per input pin; VI = VCC 2.1 V;
other inputs at VCC or GND; VCC = 4.5 V to
5.5 V; VEE =0V
--225A
Tamb = 40 C to +125 C
VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - V
VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 V
IIinput leakage curren t V I = VCC or GND; VCC = 5.5 V; VEE = 0 V - - 1.0 A
IS(OFF) OFF-state leakage current VCC = 10 V; VEE = 0 V; VI = VIH or VIL;
VSW=V
CC VEE; see Figure 11 --1.0 A
IS(ON) ON-state leakage current VCC = 10 V ; VEE = 0 V; VI = V IH or VIL;
VSW=V
CC VEE; see Figure 12 --1.0 A
ICC supply current VI = VCC or GND; Vis = VEE or VCC;
Vos =V
CC or VEE
VCC = 5.5 V; VEE = 0 V - - 160 A
VCC = 5.0 V; VEE = 5.0 V - - 320 A
ICC additional supply current nS and E; per input pin; VI = VCC 2.1 V;
other inputs at VCC or GND; VCC = 4.5 V to
5.5 V; VEE =0V
--245A
Table 8. Static characteristics 74 HCT4316 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at a nY or nZ terminal, whichever is assigned as an input.
Vos is the output voltage at a nY or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ[1] Max Unit
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Product data sheet Rev. 3 — 2 January 2017 12 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
11. Dynamic characteristics
Vis = VCC and Vos = VEE
Vis = VEE and Vos = VCC
Vis = VCC and Vos = open
Vis = VEE and Vos = open
Fig 11. Test circuit for measuring OFF-state leakage
current Fig 12. Test circuit for measuring ON-state leakage
current
Q<
DDD
9
&&
9LV
9RV
,VZ
,VZ
9,
/
Q6
(
9,+
Q=
*1' 9((
$ $
Q<
DDD
9
&&
9LV
9
RV
,VZ
9
,+
Q6
(
9
,
/
Q=
*1' 9
((
$
Table 9. Dynamic characteristics 74HC4316
GND = 0 V; tr = tf = 6 ns; CL = 50 pF unless specified otherwise; for test circuit see Figure 15.
Vis is the input voltage at a nY or nZ terminal, whichever is assigned as an input.
Vos is the output voltage at a nY or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Typ[1] Max Min Max Min Max
tpd propagation
delay nY to nZ or nZ to nY; RL= ;
see Figure 13 [2]
VCC = 2.0 V; VEE = 0 V 17 60 - 75 - 90 ns
VCC = 4.5 V; VEE = 0 V 6 12 - 15 - 18 ns
VCC = 6.0 V; VEE = 0 V 5 10 - 13 - 15 ns
VCC = 4.5 V; VEE = 4.5 V 4 8 - 10 - 12 ns
toff turn-off time E to nY or nZ; see Figure 14 [4]
VCC = 2.0 V; VEE = 0 V 63 220 - 275 - 330 ns
VCC = 4.5 V; VEE = 0 V 23 44 - 55 - 66 ns
VCC = 5.0 V; VEE = 0 V;
CL=15pF 20 - - - - - ns
VCC = 6.0 V; VEE = 0 V 18 37 - 47 - 56 ns
VCC = 4.5 V; VEE = 4.5 V 21 39 - 49 - 59 ns
nS to nY or nZ; see Figure 14 [4]
VCC = 2.0 V; VEE = 0 V 55 175 - 220 - 265 ns
VCC = 4.5 V; VEE = 0 V 20 35 - 44 - 53 ns
VCC = 5.0 V; VEE = 0 V;
CL=15pF 16 - - - - - ns
VCC = 6.0 V; VEE = 0 V 16 30 - 37 - 45 ns
VCC = 4.5 V; VEE = 4.5 V 18 36 - 45 - 54 ns
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Product data sheet Rev. 3 — 2 January 2017 13 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
[1] Typical values are measured at Tamb = 25 C.
[2] tpd is the same as tPHL and tPLH.
[3] ton is the same as tPHZ and tPLZ.
[4] toff is the same as tPZH and tPZL.
[5] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2fi+{(CL+C
sw) VCC2 fo} where:
fi = input frequency in MHz;
fo = output frequency in MHz;
{(CL+C
sw) VCC2 fo} = sum of outputs;
CL = output load capacitance in pF;
Csw = switch capacitance in pF;
VCC = supply voltage in V.
ton turn-on time E to nY or nZ; see Figure 14 [3]
VCC = 2.0 V; VEE = 0 V 61 205 - 255 - 310 ns
VCC = 4.5 V; VEE = 0 V 22 41 - 51 - 62 ns
VCC = 5.0 V; VEE = 0 V;
CL=15pF 19 - - - - - ns
VCC = 6.0 V; VEE = 0 V 18 35 - 43 - 53 ns
VCC = 4.5 V; VEE = 4.5 V 19 37 - 47 - 56 ns
nS to nY or nZ; see Figure 14 [3]
VCC = 2.0 V; VEE = 0 V 52 175 - 220 - 265 ns
VCC = 4.5 V; VEE = 0 V 19 35 - 44 - 53 ns
VCC = 5.0 V; VEE = 0 V;
CL=15pF 16 - - - - - ns
VCC = 6.0 V; VEE = 0 V 15 30 - 37 - 45 ns
VCC = 4.5 V; VEE = 4.5 V 17 34 - 43 - 51 ns
CPD power
dissipation
capacitance
per switch; VI = GND to VCC [5] 13 - - - - - pF
Table 9. Dynamic characteristics 74HC4316 …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF unless specified otherwise; for test circuit see Figure 15.
Vis is the input voltage at a nY or nZ terminal, whichever is assigned as an input.
Vos is the output voltage at a nY or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Typ[1] Max Min Max Min Max
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Product data sheet Rev. 3 — 2 January 2017 14 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
Table 10. Dynamic characteristics 74HCT4316
GND = 0 V; tr = tf = 6 ns; CL = 50 pF unless specified otherwise; for test circuit see Figure 15.
Vis is the input voltage at a nY or nZ terminal, whichever is assigned as an input.
Vos is the output voltage at a nY or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Typ[1] Max Min Max Min Max
tpd propagation
delay nY to nZ or nZ to nY; RL= ;
see Figure 13 [2]
VCC = 4.5 V; VEE = 0 V 6 12 - 15 - 18 ns
VCC = 4.5 V; VEE = 4.5 V 4 8 - 10 - 12 ns
tPZH OFF-state to
HIGH
propagation
delay
Eto nY or nZ; see Figure 14
VCC = 4.5 V; VEE = 0 V 22 44 - 55 - 66 ns
VCC = 5.0 V; VEE = 0 V;
CL=15pF 19 - - - - - ns
VCC = 4.5 V; VEE = 4.5 V 21 42 - 53 - 63 ns
nS to nY or nZ; see Figure 14
VCC = 4.5 V; VEE = 0 V 20 40 - 53 - 60 ns
VCC = 5.0 V; VEE = 0 V;
CL=15pF 17 - - - - - ns
VCC = 4.5 V; VEE = 4.5 V 17 34 - 43 - 51 ns
tPZL OFF-state to
LOW
propagation
delay
Eto nY or nZ; see Figure 14
VCC = 4.5 V; VEE = 0 V 28 56 - 70 - 84 ns
VCC = 5.0 V; VEE = 0 V;
CL=15pF 24 - - - - - ns
VCC = 4.5 V; VEE = 4.5 V 21 42 - 53 - 63 ns
nS to nY or nZ; see Figure 14
VCC = 4.5 V; VEE = 0 V 25 50 - 63 - 75 ns
VCC = 5.0 V; VEE = 0 V;
CL=15pF 21 - - - - - ns
VCC = 4.5 V; VEE = 4.5 V 17 34 - 43 - 51 ns
toff turn-off time E to nY or nZ; see Figure 14 [3]
VCC = 4.5 V; VEE = 0 V 25 50 - 63 - 75 ns
VCC = 5.0 V; VEE = 0 V;
CL=15pF 21 - - - - - ns
VCC = 4.5 V; VEE = 4.5 V 23 46 - 58 - 69 ns
nS to nY or nZ; see Figure 14
VCC = 4.5 V; VEE = 0 V 22 44 - 55 - 66 ns
VCC = 5.0 V; VEE = 0 V;
CL=15pF 19 - - - - - ns
VCC = 4.5 V; VEE = 4.5 V 20 40 - 50 - 60 ns
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Product data sheet Rev. 3 — 2 January 2017 15 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
[1] Typical values are measured at Tamb = 25 C.
[2] tpd is the same as tPHL and tPLH.
[3] toff is the same as tPZH and tPZL.
[4] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2fi+{(CL+C
sw) VCC2 fo} where:
fi = input frequency in MHz;
fo = output frequency in MHz;
{(CL+C
sw) VCC2 fo} = sum of outputs;
CL = output load capacitance in pF;
Csw = switch capacitance in pF;
VCC = supply voltage in V.
12. Waveforms
CPD power
dissipation
capacitance
per switch;
VI=GNDto(V
CC 1.5 V) [4] 14 - - - - - pF
Table 10. Dynamic characteristics 74HCT4316 …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF unless specified otherwise; for test circuit see Figure 15.
Vis is the input voltage at a nY or nZ terminal, whichever is assigned as an input.
Vos is the output voltage at a nY or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Typ[1] Max Min Max Min Max
Fig 13. Input (Vis) to output (Vos) propagation delays
DDG
W3/+ W3+/
9LVLQSXW
9RVRXWSXW
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Product data sheet Rev. 3 — 2 January 2017 16 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
Measurement points are shown in Table 11.
Fig 14. Turn-on and turn-off times
DDD
Q6(LQSXW
9
,
9
90
9
RVRXWSXW
9
RVRXWSXW
W3/=
W3+=
W3=/
W3=+
VZLWF
K21
VZLWFK21 VZLWFK2))
Table 11. Measurement points
Type VIVM
74HC4316 VCC 0.5VCC
74HCT4316 3.0 V 1.3 V
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Product data sheet Rev. 3 — 2 January 2017 17 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
[1] tr = tf = 6 ns; when measuring fmax, there is no constraint to tr and tf with 50 % duty factor.
[2] VI values:
a) For 74HC4316: VI = VCC
b) For 74HCT4316: VI = 3 V
Test data is given in Table 12.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig 15. Test circuit for measuring switching times
DDD
9,
9,
9
9
QHJDWLYH
SXOVH
SRVLWLYH
SXOVH
90
90
90
90
W:
WU
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W:
RSHQ
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&/
57
6
Table 12. Test da ta
Test Input Output S1 position
EnS Switch nY (nZ) tr, tfSwitch nZ (nY)
VIVis at fmax other[1] CLRL
tPHL, tPLH [2] GND to VCC < 2 ns 6 ns 50 pF - open
tPHZ, tPZH [2] VCC < 2 ns 6 ns 50 pF, 15 pF 1 kVEE
tPLZ, tPZL [2] VEE < 2 ns 6 ns 50 pF, 15 pF 1 kVCC
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Product data sheet Rev. 3 — 2 January 2017 18 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
13. Additional dynamic characteristics
[1] Adjust input voltage Vis to 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 ).
[2] Adjust input voltage Vis to 0 dBm level (0 dBm = 1 mW into 600 ).
Table 13. Additional dynamic characteristics
Recommended conditions and typical values; GND = 0 V; Tamb = 25
C; CL=50pF.
Vis is the input voltage at a nY or nZ terminal, whichever is assigned as an input.
Vos is the output voltage at a nY or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ Max Unit
THD total harmonic
distortion fi= 1 kHz; RL= 10 k; see Figure 16
Vis = 4.0 V (p-p); VCC = 2.25 V; VEE =2.25 V - 0.80 - %
Vis = 8.0 V (p-p); VCC = 4.5 V; VEE =4.5 V - 0.40 - %
fi=10kHz; R
L= 10 k; see Figure 16
Vis = 4.0 V (p-p); VCC = 2.25 V; VEE =2.25 V - 2.40 - %
Vis = 8.0 V (p-p); VCC = 4.5 V; VEE =4.5 V - 1.20 - %
f(3dB) 3 dB frequency
response RL= 50 ; CL= 10 pF; see Figure 17 [1]
VCC = 2.25 V; VEE = 2.25 V - 150 - MHz
VCC = 4.5 V; VEE = 4.5 V - 160 - MHz
iso isolation (OFF-state) RL= 60 0 ; fi= 1 MHz; see Figure 18 [2]
VCC = 2.25 V; VEE = 2.25 V - 50 - dB
VCC = 4.5 V; VEE = 4.5 V - 50 - dB
Vct crosstalk voltage peak-to-peak value; between control and any
switch; RL=600; fi=1MHz; Eor nS square
wave between VCC and GND; tr=t
f=6ns;
see Figure 19
VCC = 4.5 V; VEE = 0 V - 110 - mV
VCC = 4.5 V; VEE = 4.5 V - 220 - mV
Xtalk crosstalk between switches; RL= 600 ; fi=1MHz;
see Figure 20 [2]
VCC = 2.25 V; VEE = 2.25 V - 60 - dB
VCC = 4.5 V; VEE = 4.5 V - 60 - dB
Fig 16. Test circuit for measuring total harmonic distortion
DDD
9&&
9RV
9LV
9,+
Q6
(
9,/
Q=Q<QQ<QQ=
9(( *1'
)
5/&/G%
74HC_HCT4316 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 2 January 2017 19 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
VCC = 4.5 V; GND = 0 V; VEE =4.5 V; RL=50; RS=1k.
a. Test circuit
b. Typical 3 dB frequency response
Fig 17. 3 dB frequency response
DDD
9
&&
9
RV
9LV
9,+
Q6
(
9,/
Q=Q<QQ<QQ=
9(( *1'
)
5/&/G%
DDD
G%
I
L
N+]
74HC_HCT4316 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 2 January 2017 20 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
VCC = 4.5 V; GND = 0 V; VEE =4.5 V; RL= 600 ; RS=1k.
a. Test circuit
b. Isolation (OFF-state) as a function of frequency
Fig 18. Isolation (OFF-s tate) as a function of frequency
DDD
9
&&
9
RV
9LV
9,+
Q6
(
9,/
Q=Q<QQ<QQ=
9(( *1'
)
5/&/G%
DDH
ILN+]
ĮLVR
G%
74HC_HCT4316 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 2 January 2017 21 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
Fig 19. Test circuit for measuring crosstalk voltage (between the digital input and the switch)
DDD
9&&
RVFLOORVFRSH
Q6(
Q=Q<
9(( *1' 5/
5/
5/
5/
*
9FW
Fig 20. Test circu it for measuring crosstalk (between the switches)
DDD
9
&&
9LV
9,+
Q6
(
9,/
Q=Q<Q<Q=
9(( *1'
)
5/
5/
&/
&/
9&&
9,/
9RV
Q6
(
9,+
Q=Q<Q<Q=
9(( *1' 5/
5/G
%
74HC_HCT4316 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 2 January 2017 22 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
14. Package outline
Fig 21. Package outline SOT109-1 (SO16)
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74HC_HCT4316 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 2 January 2017 23 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
Fig 22. Package outline SOT338-1 (SSOP16)
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74HC_HCT4316 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 2 January 2017 24 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
Fig 23. Package outline SOT403-1 (TSSOP16)
81,7 $
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74HC_HCT4316 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 2 January 2017 25 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
15. Abbreviations
16. Revision history
Table 14. Abbreviations
Acronym Description
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Lo gic
Table 15. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74HC_HCT4316 v.3 20170102 Product data sheet - 74HC_HCT4316_CNV v.2
Modifications: •The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•Legal texts have been adapted to the new company name where appropriate .
•Type numbers 74HC4316N and 74HCT4316N removed.
74HC_HCT4316_CNV v .2 19930901 Product specification - -
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Product data sheet Rev. 3 — 2 January 2017 26 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
17. Legal information
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[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device (s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
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Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
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Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full information se e the relevant full data
sheet, which is available on request via the local NXP Semicond uctors sales
office. In case of any inconsistency or conflict with the shor t data sheet, the
full data sheet shall pre va il.
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
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Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
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Product data sheet Rev. 3 — 2 January 2017 27 of 28
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
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18. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors 74HC4316; 74HCT4316
Quad single-pole single-throw analog switch
© NXP Semiconductors N.V. 2017. All rights re served.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 2 January 2017
Document identifier: 74HC_HCT4316
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
19. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Functional description . . . . . . . . . . . . . . . . . . . 4
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
9 Recommended operating conditions. . . . . . . . 5
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
11 Dynamic characteristics . . . . . . . . . . . . . . . . . 12
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
13 Add i tional dynamic characteristics . . . . . . . . 18
14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 22
15 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 25
16 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 25
17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 26
17.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 26
17.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
17.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 26
17.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 27
18 Contact information. . . . . . . . . . . . . . . . . . . . . 27
19 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
