locate, communicate, accelerate LISA-U2 series 3.75G HSPA+ Wireless Modules Data Sheet Abstract Technical data sheet describing LISA-U2 series HSPA+ wireless modules. These modules are a complete and cost efficient 3.75G solution offering up to six-band high-speed HSPA+ and quad-band GSM/EGPRS voice and/or data transmission technology in a compact form factor. www.u-blox.com 33.2 x 22.4 x 2.6 mm LISA-U2 series - Data Sheet Document Information Title LISA-U2 series Subtitle 3.75G HSPA+ Wireless Modules Document type Data Sheet Document number UBX-13001734 Document revision B Document status Advance Information Document status information Objective This document contains target values. Revised and supplementary data will be published Specification later. Advance This document contains data based on early testing. Revised and supplementary data will Information be published later. This document contains data from product verification. Revised and supplementary data Preliminary may be published later. Released This document contains the final product specification. This document applies to the following products: Name Type number Firmware version PCN / IN LISA-U200 LISA-U200-00S-00 LISA-U200-01S-00 LISA-U200-02S-00 LISA-U200-61S-00 LISA-U200-62S-00 LISA-U230-01S-00 LISA-U260-01S-00 LISA-U260-02S-00 LISA-U270-01S-00 LISA-U270-02S-00 LISA-U270-62S-00 21.21 22.40 22.80 22.40 22.80 22.40 22.61 22.80 22.61 22.80 22.80 UBX-TN-12009 UBX-TN-12040 UBX-13002764 UBX-TN-13019 UBX-13002764 UBX-TN-12040 UBX-TN-12061 UBX-13002764 UBX-TN-12061 UBX-13002764 UBX-13002764 LISA-U230 LISA-U260 LISA-U270 This document and the use of any information contained therein, is subject to the acceptance of the u-blox terms and conditions. They can be downloaded from www.u-blox.com. u-blox makes no warranties based on the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice. u-blox reserves all rights to this document and the information contained herein. Reproduction, use or disclosure to third parties without express permission is strictly prohibited. Copyright (c) 2013, u-blox AG. u-blox(R) is a registered trademark of u-blox Holding AG in the EU and other countries. Trademark Notice Microsoft and Windows are either registered trademarks or trademarks of Microsoft Corporation in the United States and/or other countries. All other registered trademarks or trademarks mentioned in this document are property of their respective owners. UBX-13001734 - B Page 2 of 56 LISA-U2 series - Data Sheet Contents Contents.............................................................................................................................. 3 1 2 Functional description.................................................................................................. 5 1.1 1.2 Overview .............................................................................................................................................. 5 Product features ................................................................................................................................... 5 1.3 Block diagram....................................................................................................................................... 6 1.4 1.5 Product description ............................................................................................................................... 7 AT command support ........................................................................................................................... 8 1.6 Supported features ............................................................................................................................... 9 Interfaces .................................................................................................................... 11 2.1 Power Management ........................................................................................................................... 11 2.1.1 Module supply (VCC) .................................................................................................................. 11 2.1.2 2.1.3 RTC supply (V_BCKP) ................................................................................................................... 11 Digital I/O interfaces supply (V_INT) ............................................................................................. 11 2.2 RF antenna interface ........................................................................................................................... 11 2.3 System functions ................................................................................................................................ 11 2.3.1 Module power-on ....................................................................................................................... 11 2.3.2 Module power-off ....................................................................................................................... 12 2.3.3 Module reset ............................................................................................................................... 12 2.4 (U)SIM interface .................................................................................................................................. 12 2.5 Serial communication ......................................................................................................................... 13 2.5.1 2.5.2 Asynchronous serial interface (UART)........................................................................................... 13 Universal Serial Bus (USB) ............................................................................................................ 14 2.5.3 Serial Peripheral Interface (SPI) ..................................................................................................... 15 2.5.4 Multiplexer protocol .................................................................................................................... 15 2 2.6 DDC (I C) bus interface ....................................................................................................................... 15 3 2.7 Audio ................................................................................................................................................. 16 2.8 GPIO ................................................................................................................................................... 16 Pin definition .............................................................................................................. 18 3.1 4 Pin assignment ................................................................................................................................... 18 Electrical specifications .............................................................................................. 24 4.1 Absolute maximum rating .................................................................................................................. 24 4.1.1 Maximum ESD ............................................................................................................................. 25 4.2 Operating conditions .......................................................................................................................... 26 4.2.1 Operating temperature range ...................................................................................................... 26 4.2.2 Module thermal resistance .......................................................................................................... 26 4.2.3 4.2.4 Supply/Power pins ....................................................................................................................... 27 Current consumption .................................................................................................................. 28 Contents UBX-13001734 - B Advance Information Page 3 of 56 LISA-U2 series - Data Sheet 4.2.5 RF Performance ........................................................................................................................... 29 4.2.6 PWR_ON pin ............................................................................................................................... 31 4.2.7 4.2.8 RESET_N pin ................................................................................................................................ 31 (U)SIM pins .................................................................................................................................. 31 4.2.9 Generic Digital Interfaces pins ..................................................................................................... 32 4.2.10 4.2.11 USB pins ...................................................................................................................................... 44 2 DDC (I C) pins.............................................................................................................................. 44 5 Mechanical specifications .......................................................................................... 45 6 Reliability tests and approvals .................................................................................. 46 7 6.1 Reliability tests .................................................................................................................................... 46 6.2 Approvals ........................................................................................................................................... 46 Product handling & soldering .................................................................................... 47 7.1 Packaging ........................................................................................................................................... 47 7.1.1 7.1.2 8 9 Reels ........................................................................................................................................... 47 Tapes .......................................................................................................................................... 48 7.2 Moisture Sensitivity Levels ................................................................................................................... 49 7.3 7.4 Reflow soldering ................................................................................................................................. 49 ESD precautions.................................................................................................................................. 49 Default settings .......................................................................................................... 50 Labeling and ordering information........................................................................... 51 9.1 Product labeling.................................................................................................................................. 51 9.2 Explanation of codes........................................................................................................................... 51 9.3 Ordering information .......................................................................................................................... 52 Appendix .......................................................................................................................... 53 A Glossary ...................................................................................................................... 53 Related documents........................................................................................................... 54 Revision history ................................................................................................................ 55 Contact .............................................................................................................................. 56 Contents UBX-13001734 - B Advance Information Page 4 of 56 LISA-U2 series - Data Sheet 1 Functional description 1.1 Overview LISA-U2 modules are a 3.75G solution providing up to six-band HSPA+ and quad-band GSM/EDGE data transmission in a compact form factor. These modules feature low power consumption and HSUPA category 6, HSDPA up to category 14, GPRS/EDGE up to class 33 data transmission with voice capability. They also combine baseband, RF transceiver, power management unit, and power amplifier in a single, easy-to-integrate solution. LISA-U2 modules are complete, fully qualified and certified solutions, which reduces cost and enables short time to market. They are ideally suited to M2M and automotive applications such as: mobile Internet terminals and applications, car infotainment and telematics, Automatic Meter Reading (AMR), Remote Monitoring Automation and Control (RMAC), surveillance and security, road pricing, asset tracking, fleet management, anti theft systems, and Point of Sales (PoS) terminals. LISA-U2 modules support full access to u-blox GPS/GNSS receivers via serial port. Thus WCDMA/GSM and GPS/GNSS can be controlled through a single serial port from any host processor. The compact LISA form factor and SMT pads allow fully automated assembly with standard pick & place and reflow soldering equipment for cost-efficient, high-volume production. 1.2 Product features 1 1 9 LISA-U200-01S 5.76 7.2 I, II, IV, V, VI, VIII * 1 1 1 1 14 LISA-U200-02S 5.76 7.2 I, II, IV, V, VI, VIII * 1 1 1 1 LISA-U200-61S 5.76 7.2 I, II, IV, V, VI, VIII * 1 1 1 LISA-U200-62S 5.76 7.2 I, II, IV, V, VI, VIII * 1 1 LISA-U230-01S 5.76 21.1 I, II, IV, V, VI, VIII * 1 LISA-U260-01S 5.76 7.2 II, V * LISA-U260-02S 5.76 7.2 II, V LISA-U270-01S 5.76 7.2 LISA-U270-02S 5.76 LISA-U270-62S 5.76 * 2 * * * * * * * * * * 14 2 * * * * * * * * * * 1 14 2 * * * * * * * * * * 1 1 14 2 * * * * * * * * * * 1 1 1 14 2 * * * * * * * * * * 1 1 1 1 14 2 * * * * * * * * * * * 1 1 1 1 14 2 * * * * * * * * * * I, VIII * 1 1 1 1 14 2 * * * * * * * * * * 7.2 I, VIII * 1 1 1 1 14 2 * * * * * * * * * * 7.2 I, VIII * 1 1 1 1 14 2 * * * * * * * * * * Rx diversity * Embedded AssistNow * GPS/GNSS via Modem * Digital Audio * Analog Audio SIM Access Profile (SAP) 1 CellLocate 1 FW update over AT (FOAT) * HTTP, SSL GPIO I, II, V, VI Embedded TCP/UDP stack DDC for u-blox GPS/GNSS 7.2 Jamming detection USB 5.76 Antenna Supervisor SPI (5 wires) LISA-U200-00S Functions Network indication UART Audio GSM/GPRS/EDGE quad-band Interface UMTS/HSPA bands [MHz] Bands HSDPA [Mb/s] Technology HSUPA [Mb/s] Module * * LISA-U200-61S, LISA-U200-62S and LISA-U270-62S modules FW versions are approved and locked for SoftBank Japanese network operator Table 1: LISA-U2 series main features summary Functional description UBX-13001734 - B Advance Information Page 5 of 56 LISA-U2 series - Data Sheet 1.3 Block diagram Duplexers & Filters ANT (U)SIM Card RF SWITCH DDC (for GPS) Switch & Multi band & mode PA PA PMU UART RF Transceiver Filter Bank ANT_DIV SPI 26 MHz RF SWITCH 32.768 kHz Wireless Base-band Processor USB GPIO(s) Transceiver PMU Memory Digital Audio (I2S) Vcc (Supply) V_BCKP (RTC) Power On Power Management Unit External Reset V_INT (I/O) Figure 1: LISA-U2 series block diagram (for available options refer to the product features table in Table 1) Functional description UBX-13001734 - B Advance Information Page 6 of 56 LISA-U2 series - Data Sheet 1.4 Product description 3G UMTS/HSDPA/HSUPA Characteristics 2G GSM/GPRS/EDGE Characteristics Class A User Equipment 1 Class B Mobile Station 2 UMTS Terrestrial Radio Access (UTRA) Frequency Division Duplex (FDD) 3GPP Release 7 Evolved High Speed Packet Access (HSPA+) Rx Diversity for LISA-U230 GSM EDGE Radio Access (GERA) 3GPP Release 7 Rx Diversity for LISA-U230 Dual-band support: Quad-band support * GSM 850 MHz, E-GSM 900 MHz, * Band II (1900 MHz), Band V (850 MHz) for LISA-U260 DCS 1800 MHz, PCS 1900 MHz * Band I (2100 MHz), Band VIII (900 MHz) for LISA-U270 Quad-band support for LISA-U200-00S: * Band I (2100 MHz), Band II (1900 MHz), Band V (850 MHz), Band VI (800 MHz) Six-band support for LISA-U200 (except for LISA-U200-00S), LISA-U230: * Band I (2100 MHz), Band II (1900 MHz), Band IV (1700 MHz), Band V (850 MHz), Band VI (800 MHz), Band VIII (900 MHz) WCDMA/HSDPA/HSUPA Power Class * Power Class 3 (24 dBm) for WCDMA/HSDPA/HSUPA mode PS (Packet Switched) Data Rate * HSUPA category 6, up to 5.76 Mb/s UL * HSDPA category 8 up to 7.2 Mb/s DL for LISA-U200/U260/U270 * HSDPA category 14 up to 21.1 Mb/s DL for LISA-U230 * WCDMA PS data up to 384 kb/s DL/UL CS (Circuit Switched) Data Rate * WCDMA CS data up to 64 kb/s DL/UL GSM/GPRS Power Class * Power Class 4 (33 dBm) for GSM/E-GSM bands * Power Class 1 (30 dBm) for DCS/PCS bands EDGE Power Class * Power Class E2 (27 dBm) for GSM/E-GSM bands * Power Class E2 (26 dBm) for DCS/PCS bands PS (Packet Switched) Data Rate 3 * GPRS multi-slot class 33 4, coding scheme CS1-CS4, up to 107 kb/s DL, 85.6 kb/s UL for LISA-U200-00S * GPRS multi-slot class 12 5, coding scheme CS1-CS4, up to 85.6 kb/s DL/UL for all products except LISA-U200-00S * EDGE multi-slot class 334, coding scheme MCS1-MCS9, up to 296 kb/s DL, 236.8 kb/s UL for LISA-U200-00S * EDGE multi-slot class 125, coding scheme MCS1-MCS9, up to 236.8 kb/s DL/UL for all products except LISA-U200-00S CS (Circuit Switched) Data Rate * GSM CS data up to 9.6 kb/s DL/UL supported in transparent/non transparent mode Table 2: LISA-U2 series UMTS/HSDPA/HSUPA and GSM/GPRS/EDGE characteristics Operation modes I to III are supported on GSM/GPRS network, with user-defined preferred service selectable from GSM to GPRS. Paging messages for GSM calls can be optionally monitored during GPRS data transfer in not-coordinating NOM II-III. Direct Link mode is supported for TCP and UDP sockets. 1 Device can work simultaneously in Packet Switch and Circuit Switch mode: voice calls are possible while the data connection is active without any interruption in service. 2 Device can be attached to both GPRS and GSM services (i.e. Packet Switch and Circuit Switch mode) using one service at a time. If for example during data transmission an incoming call occurs, the data connection is suspended to allow the voice communication. Once the voice call has terminated, the data service is resumed. 3 GPRS/EDGE multi-slot class determines the number of timeslots available for upload and download and thus the speed at which data can be transmitted and received, with higher classes typically allowing faster data transfer rates. 4 GPRS/EDGE multi-slot class 33 implies a maximum of 5 slots in DL (reception) and 4 slots in UL (transmission) with 6 slots in total. 5 GPRS/EDGE multi-slot class 12 implies a maximum of 4 slots in DL (reception) and 4 slots in UL (transmission) with 5 slots in total. Functional description UBX-13001734 - B Advance Information Page 7 of 56 LISA-U2 series - Data Sheet Basic features Supplementary services Short Message Service (SMS) Display of Called Number Call Hold/Resume (CH) SMS Classes 1, 2, 3 Indication of Call Progress Signals Country/PLMN Indication Call Waiting (CW) Multi-Party (MTPY) Mobile-Originating SMS (MO SMS) Mobile-Terminating SMS (MT SMS) International Access Function Call Forwarding (CF) SMS Cell Broadcast (SMS CB) Service Indicator Dual Tone Multi Frequency (DTMF) Call Divert Explicit Call Transfer (ECT) Text and PDU mode supported SMS during circuit-switched calls Subscription Identity Management Service Provider Indication Call Barring (CB) Advice of Charge Charging (AOCC) SMS over PSD or CSD SMS storage on SIM and memory module Abbreviated Dialing SIM Toolkit Calling Line Identification Presentation (CLIP) Calling Line Identification Restriction (CLIR) SIM Access Profile 6 Connected Line Identification Presentation (COLP) Connected Line Identification Restriction (COLR) Unstructured Supplementary Services Data (USSD) Network Identify and Time Zone (NITZ) Table 3: LISA-U2 series Mobile Station basic Features, Supplementary services and SMS services summary 7 1.5 AT command support The module supports AT commands according to 3GPP standards: TS 27.007 [1], 27.005 [2], 27.010 [3], and the u-blox AT command extension. For the complete list of the supported AT commands and their syntax refer to the u-blox AT Commands Manual [5]. RIL (Radio Interface Layer) is provided with LISA-U2 modules and is compatible with following deliveries: * Android 2.3 (Gingerbread) * Android 4.0 (Ice Cream Sandwich) * Android 4.1 (Jelly Bean) * Windows Embedded CE 6.0 * Windows Embedded Compact 7 6 7 Supported by all LISA-U2 modules versions except LISA-U200-00S All these functionalities are supported via AT commands (for more details see the u-blox AT Commands Manual [5]). Functional description UBX-13001734 - B Advance Information Page 8 of 56 LISA-U2 series - Data Sheet 1.6 Supported features Table 4 lists the main features supported by LISA-U2 modules. For more details refer to LISA-U Series System Integration Manual [6] and u-blox AT commands manual [5]. Feature Description Network Indication GPIO configured to indicate the network status: registered home network, registered roaming, voice or data call enabled, no service. The feature can be enabled through the +UGPIOC AT command. Antenna Detection Antenna presence detection capability is provided, evaluating the resistance from the ANT pin to GND by means of an internal antenna detection circuit. The antenna detection feature can be enabled through the +UANTR AT command. Jamming detection Detects some "artificial" interference that obscure the operator's carriers entitled to give access to the GSM/UMTS service and reports the start and stop of such conditions to the application processor (AP). The AP can react appropriately by e.g. switching off the radio transceiver to reduce power consumption and monitoring the environment at constant periods. The feature can be enabled and configured through the +UCD AT command. Embedded TCP and UDP stack Embedded TCP/IP and UDP/IP stack including direct link mode for TCP and UDP sockets. Sockets can be set in Direct Link mode to establish a transparent end to end communication with an already connected TCP or UDP socket via serial interface. FTP, FTPS File Transfer Protocol as well as Secure File Transfer Protocol (SSL encryption of FTP control channel) functionalities are supported via AT commands. HTTP, HTTPS Hyper-Text Transfer Protocol as well as Secure Hyper-Text Transfer Protocol (SSL encryption) functionalities are supported via AT commands. HEAD, GET, POST, DELETE and PUT operations are available. Up to 4 client contexts can be simultaneously used. GPS / GNSS via Modem Full access to u-blox positioning chips and modules is available through a dedicated DDC (I2C) interface. This means that from any host processor a single serial port can control the wireless module and the positioning chip or module. For more details see the GPS Implementation Application Note [12]. Embedded AssistNow Software Embedded AssistNow Online and AssistNow Offline clients to provide better GPS / GNSS performance and faster Time-to-First-Fix. An AT command can enable / disable the clients. Not supported by LISA-U200-00S version. CellLocateTM Enables the estimation of device position based on the parameters of the mobile network cells visible to the specific device based on the CellLocate database: * Normal scan: only the parameters of the visible home network cells are sent * Deep scan: the parameters of all surrounding cells of all mobile operators are sent CellLocateTM is implemented using a set of AT commands for CellLocate service configuration and position request. Not supported by LISA-U200-00S version. Hybrid Positioning The module current position is provided using a u-blox positioning chip or module or the estimated position from CellLocate depending by which positioning method provides the best and fastest solution according to the user configuration Hybrid positioning is implemented through a set of AT commands that allow the configuration and the position request. Not supported by LISA-U200-00S version. Firmware update Over AT commands (FOAT) Firmware module upgrade over UART, USB and SPI interface using AT command. Functional description UBX-13001734 - B Advance Information Page 9 of 56 LISA-U2 series - Data Sheet Feature Rx Diversity Description Improved wireless link quality and reliability on all 2G and 3G operating bands except 2G DCS 1800. Not supported by LISA-U200, LISA-U260 and LISA-U270. SIM Access Profile (SAP) Allows access and use of a remote (U)SIM card instead of the local SIM card directly connected to the module (U)SIM interface. The module acts as an SAP Client establishing a connection and performing data exchange to an SAP Server directly connected to the remote SIM. The modules provide a dedicated USB SAP channel and dedicated multiplexer SAP channel over UART and SPI for communication with the remote (U)SIM card. Smart Temperature Supervisor Constant monitoring of the module board temperature: * Warning notification when the temperature approaches an upper or lower predefined threshold * Shutdown notified and forced when the temperature value is outside the specified range (shutdown suspended in case of an emergency call in progress) An AT command can enable or disable the Smart Temperature Supervisor feature (for more details refer to the u-blox AT commands manual [5], +USTS AT command). The sensor measures board temperature, which can differ from ambient temperature. In-Band Modem In-Band modem solution for eCall and ERA-GLONASS emergency call applications over cellular networks implemented according to the 3GPP TS 26.267 specification Error! Reference source not found.. When activated, the in-vehicle eCall / ERA-GLONASS system (IVS) creates an emergency call carrying both voice and data (including vehicle position data) directly to the nearest Public Safety Answering Point (PSAP) to determine whether rescue services should be dispatched to the known position. Power saving The power saving configuration is by default disabled, but it can be configured using an AT command. When power saving is enabled, the module automatically enters the low power idle-mode whenever possible, reducing current consumption. During idle-mode, the module processor core runs with the RTC 32 kHz reference clock, which is generated by the internal 32 kHz oscillator The feature can be enabled through the +UPSV AT command. Table 4: LISA-U2 series main supported features u-blox is extremely mindful of user privacy. When a position is sent to the CellLocate unable to track the SIM used or the specific device. TM server u-blox is Functional description UBX-13001734 - B Advance Information Page 10 of 56 LISA-U2 series - Data Sheet 2 Interfaces 2.1 Power Management 2.1.1 Module supply (VCC) Modules must be supplied through the VCC pin by a DC power supply. Voltages must be stable: during operation, the current drawn from VCC can vary by some order of magnitude, especially due to the surging consumption profile of the GSM system (described in the LISA-U System Integration Manual [6]). It is important that the system power supply circuit is able to support peak power. 2.1.2 RTC supply (V_BCKP) V_BCKP is the Real Time Clock (RTC) supply. When VCC voltage is within the valid operating range, the internal Power Management Unit (PMU) supplies the RTC and the same supply voltage is available on V_BCKP pin. If the VCC voltage is under the minimum operating limit (e.g. during not powered mode), the V_BCKP pin can externally supply the RTC. 2.1.3 Digital I/O interfaces supply (V_INT) LISA-U2 modules provide an internally generated supply rail output for digital interfaces (V_INT). This can be used in place of an external discrete regulator to supply pull-up resistors on the DDC interface. This optimizes the bill of material for various applications, e.g. with u-blox GPS/GNSS receivers operating at 1.8 V. 2.2 RF antenna interface The ANT pin has an impedance of 50 and represents the main Tx/Rx antenna interface. The ANT_DIV pin, provided only by LISA-U230 modules, has an impedance of 50 and represents the Rx diversity antenna interface. The integrated diversity receiver provides improved wireless link quality and reliability on all 2G and 3G operating bands except 2G DCS 1800. 2.3 System functions 2.3.1 Module power-on LISA-U2 modules can be switched on in one of the following ways: * Rising edge on the VCC pin to a valid voltage for module supply, i.e. applying module supply * Low pulse on the PWR_ON pin, i.e. forcing the pin (normally high with external pull-up) to a low level for a valid time period: PWR_ON pin requires an external pull-up resistor to set its value to logic high and may not be left floating * Rising edge on the RESET_N pin, i.e. releasing the pin from the low level, normally high with internal pull-up * RTC alarm, i.e. pre-programmed scheduled time by AT+CALA command Interfaces UBX-13001734 - B Advance Information Page 11 of 56 LISA-U2 series - Data Sheet 2.3.2 Module power-off LISA-U2 modules can be switched off, with proper storage of current parameter settings and network detach, in one of these ways: * AT+CPWROFF command * Low level on the PWR_ON pin for at least 1 s (not supported by LISA-U200-00S version) An under-voltage shutdown occurs when the VCC supply drops below the extended operating range minimum limit, but in this case it is not possible to perform the storing of the current parameter settings in the module's non-volatile memory as well as the proper network detach. An over-temperature or an under-temperature shutdown occurs when the temperature measured within the wireless module reaches the dangerous area, if the optional Smart Temperature Supervisor feature is enabled and configured by the dedicated AT command. For more details refer to LISA-U System Integration Manual [6] and u-blox AT commands manual [5], +USTS AT command. 2.3.3 Module reset LISA-U2 modules can be reset in one of these ways: * Forcing to the low level the RESET_N pin, normally high with internal pull-up. This causes an "external" or "hardware" reset of the entire module, including the integrated power management unit, except for the RTC internal block: the V_INT interfaces supply is switched off and all the digital pins are tri-stated, but the V_BCKP supply and the RTC block are enabled. Forcing an "external" or "hardware" reset, the current parameter settings are not saved in the module's non-volatile memory and a proper network detach is not performed * By the AT+CFUN command (refer to u-blox AT Commands Manual [5]). This causes an "internal" or "software" reset of the baseband processor, excluding the integrated power management unit and the RTC internal block: the V_INT interfaces supply is enabled and each digital pin is set to its internal reset state (reported in Table 6), the V_BCKP supply and the RTC block are enabled. When an "internal" or "software" reset is forced, the current parameter settings are saved in the module's non-volatile memory and a proper network detach is performed 2.4 (U)SIM interface A (U)SIM card interface is provided on the SMT pads of the LISA-U2 modules: the high-speed SIM/ME interface is implemented as well as automatic detection of the required SIM supporting voltage. Both 1.8 V and 3 V SIM types are supported (1.8 V and 3 V ME). Activation and deactivation with automatic voltage switch from 1.8 V to 3 V is implemented, according to ISO-IEC 7816-3 specifications. The SIM driver supports the PPS (Protocol and Parameter Selection) procedure for baud-rate selection, according to the values proposed by the SIM Card. Interfaces UBX-13001734 - B Advance Information Page 12 of 56 LISA-U2 series - Data Sheet 2.5 Serial communication LISA-U2 modules provide the following serial communication interfaces where AT command interface and Packet-Switched / Circuit-Switched Data communication are concurrently available: * One asynchronous serial interface (UART) * One Inter Processor Communication (IPC) interface: two handshake signals added to a SPI interface * One high-speed USB 2.0 compliant interface When used as AT command interface, all the serial communication interfaces listed above can be used for firmware upgrade using AT command (+UFWUPD, for more details refer to u-blox AT Commands Manual [5]), but only the following serial communication interfaces can be used for firmware upgrade using the u-blox Easy Flash tool: * The UART interface, using the RxD and TxD lines only (the other UART lines are not needed) * The USB interface, using all the provided lines (VUSB_DET, USB_D+ and USB_D-) 2.5.1 Asynchronous serial interface (UART) The UART interface is a 9-wire unbalanced asynchronous serial interface provided for all communications with LISA-U2 modules. UART features are: * Complete serial port with RS-232 functionality conforming to the ITU-T V.24 Recommendation [4], with CMOS compatible signal levels (0 V for low data bit or ON state and 1.8 V for high data bit or OFF state) * Data lines (RxD as output, TxD as input), hardware flow control lines (CTS as output, RTS as input), modem status and control lines (DTR as input, DSR as output, DCD as output, RI as output) are provided * Hardware flow control (default value), software flow control, or none flow control are supported * Power saving indication available on the hardware flow control output (CTS line): the line is driven to the OFF state when the module is not prepared to accept data by the UART interface * 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400, 460800 and 921600 b/s baud rates are supported for the AT interface * Autobauding is by default enabled * Frame format can be: * 8N2 (8 data bits, no parity, 2 stop bits) * 8N1 (8 data bits, no parity, 1 stop bit) 8 * 8E1 (8 data bits, even parity, 1 stop bit) * 8O1 (8 data bits, odd parity, 1 stop bit) 7E1 (7 data bits, even parity, 1 stop bit) * 7O1 (7 data bits, odd parity, 1 stop bit) * * Default frame configuration is 8N1 UART serial interface can be conveniently configured through AT commands. For more details refer to u-blox AT Commands Manual [5] (+IPR, +ICF, +IFC, &K, \Q, +UPSV AT command) and LISA-U series System Integration Manual [6]. 921600 b/s baud rate is not supported by LISA-U200-00S version. 8 If enabled Interfaces UBX-13001734 - B Advance Information Page 13 of 56 LISA-U2 series - Data Sheet 2.5.1.1 Autobauding feature Only one shot autobauding is supported. This means that the baud rate detection is performed once, at module start up. After detection the module works at the fixed baud rate (the detected one) and the baud rate can only be changed via the appropriate AT command (+IPR, for more details refer to u-blox AT Commands Manual [5]). * The module detects the followings baud rates (b/s): 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400 * The only detectable frame configurations are: 7E1, 7O1, 8N1, 8E1, 8O1 Autobauding is not supported by LISA-U200-00S. The default baud rate is 115200 b/s. 2.5.2 Universal Serial Bus (USB) LISA-U2 modules include a high-speed USB 2.0 compliant interface with maximum throughput of 480 Mb/s. The module itself acts as a USB device and can be connected to any USB host. The USB is the main interface for transferring high speed data between LISA-U2 series and a host processor. Signals USB_D+/USB_D- carry the USB serial data and signaling. The USB interface is automatically enabled by a valid USB VBUS supply voltage (5.0 V typical) on VUSB_DET pin. LISA-U2 modules provide 6 USB CDCs (Communications Device Class) with this configuration: * USB1: AT commands / data connection * USB2: AT commands / data connection * USB3: AT commands / data connection * USB4: GPS tunneling * USB5: Primary TraceLog (debug purpose) * USB6: Secondary TraceLog (debug purpose) All LISA-U2 modules versions except LISA-U200-00S provide an additional USB CDC: * USB7: SAP (SIM Access Profile) The user can concurrently use AT command interface on one CDC and Packet-Switched / Circuit-Switched Data communication on another CDC. USB CDC/ACM drivers are available for the following operating system platforms: * Windows 2000 * Windows XP * Windows Vista * Windows 7 * Windows CE 5.0 * Windows Embedded CE 6.0 * Windows Embedded Compact 7 * Windows Embedded Automotive 7 * Windows Mobile 5 * Windows Mobile 6 * Windows Mobile 6.1 * Windows Mobile 6.5 LISA-U2 modules are compatible with standard Linux/Android USB kernel drivers. Interfaces UBX-13001734 - B Advance Information Page 14 of 56 LISA-U2 series - Data Sheet 2.5.3 Serial Peripheral Interface (SPI) The LISA-U2 modules provide a 5-wire Inter Processor Communication (IPC) interface that includes two handshake signals (SPI_MRDY and SPI_SRDY) added to a standard 3-wire SPI-compatible serial interface (SPI_MOSI, SPI_MISO, SPI_SCLK). The LISA-U2 modules run natively as an SPI slave. The SPI / IPC interface can be used for high speed data transfer (UMTS/HSPA) between LISA-U2 modules and the host processor. The high speed communication (up to 26 Mb/s) between the two processors is possible only if both sides follow the same Inter Processor Communication (IPC) specifications. Refer to LISA-U series System Integration Manual [6] and SPI Interface Application Note [10] for a detailed description of the implementation of the SPI / IPC protocol. 2.5.4 Multiplexer protocol LISA-U2 module has a software layer with MUX functionality, 3GPP TS 27.010 Multiplexer Protocol [3], available either on the UART or on the SPI physical link. The multiplexer protocol is not supported by the USB interface. This is a data link protocol (layer 2 of OSI model) which uses HDLC-like framing and operates between the module (DCE) and the application processor (DTE) and allows simultaneous sessions over the used physical link (UART or SPI): the user can concurrently use AT command interface on one MUX channel and Packet-Switched / Circuit-Switched Data communication on another MUX channel. The multiplexer protocol can be used on one serial interface (UART or SPI) at a time. Each session consists of a stream of bytes transferring various kinds of data such as SMS, CBS, PSD, GPS, AT commands in general. LISA-U2 modules provide the following virtual channels: * Channel 0: control channel * Channel 1 - 5: AT commands / data connection * Channel 6: GPS tunneling All LISA-U2 modules versions except LISA-U200-00S provide an additional virtual channel: * Channel 7: SAP (SIM Access Profile) For more details refer to the GSM Mux Implementation Application Note [7]. 2.6 DDC (I2C) bus interface 2 All LISA-U2 modules versions except LISA-U200-00S version include an I C compatible DDC interface that is 2 available to communicate with a u-blox GPS/GNSS receiver and at the same time with an external I C device as 2 2 an audio codec: the LISA-U2 module acts as an I C master which can communicate with two I C slaves in 2 accordance to the I C bus specifications [9]. Interfaces UBX-13001734 - B Advance Information Page 15 of 56 LISA-U2 series - Data Sheet 2.7 Audio Not supported by LISA-U200-00S version. 2 LISA-U2 modules have two 4-wire I S digital audio interfaces: * 2 First 4-wire I S digital audio interface (I2S_CLK, I2S_RXD, I2S_TXD and I2S_WA) * Second 4-wire I S digital audio interface (I2S1_CLK, I2S1_RXD, I2S1_TXD and I2S1_WA) These audio paths are selected by parameters <main_uplink> and <main_downlink> in AT+USPM command (for more details refer to u-blox AT Commands Manual [5]). 2 LISA-U2 modules provide a digital clock output (CODEC_CLK) for an external audio codec. For further details about the hardware integration of the audio interface in an application design, refer to the LISA-U series System Integration Manual [6]. For further details about the possible settings of the audio interface, as well as the allowed input/output audio path combinations and as the default values related to the uplink/downlink path, refer to u-blox AT Commands Manual [5], +USPM AT command. 2.8 GPIO LISA-U2 modules provide up to 14 GPIO pins (GPIO1-GPIO14) which can be configured for general purpose input/output, or to provide the custom functions listed in Table 5 via u-blox AT commands (for further details refer to LISA-U series System Integration Manual [6] and u-blox AT Commands Manual [5], +UGPIOC, +UGPIOR, +UGPIOW, +UGPS, +UGPRF, +USPM, +UDCONF). Function Description Module Default GPIO Configurable GPIOs GSM Tx-burst indication GSM transmit slot indication All -- GPIO1 GPS supply enable Enable/disable the supply of u-blox GPS/GNSS receiver connected to wireless module All except LISA-U200-00S GPIO2 GPIO1, GPIO2, GPIO3, GPIO4, GPIO5 LISA-U200-00S -- -- All except LISA-U200-00S GPIO3 GPIO3 LISA-U200-00S -- -- All except LISA-U200-00S GPIO4 GPIO4 LISA-U200-00S -- -- GPS data ready Sense when u-blox GPS/GNSS receiver connected to wireless module is ready for sending data by the DDC (I2C) GPS RTC sharing RTC (Real Time Clock) synchronization signal to u-blox GPS/GNSS receiver connected to wireless module SIM card detection SIM card presence All GPIO5 GPIO5 SIM card hot insertion/removal SIM card hot insertion/removal All except LISA-U200-00S -- GPIO5 LISA-U200-00S -- -- Network status indication Network status: registered 2G / 3G home network, registered 2G / 3G roaming, 2G / 3G data transmission, no service All -- GPIO1, GPIO2, GPIO3, GPIO4, GPIO5 Module status indication Module status: power off mode, i.e. module switched off, versus idle, active or connected mode, i.e. module switched on All except LISA-U200-00S -- GPIO1, GPIO13 LISA-U200-00S -- -- Interfaces UBX-13001734 - B Advance Information Page 16 of 56 LISA-U2 series - Data Sheet Function Description Module Default GPIO Configurable GPIOs Module operating mode indication Module operating mode: idle mode versus active or connected mode All except LISA-U200-00S -- GPIO5, GPIO14 LISA-U200-00S -- -- All except LISA-U200-00S GPIO6, GPIO7, GPIO8, GPIO9 GPIO6, GPIO7, GPIO8, GPIO9 2 I S digital audio interface Second I2S digital audio interface (I2S1_RXD, I2S1_TXD, I2S1_CLK, I2S1_WA respectively) LISA-U200-00S -- -- SPI serial interface SPI / IPC serial interface (SPI_SCLK, SPI_MOSI, SPI_MISO, SPI_SRDY and SPI_MRDY respectively) All GPIO10, GPIO11, GPIO12, GPIO13 GPIO14 GPIO10, GPIO11, GPIO12, GPIO13 GPIO14 General purpose input Input to sense high or low digital level All except LISA-U200-00S -- All LISA-U200-00S -- GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, GPIO6, GPIO7, GPIO8, GPIO9 All except LISA-U200-00S -- All LISA-U200-00S -- GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, GPIO6, GPIO7, GPIO8, GPIO9 All except LISA-U200-00S GPIO1 All LISA-U200-00S GPIO1, GPIO2, GPIO3, GPIO4, GPIO6, GPIO7, GPIO8, GPIO9 GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, GPIO6, GPIO7, GPIO8, GPIO9 General purpose output Pad disabled Output to set the high or the low digital level Tri-state with an internal active pull-down enabled Table 5: GPIO custom functions configuration Interfaces UBX-13001734 - B Advance Information Page 17 of 56 LISA-U2 series - Data Sheet 3 Pin definition GND 66 ANT 68 GND 67 GND 69 GND 70 GND 71 GND 72 GND 73 GND 75 RSVD / ANT_DIV 74 GND 76 3.1 Pin assignment GND 65 1 GND 2 V_BCKP 3 GND 4 V_INT 5 RSVD 6 GND GND 60 7 GND SPI_MRDY / GPIO14 59 8 GND SPI_SRDY / GPIO13 58 9 DSR SPI_MISO / GPIO12 57 10 RI SPI_MOSI / GPIO11 56 11 DCD SPI_SCLK / GPIO10 55 12 DTR 13 RTS 14 CTS 15 TXD 16 RXD VSIM 50 17 GND SIM_RST 49 18 VUSB_DET 19 PWR_ON 20 GPIO1 21 GPIO2 22 RESET_N 23 GPIO3 RSVD / I2S_CLK 43 24 GPIO4 RSVD / I2S_TXD 42 25 GND 26 USB_D- 27 USB_D+ GND 64 VCC 63 VCC 62 VCC 61 GPIO9 / I2S1_WA 54 LISA-U2 Top View GPIO8 / I2S1_CLK 53 RSVD / CODEC_CLK 52 GPIO5 51 SIM_IO 48 SIM_CLK 47 SDA 46 SCL 45 RSVD / I2S_RXD 44 RSVD / I2S_WA 41 GPIO7 / I2S1_TXD 40 38 36 35 34 33 32 31 30 29 28 37 GPIO6 / I2S1_RXD 39 Pin 28...38 = GND Figure 2: LISA-U2 series pin assignment 1 All GND Power domain - N/A Ground All GND pins must be connected to ground. 2 All V_BCKP - I/O Real Time Clock supply input/output 3 All GND - N/A Ground V_BCKP = 1.8 V (typical) generated by the module to supply the Real Time Clock when VCC supply voltage is within valid operating range. A backup battery can be connected to this pin to supply the Real Time Clock when VCC supply voltage is not within valid operating range. See section 4.2.3 for detailed electrical specs. All GND pins must be connected to ground. 4 All V_INT - O Digital I/O Interfaces supply output No Module Name I/O Description Remarks V_INT = 1.8V (typical) generated by the module when it is switched-on and the RESET_N (external reset input pin) is not forced to the low level. See section 4.2.3 for detailed electrical specs. Pin definition UBX-13001734 - B Advance Information Page 18 of 56 LISA-U2 series - Data Sheet No Module Name Power domain I/O Description Remarks 5 All RSVD - N/A RESERVED pin This pin has special function: it must be connected to GND to allow module to work properly. 6 7 All All GND GND - N/A N/A Ground Ground All GND pins must be connected to ground. All GND pins must be connected to ground. 8 9 All All GND DSR GDI N/A O Ground UART data set ready 10 All RI GDI O UART ring indicator 11 All DCD GDI O UART data carrier detect All GND pins must be connected to ground. Circuit 107 (DSR) in ITU-T V.24. Output driver class D. PU/PD class a. Value at internal reset: T/PU. See section 4.2.9 for detailed electrical specs. Circuit 125 (RI) in ITU-T V.24. Output driver class C_0. PU/PD class c. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Circuit 109 (DCD) in ITU-T V.24. Output driver class C_0. PU/PD class c. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. 12 All DTR GDI I UART data terminal ready 13 All RTS GDI I UART ready to send 14 All CTS GDI O UART clear to send 15 All TXD GDI I UART transmitted data 16 All RXD GDI O UART received data 17 All GND - N/A Ground 18 All VUSB_DET USB I USB detect input Input for VBUS (5 V typical) USB supply sense. See section 4.2.10 for detailed electrical specs. 19 All PWR_ON POS I Power-on input 20 All GPIO1 GDI I/O GPIO 21 All GPIO2 GDI I/O GPIO 22 All RESET_N ERS I External reset input 23 All GPIO3 GDI I/O GPIO The PWR_ON pin has high input impedance: don't leave it floating in noisy environment (an external pull-up resistor is required) See section 4.2.6 for detailed electrical specs. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Output driver class E. PU/PD class b. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Internal 10 k pull-up resistor to V_BCKP. See section 4.2.7 for detailed electrical specs. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Circuit 108/2 (DTR) in ITU-T V. 24. Internal active pull-up to V_INT enabled. PU/PD class c. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Circuit 105 (RTS) in ITU-T V.24. Internal active pull-up to V_INT enabled. PU/PD class a. Value at internal reset: T/PU. See section 4.2.9 for detailed electrical specs. Circuit 106 (CTS) in ITU-T V.24. Output driver class A. PU/PD class a. Value at internal reset: T/PU. See section 4.2.9 for detailed electrical specs. Circuit 103 (TxD) in ITU-T V.24. Internal active pull-up to V_INT enabled. PU/PD class a. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Circuit 104 (RxD) in ITU-T V.24. Output driver class A. PU/PD class a. Value at internal reset: T/PU. See section 4.2.9 for detailed electrical specs. All GND pins must be connected to ground. Pin definition UBX-13001734 - B Advance Information Page 19 of 56 LISA-U2 series - Data Sheet No Module Name Power domain I/O Description Remarks 24 All GPIO4 GDI I/O GPIO 25 All GND - N/A Ground Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. All GND pins must be connected to ground. 26 All USB_D- USB I/O USB Data Line D- 27 All USB_D+ USB I/O USB Data Line D+ 28 29 All All GND GND - N/A N/A Ground Ground 90 nominal differential impedance Pull-up or pull-down resistors and external series resistors as required by the USB 2.0 high-speed specification [8] are part of the USB pin driver and need not be provided externally. Value at internal reset: T. See section 4.2.10 for detailed electrical specs. 90 nominal differential impedance Pull-up or pull-down resistors and external series resistors as required by the USB 2.0 high-speed specification [8] are part of the USB pin driver and need not be provided externally. Value at internal reset: T. See section 4.2.10 for detailed electrical specs. All GND pins must be connected to ground. All GND pins must be connected to ground. 30 31 All All GND GND - N/A N/A Ground Ground All GND pins must be connected to ground. All GND pins must be connected to ground. 32 All GND - N/A Ground All GND pins must be connected to ground. 33 34 All All GND GND - N/A N/A Ground Ground All GND pins must be connected to ground. All GND pins must be connected to ground. 35 36 All All GND GND - N/A N/A Ground Ground All GND pins must be connected to ground. All GND pins must be connected to ground. 37 38 All All GND GND - N/A N/A Ground Ground All GND pins must be connected to ground. All GND pins must be connected to ground. 39 LISA-U200-00S GPIO6 GDI I/O GPIO All except LISA-U200-00S I2S1_RXD / GPIO6 GDI I/ I/O 2nd I2S receive data / GPIO LISA-U200-00S GPIO7 GDI I/O GPIO All except LISA-U200-00S I2S1_TXD / GPIO7 GDI O/ I/O 2nd I2S transmit data / GPIO LISA-U200-00S RSVD - N/A RESERVED pin Can be configured as GPIO. Output driver class E. PU/PD class b. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Can be configured as receive data input of the second digital audio interface (with internal active pull-down to GND enabled), or as GPIO. Output driver class E. PU/PD class b. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Can be configured as GPIO. Output driver class E. PU/PD class b. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Can be configured as transmit data output of the second digital audio interface, or as GPIO. Output driver class E. PU/PD class b. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Pin disabled. All except LISA-U200-00S I2S_WA GDI I/O 1st I2S word alignment 40 41 Input with internal active pull-down to GND enabled in slave mode, Output in master mode. Output driver class C. PU/PD class a. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Pin definition UBX-13001734 - B Advance Information Page 20 of 56 LISA-U2 series - Data Sheet No Module Name Power domain I/O Description Remarks 42 LISA-U200-00S All except LISA-U200-00S RSVD I2S_TXD GDI N/A O RESERVED pin 1st I2S transmit data 43 LISA-U200-00S All except LISA-U200-00S RSVD I2S_CLK GDI N/A I/O RESERVED pin 1st I2S clock 44 LISA-U200-00S All except LISA-U200-00S RSVD I2S_RXD GDI N/A I RESERVED pin 1st I2S receive data 45 All SCL DDC O I2C bus clock line 46 All SDA DDC I/O I2C bus data line Pin disabled. Output driver class C. PU/PD class a. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Pin disabled. Input with internal active pull-down to GND enabled in slave mode, Output in master mode. Output driver class C. PU/PD class a. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Pin disabled. Internal active pull-down to GND enabled. PU/PD class a. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Fixed open drain. No internal pull-up. Value at internal reset: T. See section 4.2.11 for detailed electrical specs. Fixed open drain. No internal pull-up. Value at internal reset: T. See section 4.2.11 for detailed electrical specs. 47 All SIM_CLK SIM O SIM clock 48 All SIM_IO SIM I/O SIM data 49 All SIM_RST SIM O SIM reset 50 All VSIM - O SIM supply output 51 All GPIO5 GDI I/O GPIO 52 LISA-U200-00S All except LISA-U200-00S RSVD CODEC_CLK GDI N/A O RESERVED pin Clock output 53 LISA-U200-00S GPIO8 GDI I/O GPIO All except LISA-U200-00S I2S1_CLK / GPIO8 GDI I/O / I/O 2nd I2S clock / GPIO Value at internal reset: L. See section 4.2.8 for detailed electrical specs. Internal 4.7 k pull-up resistor to VSIM. Value at internal reset: L/PD. See section 4.2.8 for detailed electrical specs. Value at internal reset: L. See section 4.2.8 for detailed electrical specs. VSIM = 1.80 V typical or 2.90 V typical generated by the module according to the SIM card type. See section 4.2.3 for detailed electrical specs. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Pin disabled. Output driver class B. PU/PD class b. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Can be configured as GPIO. Output driver class E. PU/PD class b. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Can be configured as clock (Input with internal active pull-down to GND enabled in slave mode, Output in master mode) of the second digital audio interface, or as GPIO. Output driver class E. PU/PD class b. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Pin definition UBX-13001734 - B Advance Information Page 21 of 56 LISA-U2 series - Data Sheet No Module Name Power domain I/O Description Remarks 54 LISA-U200-00S GPIO9 GDI I/O GPIO All except LISA-U200-00S I2S1_WA / GPIO9 GDI I/O / I/O 2nd I2S word alignment / GPIO LISA-U200-00S SPI_SCLK GDI I SPI Serial Clock Input All except LISA-U200-00S SPI_SCLK / GPIO10 GDI I/ I/O SPI Serial Clock Input / GPIO LISA-U200-00S SPI_MOSI GDI I SPI Data Line Input All except LISA-U200-00S SPI_MOSI / GPIO11 GDI I/ I/O SPI Data Line Input / GPIO LISA-U200-00S SPI_MISO GDI O SPI Data Line Output Can be configured as GPIO. Output driver class E. PU/PD class b. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Can be configured as word alignment (Input with internal active pull-down to GND enabled in slave mode, Output in master mode) of the second digital audio interface, or as GPIO. Output driver class E. PU/PD class b. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. SPI Serial Clock Input: * Idle low (CPOL=0) * Internal active pull-down to GND enabled. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Can be set as SPI Serial Clock Input, or as GPIO When configured as SPI Serial Clock: * Idle low (CPOL=0) * Internal active pull-down to GND enabled. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. SPI Data Line Input: * Shift data on rising clock edge (CPHA=1) * Latch data on falling clock edge (CPHA=1) * Idle high. * Internal active pull-up to V_INT enabled. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Can be set as SPI Data Line Input, or as GPIO When configured as SPI Data Line Input: * Shift data on rising clock edge (CPHA=1) * Latch data on falling clock edge (CPHA=1) * Idle high. * Internal active pull-up to V_INT enabled. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. SPI Data Line Output: * Shift data on rising clock edge (CPHA=1) * Latch data on falling clock edge (CPHA=1) * Idle high Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. All except LISA-U200-00S SPI_MISO / GPIO12 GDI O/ I/O SPI Data Line Output / GPIO 55 56 57 Can be set as SPI Data Line Output, or as GPIO When configured as SPI Data Line Output: * Shift data on rising clock edge (CPHA=1) * Latch data on falling clock edge (CPHA=1) * Idle high Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Pin definition UBX-13001734 - B Advance Information Page 22 of 56 LISA-U2 series - Data Sheet No Module Name Power domain I/O Description Remarks 58 LISA-U200-00S SPI_SRDY GDI O SPI Slave Ready Output All except LISA-U200-00S SPI_SRDY / GPIO13 GDI O/ I/O SPI Slave Ready Output / GPIO LISA-U200-00S SPI_MRDY GDI I SPI Master Ready Input All except LISA-U200-00S SPI_MRDY / GPIO14 GDI I/ I/O SPI Master Ready Input / GPIO 60 61 All All GND VCC - N/A I Ground Module supply input 62 All VCC - I Module supply input 63 All VCC - I Module supply input 64 All GND - N/A Ground SPI Slave Ready Output: * Idle low Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Can be set as SPI Slave Ready Output, or as GPIO When configured as SPI Slave Ready Output: * Idle low Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. SPI Master Ready Input: * Idle low * Internal active pull-down to GND enabled Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. Can be set as SPI Master Ready Input, or as GPIO When configured as SPI Master Ready Input: * Idle low * Internal active pull-down to GND enabled Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.9 for detailed electrical specs. All GND pins must be connected to ground. All VCC pins must be connected to external supply All VCC pins must be connected to external supply All VCC pins must be connected to external supply All GND pins must be connected to ground. 65 All GND - N/A Ground All GND pins must be connected to ground. 66 67 All All GND GND - N/A N/A Ground Ground All GND pins must be connected to ground. All GND pins must be connected to ground. 68 All ANT - I/O 50 nominal impedance 69 All GND - N/A RF input/output for main Tx/Rx antenna Ground 70 71 All All GND GND - N/A N/A Ground Ground All GND pins must be connected to ground. All GND pins must be connected to ground. 72 73 All All GND GND - N/A N/A Ground Ground All GND pins must be connected to ground. All GND pins must be connected to ground. 74 All except LISA-U230 LISA-U230 RSVD - N/A RESERVED pin Leave unconnected. ANT_DIV - I 50 nominal impedance 75 All GND - N/A RF input for Rx diversity antenna Ground All GND pins must be connected to ground. 76 All GND - N/A Ground All GND pins must be connected to ground. 59 All GND pins must be connected to ground. Table 6: Pinout For more information about pinout refer to LISA-U series System Integration Manual [6]. Explanation of abbreviations and terms used is reported in Appendix A. Pin definition UBX-13001734 - B Advance Information Page 23 of 56 LISA-U2 series - Data Sheet 4 Electrical specifications Stressing the device above one or more of the ratings listed in the Absolute Maximum Rating section may cause permanent damage. These are stress ratings only. Operating the module at these or at any conditions other than those specified in the Operating Conditions sections (chapter 4.2) of the specification should be avoided. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Operating conditions ranges define those limits within which the functionality of the device is guaranteed. Where application information is given, it is advisory only and does not form part of the specification. 4.1 Absolute maximum rating Limiting values given below are in accordance with the Absolute Maximum Rating System (IEC 134). Symbol Description Condition Min. Max. Unit VCC ICC Module supply voltage Module supply current Input DC voltage at VCC pin Input DC current at VCC pin -0.30 5.50 2.50 V A VUSB_DET USB USB detection pin USB D+/D- pins Input DC voltage at VUSB_DET Input DC voltage at USB_D+ and USB_D- -0.30 -1.00 5.35 5.35 V V V_BCKP RTC supply voltage Input DC voltage at V_BCKP pin -0.15 2.00 V GDI DDC Generic digital interfaces DDC interface Input DC voltage at Generic digital interfaces pins Input DC voltage at DDC interface pins -0.30 -0.30 3.60 3.60 V V SIM ERS SIM interface External reset signal Input DC voltage at SIM interface pin Input DC voltage at External reset signal pin -0.30 -0.15 3.60 2.10 V V POS V_ANT Power-on input Antenna voltage Input DC voltage at Power-on signal pin Input DC voltage at ANT pin -0.30 -0.15 5.50 3.00 V V P_ANT Antenna power Input RF power at ANT pin -8 dBm Rho_ANT Tstg Antenna ruggedness Storage Temperature Output RF load mismatch ruggedness at ANT pin 10:1 90 VSWR C -40 Table 7: Absolute maximum ratings The product is not protected against overvoltage or reversed voltages. If necessary, voltage spikes exceeding the power supply voltage specification, given in table above, must be limited to values within the specified boundaries by using appropriate protection devices. Electrical specifications UBX-13001734 - B Advance Information Page 24 of 56 LISA-U2 series - Data Sheet 4.1.1 Maximum ESD Parameter Module ESD sensitivity for all pins except ANT and ANT_DIV pins Max. Unit Remarks All 1000 V Human Body Model according to JESD22-A114F ESD sensitivity for ANT pin All 1000 V Human Body Model according to JESD22-A114F ESD sensitivity for ANT_DIV pin LISA-U230 1000 V Human Body Model according to JESD22-A114F ESD immunity for ANT pin All 1000 V Contact Discharge according to IEC 61000-4-2 1000 V Air Discharge according to IEC 61000-4-2 4000 V Contact Discharge according to IEC 61000-4-2 8000 V Air Discharge according to IEC 61000-4-2 ESD immunity for ANT_DIV pin Min. Typ. LISA-U230 Table 8: Maximum ESD ratings LISA-U2 modules are Electrostatic Sensitive Devices (ESD) and require special precautions when handling. Electrical specifications UBX-13001734 - B Advance Information Page 25 of 56 LISA-U2 series - Data Sheet 4.2 Operating conditions Unless otherwise indicated, all operating condition specifications are at an ambient temperature of 25C. Operation beyond the operating conditions is not recommended and extended exposure beyond them may affect device reliability. 4.2.1 Operating temperature range Symbol Parameter Min. Max. Units Topr Operating temperature range -40 Typ. +85 C -20 +65 C -40 -20 C +65 +85 C Remarks Normal operating temperature range See chapter 4.2.1.1 Extended operating temperature range 1 See chapter 4.2.1.2 Extended operating temperature range 2 See chapter 4.2.1.3 Table 9: Environmental conditions 4.2.1.1 Normal operating temperature range The wireless module is fully functional and meets the 3GPP specification across the specified temperature range. 4.2.1.2 Extended operating temperature range 1 The wireless module is fully functional across the specified temperature range. Occasional deviations from the 3GPP specification may occur. 4.2.1.3 Extended operating temperature range 2 The wireless module is functional across the specified temperature range. Occasional deviations from the 3GPP specification may occur. Thermal protection including automatic shutdown is implemented for protection against overheating. Thermal protection is disabled for emergency calls. For more details, refer to u-blox AT Commands Manual [5], +USTS AT command). 4.2.2 Module thermal resistance Symbol Parameter Min. Rth,M-A Module-to-Ambient thermal resistance Rth,M-C Module-to-Case thermal resistance Typ. Max. Units Remarks 7 12 C/W 1.5 3.5 C/W Thermal resistance from the module internal temperature sensor to the ambient, with the module mounted on a 90 mm x 70 mm x 1.46 mm 4-Layers PCB with a high coverage of copper in still air conditions Thermal resistance from the module internal temperature sensor to the module case, evaluated as the thermal resistance from the module internal temperature sensor to the ambient, with the module mounted on a 90 mm x 70 mm x 1.46 mm 4-Layers PCB with a high coverage of copper, with a robust aluminum heat-sink on the back of the application board, with forced air ventilation Table 10: Module thermal resistance Electrical specifications UBX-13001734 - B Advance Information Page 26 of 56 LISA-U2 series - Data Sheet 4.2.3 Supply/Power pins Symbol Parameter 9 VCC Module supply normal operating input voltage Module supply extended operating input voltage 10 ICC_PEAK Module supply peak current consumption: peak of current consumption through the VCC pad during a GSM transmit burst, at VCC = 3.8 V, with a matched antenna (typ. value) or with a mismatched antenna (max. value) 11 RTC supply input voltage V_BCKP I_BCKP Min. Typ. Max. Unit 3.30 3.10 3.80 4.40 4.50 V V 2.00 2.50 A 1.80 1.90 1.00 RTC supply average current consumption, at V_BCKP = 1.8 V 2.00 V A Table 11: Input characteristics of Supply/Power pins Symbol Parameter Min. Typ. Max. Unit VSIM SIM supply output voltage 1.76 2.84 1.80 2.90 1.83 2.94 V V V_BCKP I_BCKP RTC supply output voltage RTC supply output current capability 1.71 1.80 1.89 3 V mA V_INT Digital I/O Interfaces supply output voltage 1.73 1.80 1.87 V V_INT_RIPPLE Digital I/O Interfaces supply output peak-to-peak voltage ripple during active or connected mode Digital I/O Interfaces supply output peak-to-peak voltage ripple during low power idle mode with power saving enabled Digital I/O Interfaces supply output current capability 15 mV 70 mV 70 mA I_INT Table 12: Output characteristics of Supply/Power pins 9 Input voltage at VCC must be above the normal operating range minimum limit to switch-on the module. Occasional deviations from the 3GPP specifications may occur. Ensure that input voltage at VCC never drops below the extended operating range minimum limit during module operation: the wireless module may switch-off when the VCC voltage value drops below the extended operating range minimum limit. 11 Use this figure to dimension maximum current capability of power supply. 10 Electrical specifications UBX-13001734 - B Advance Information Page 27 of 56 LISA-U2 series - Data Sheet 4.2.4 Current consumption 12 Table 13 reports VCC current consumption of LISA-U2 modules . Mode Band Power Off Mode 2G Cyclic Idle/Active-Mode (Power Saving enabled by AT+UPSV) All 2G bands All 2G bands All 2G bands GSM Connected (Talk) Mode 850 / 900 1800 / 1900 GPRS Connected Mode 850 / 900 1800 / 1900 EDGE Connected Mode 850 / 900 1800 / 1900 3G Cyclic Idle/Active-Mode (Power Saving enabled by AT+UPSV) All 3G bands All 3G bands All 3G bands UMTS Connected (Talk) Mode Band I Band II Band IV Band V / VI Band VIII HSDPA Connected Mode Band I Band II Band IV Band V / VI Band VIII Condition Current Consumption 13 Module is switched off by AT+CPWROFF < 60 A DRX = 9 14, AT+UPSV=2 or AT+UPSV=3, USB interface not attached to a USB host DRX = 5 15,AT+UPSV=1, USB interface not attached to a USB host DRX = 515,AT+UPSV=1, USB interface in the suspend state < 1.0 mA < 1.5 mA < 2.0 mA 1 Tx + 1 Rx slot (voice call) Maximum Tx power (32.5 dBm typ.) 1 Tx + 1 Rx slot (voice call) Maximum Tx power (29.5 dBm typ.) 4 Tx + 2 Rx slots (up to 85.6 kb/s UL, 42.8 kb/s DL) Maximum Tx power (30.5 dBm typ.) < 260 mA 4 Tx + 2 Rx slots (up to 85.6 kb/s UL, 42.8 kb/s DL) Maximum Tx power (27.5 dBm typ.) 4 Tx + 2 Rx slots (up to 236.8 kb/s UL, 118.4 kb/s DL) Maximum Tx power (25.0 dBm typ.) 4 Tx + 2 Rx slots (up to 236.8 kb/s UL, 118.4 kb/s DL) Maximum Tx power (24.0 dBm typ.) DRX = 9 16, AT+UPSV=2 or AT+UPSV=3, USB interface not attached to a USB host DRX = 7 17, AT+UPSV=1, USB interface not attached to a USB host DRX = 717, AT+UPSV=1, USB interface in the suspend state 12.2 kb/s UL, 12.2 kb/s DL Maximum Tx power (23.0 dBm typ.) < 450 mA 12.2 kb/s UL, 12.2 kb/s DL Maximum Tx power (23.0 dBm typ.) 12.2 kb/s UL, 12.2 kb/s DL Maximum Tx power (23.0 dBm typ.) 12.2 kb/s UL, 12.2 kb/s DL Maximum Tx power (23.0 dBm typ.) 12.2 kb/s UL, 12.2 kb/s DL Maximum Tx power (23.0 dBm typ.) 384 kb/s UL, 7.2 Mb/s / 21.1 Mb/s DL Maximum Tx power (23.0 dBm typ.) 384 kb/s UL, 7.2 Mb/s / 21.1 Mb/s DL Maximum Tx power (23.0 dBm typ.) 384 kb/s UL, 7.2 Mb/s / 21.1 Mb/s DL Maximum Tx power (23.0 dBm typ.) 384 kb/s UL, 7.2 Mb/s / 21.1 Mb/s DL Maximum Tx power (23.0 dBm typ.) 384 kb/s UL, 7.2 Mb/s / 21.1 Mb/s DL Maximum Tx power (23.0 dBm typ.) < 220 mA < 600 mA < 510 mA < 500 mA < 1.2 mA < 1.5 mA < 2.0 mA < 600 mA < 750 mA < 600 mA < 450 mA < 450 mA < 700 mA < 850 mA < 700 mA < 550 mA < 550 mA 12 It is assumed that no significant load is connected to any digital and analog pin except for antenna Maximum values for module average current consumption through VCC pins in the listed modes/conditions, at 25C, with VCC = 3.8 V, with a matched antenna. 14 Module is registered with the network, with a paging period of 2.12 s (2G network DRX setting = 9), with none neighbour cell. 15 Module is registered with the network, with a paging period of 1.18 s (2G network DRX setting = 5), with 16 neighbour cells. 16 Module is registered with the network, with a paging period of 5.12 s (3G network DRX setting = 9). 17 Module is registered with the network, with a paging period of 1.28 s (3G network DRX setting = 7). 13 Electrical specifications UBX-13001734 - B Advance Information Page 28 of 56 LISA-U2 series - Data Sheet Mode Band Condition Current Consumption 13 HSUPA Connected Mode Band I 5.76 Mb/s UL, 384 kb/s DL Maximum Tx power (21.0 dBm typ.) 5.76 Mb/s UL, 384 kb/s DL Maximum Tx power (21.0 dBm typ.) < 650 mA 5.76 Mb/s UL, 384 kb/s DL Maximum Tx power (21.0 dBm typ.) 5.76 Mb/s UL, 384 kb/s DL Maximum Tx power (21.0 dBm typ.) 5.76 Mb/s UL, 384 kb/s DL Maximum Tx power (21.0 dBm typ.) < 650 mA Band II Band IV Band V / VI Band VIII HSPA Connected Mode Band I Band II Band IV Band V / VI Band VIII 5.76 Mb/s UL, 7.2 Mb/s / 21.1 Mb/s DL Maximum Tx power (21.0 dBm typ.) 5.76 Mb/s UL, 7.2 Mb/s / 21.1 Mb/s DL Maximum Tx power (21.0 dBm typ.) 5.76 Mb/s UL, 7.2 Mb/s / 21.1 Mb/s DL Maximum Tx power (21.0 dBm typ.) 5.76 Mb/s UL, 7.2 Mb/s / 21.1 Mb/s DL Maximum Tx power (21.0 dBm typ.) 5.76 Mb/s UL, 7.2 Mb/s / 21.1 Mb/s DL Maximum Tx power (21.0 dBm typ.) < 800 mA < 500 mA < 500 mA < 650 mA < 800 mA < 650 mA < 500 mA < 500 mA Table 13: VCC current consumption 4.2.5 RF Performance Parameter Min. Max. Unit Remarks Frequency range GSM 850 Uplink Downlink 824 869 849 894 MHz MHz Module transmit Module receive Frequency range E-GSM 900 Uplink Downlink 880 925 915 960 MHz MHz Module transmit Module receive Frequency range DCS 1800 Uplink 1710 1785 MHz Module transmit Downlink Uplink 1805 1850 1880 1910 MHz MHz Module receive Module transmit Downlink Uplink 1930 830 1990 840 MHz MHz Module receive Module transmit Downlink Uplink 875 824 885 849 MHz MHz Module receive Module transmit Frequency range PCS 1900 Frequency range UMTS 800 (band VI) Frequency range UMTS 850 (band V) Downlink 869 894 MHz Module receive Frequency range UMTS 900 (band VIII) Uplink Downlink 880 925 915 960 MHz MHz Module transmit Module receive Frequency range UMTS 1700 (band IV) Uplink Downlink 1710 2110 1755 2155 MHz MHz Module transmit Module receive Frequency range UMTS 1900 (band II) Uplink Downlink 1850 1930 1910 1990 MHz MHz Module transmit Module receive Frequency range UMTS 2100 (band I) Uplink 1920 1980 MHz Module transmit Downlink 2110 2170 MHz Module receive Table 14: Operating RF frequency bands Electrical specifications UBX-13001734 - B Advance Information Page 29 of 56 LISA-U2 series - Data Sheet Parameter Min. Typ. Unit Remarks Receiver input sensitivity GSM 850 / E-GSM 900 Receiver input sensitivity DCS 1800 / PCS 1900 -102.0 -110.0 Max. dBm Downlink RF level @ BER Class II < 2.4 % -102.0 -109.0 dBm Downlink RF level @ BER Class II < 2.4 % Receiver input sensitivity UMTS 800 (band VI) Receiver input sensitivity UMTS 850 (band V) Receiver input sensitivity UMTS 900 (band VIII) Receiver input sensitivity UMTS 1700 (band IV) -106.7 -111.0 dBm Downlink RF level for RMC @ BER < 0.1 % -104.7 -112.0 dBm Downlink RF level for RMC @ BER < 0.1 % -103.7 -111.0 dBm Downlink RF level for RMC @ BER < 0.1 % -106.7 -111.0 dBm Downlink RF level for RMC @ BER < 0.1 % Receiver input sensitivity UMTS 1900 (band II) Receiver input sensitivity UMTS 2100 (band I) Condition: 50 source -104.7 -111.0 dBm Downlink RF level for RMC @ BER < 0.1 % -106.7 -111.0 dBm Downlink RF level for RMC @ BER < 0.1 % Table 15: Receiver sensitivity performance Parameter Maximum output power GSM 850 / E-GSM 900 Maximum output power DCS 1800 / PCS 1900 Maximum output power UMTS 800 (Band VI) Maximum output power UMTS 850 (Band V) Maximum output power UMTS 900 (Band VIII) Maximum output power UMTS 1700 (Band IV) Maximum output power UMTS 1900 (Band II) Maximum output power UMTS 2100 (Band I) Min. Typ. Max. Unit Remarks 32.5 32.5 dBm dBm Uplink burst RF power for GSM or GPRS 1-slot TCH at PCL 5 or Gamma 3 Uplink burst RF power for GPRS 2-slot TCH at Gamma 3 31.7 dBm Uplink burst RF power for GPRS 3-slot TCH at Gamma 3 30.5 27.0 dBm dBm Uplink burst RF power for GPRS 4-slot TCH at Gamma 3 Uplink burst RF power for EDGE 8PSK 1-slot TCH at PCL 8 or Gamma 6 27.0 26.2 dBm dBm Uplink burst RF power for EDGE 8PSK 2-slot TCH at Gamma 6 Uplink burst RF power for EDGE 8PSK 3-slot TCH at Gamma 6 25.0 29.5 dBm dBm Uplink burst RF power for EDGE 8PSK 4-slot TCH at Gamma 6 Uplink burst RF power for GSM or GPRS 1-slot TCH at PCL 0 or Gamma 3 29.5 28.7 dBm dBm Uplink burst RF power for GPRS 2-slot TCH at Gamma 3 Uplink burst RF power for GPRS 3-slot TCH at Gamma 3 27.5 dBm Uplink burst RF power for GPRS 4-slot TCH at Gamma 3 26.0 26.0 dBm dBm Uplink burst RF power for EDGE 8PSK 1-slot TCH at PCL 2 or Gamma 5 Uplink burst RF power for EDGE 8PSK 2-slot TCH at Gamma 5 25.2 24.0 dBm dBm Uplink burst RF power for EDGE 8PSK 3-slot TCH at Gamma 5 Uplink burst RF power for EDGE 8PSK 4-slot TCH at Gamma 5 23.0 dBm Uplink continuous RF power for RMC at maximum power 23.0 dBm Uplink continuous RF power for RMC at maximum power 23.0 dBm Uplink continuous RF power for RMC at maximum power 23.0 dBm Uplink continuous RF power for RMC at maximum power 23.0 dBm Uplink continuous RF power for RMC at maximum power 23.0 dBm Uplink continuous RF power for RMC at maximum power Condition for all parameters: 50 output load Condition for GPRS/EDGE multi-slot output power: Multi-Slot Power Reduction profile 2 (+UDCONF AT command default value) Table 16: Transmitter maximum output power Electrical specifications UBX-13001734 - B Advance Information Page 30 of 56 LISA-U2 series - Data Sheet 4.2.6 PWR_ON pin Pin Name Parameter Min. Typ. Max. Unit Remarks PWR_ON Internal supply for Power-On Input Signal L-level input 1.71 1.80 1.89 V RTC supply (V_BCKP) -0.30 0.65 V High input impedance (no internal pull-up) H-level input L-level input current 1.50 4.40 V A High input impedance (no internal pull-up) PWR_ON low time to switch-on the module PWR_ON low time to switch-off the module 50 80 s -6 1000 ms Not supported by LISA-U200-00S Table 17: PWR_ON pin characteristics (POS domain) 4.2.7 RESET_N pin Pin Name Parameter Min. Typ. Max. Unit Remarks RESET_N Internal supply for External Reset Input Signal L-level input 1.71 1.80 1.89 V RTC supply (V_BCKP) -0.30 0.51 V 1.32 2.01 V A H-level input L-level input current -180 Pull-up resistance RESET_N low time to perform a proper reset 10 k ms 50 Internal pull-up to RTC supply (V_BCKP) Table 18: RESET_N pin characteristics (ERS domain) 4.2.8 (U)SIM pins The SIM pins are a dedicated interface to the (U)SIM chip card/IC. The electrical characteristics fulfill regulatory specification requirements. The values in Table 19 are for information only. Parameter Min. Low-level input High-level input Typ. Max. Unit Remarks 0.00 0.00 0.35 0.57 V V VSIM = 1.80 V VSIM = 2.90 V 1.29 2.07 3.30 3.30 V V VSIM = 1.80 V VSIM = 2.90 V Low-level output 0.00 0.35 V VSIM = 1.80 V, Max value at IOL = +1.0 mA 0.35 High-level output 1.26 0.00 1.80 V V VSIM = 2.90 V, Max value at IOL = +1.0 mA VSIM = 1.80 V, Min value at IOH = -1.0 mA 2.03 2.90 V A VSIM = 2.90 V, Min value at IOH = -1.0 mA 0.2V < VIN < 3.3V Input/Output leakage current Internal pull-up resistor on SIM_IO to VSIM Clock frequency on SIM_CLK 0.7 4.7 k 3.25 MHz Table 19: (U)SIM pins characteristics (SIM domain) Electrical specifications UBX-13001734 - B Advance Information Page 31 of 56 LISA-U2 series - Data Sheet 4.2.9 Generic Digital Interfaces pins Parameter Min. Typ. Max. Unit Remarks Internal supply for GDI domain Input characteristic: L-level input Input characteristic: H-level input 1.73 -0.20 1.80 1.87 0.35 V V Digital I/O Interfaces supply (V_INT) 1.93 V 0.00 0.00 0.20 0.35 V V Max value at IOL = +0.1 mA for driver class A Max value at IOL = +6.0 mA for driver class A 0.00 0.00 0.20 0.35 V V Max value at IOL = +0.1 mA for driver class B Max value at IOL = +4.0 mA for driver class B 0.00 0.20 V Max value at IOL = +0.1 mA for driver class C 0.00 0.00 0.35 0.45 V V Max value at IOL = +2.0 mA for driver class C Max value at IOL = +2.0 mA for driver class C_0 0.00 0.00 0.20 0.35 V V Max value at IOL = +0.1mA for driver class D Max value at IOL = +1.0 mA for driver class D 0.00 1.80 0.20 1.45 V V Max value at IOL = +0.1 mA for driver class E Min value at IOH = -6.0 mA for driver class A 1.60 1.80 V Min value at IOH = -0.1 mA for driver class A 1.45 1.60 1.80 1.80 V V Min value at IOH = -4.0 mA for driver class B Min value at IOH = -0.1 mA for driver class B 1.45 1.60 1.80 1.80 V V Min value at IOH = -2.0 mA for driver class C Min value at IOH = -0.1 mA for driver class C 1.35 1.45 1.80 1.80 V V Min value at IOH = -2.0 mA for driver class C_0 Min value at IOH = -1.0 mA for driver class D 1.60 1.60 1.80 1.80 V V Min value at IOH = -0.1 mA for driver class D Min value at IOH = -0.1 mA for driver class E 1.31 Output characteristics: L-level output Output characteristics: H-level output Input/Output leakage current 0.7 A 0.2 V < VIN < 1.93 V Pull-up input current -240 -150 A A PU Class a PU Class b -125 +200 A A PU Class c PD Class a +150 +45 A A PD Class b PD Class c Pull-down input current Table 20: Generic Digital Interfaces pins characteristics (GDI domain) 4.2.9.1 AC characteristics of digital audio interfaces pins 2 The 4-wire I S digital audio interfaces can be configured in 4 different modes: * Normal I S mode - Master mode * Normal I S mode - Slave mode * PCM mode - Master mode * PCM mode - Slave mode 2 2 2 AC characteristics of the 4 different modes of the I S digital audio interfaces are reported as follows. Electrical specifications UBX-13001734 - B Advance Information Page 32 of 56 LISA-U2 series - Data Sheet 2 Normal I S mode - Master mode T1 T2 T3 CLK (Output) T4 T5 TXD / WA (Output) T6 T7 RXD (Input) Figure 3: AC characteristics of digital audio interface in Normal I2S mode (<I2S_mode> = 2,4,6,8,10,12) and Master mode enabled T1 T2 T3 CLK (Output) T4 T5 TXD / WA (Output) T6 T7 RXD (Input) Figure 4: AC characteristics of digital audio interface in Normal I2S mode (<I2S_mode> = 3,5,7,9,11,13) and Master mode enabled Parameter T1 1/T1 Description 2 I S clock period I2S clock frequency Min. Typ. 3.902 2.830 2.600 Max. Unit Remarks 3.906 s <I2S_sample_rate>=0 2.834 2.604 s s <I2S_sample_rate>=1 <I2S_sample_rate>=2 1.949 1.413 1.953 1.417 s s <I2S_sample_rate>=3 <I2S_sample_rate>=4 1.298 0.973 1.302 0.977 s s <I2S_sample_rate>=5 <I2S_sample_rate>=6 0.705 0.647 0.709 0.651 s s <I2S_sample_rate>=7 <I2S_sample_rate>=8 256.0 256.3 kHz <I2S_sample_rate>=0 352.8 384.0 353.3 384.6 kHz kHz <I2S_sample_rate>=1 <I2S_sample_rate>=2 512.0 705.6 513.1 707.6 kHz kHz <I2S_sample_rate>=3 <I2S_sample_rate>=4 768.0 770.4 kHz <I2S_sample_rate>=5 Electrical specifications UBX-13001734 - B Advance Information Page 33 of 56 LISA-U2 series - Data Sheet Parameter T2 T3 Description I2S clock high time I2S clock low time Min. Typ. Max. Unit Remarks 1024 1028 kHz <I2S_sample_rate>=6 1411 1536 1419 1545 kHz kHz <I2S_sample_rate>=7 <I2S_sample_rate>=8 1.933 1.397 1.953 1.417 s s <I2S_sample_rate>=0 <I2S_sample_rate>=1 1.282 0.957 1.302 0.977 s s <I2S_sample_rate>=2 <I2S_sample_rate>=3 0.689 0.709 s <I2S_sample_rate>=4 0.631 0.468 0.651 0.488 s s <I2S_sample_rate>=5 <I2S_sample_rate>=6 0.334 0.306 0.354 0.326 s s <I2S_sample_rate>=7 <I2S_sample_rate>=8 1.933 1.397 1.953 1.417 s s <I2S_sample_rate>=0 <I2S_sample_rate>=1 1.282 1.302 s <I2S_sample_rate>=2 0.957 0.689 0.977 0.709 s s <I2S_sample_rate>=3 <I2S_sample_rate>=4 0.631 0.468 0.651 0.488 s s <I2S_sample_rate>=5 <I2S_sample_rate>=6 0.334 0.306 0.354 0.326 s s <I2S_sample_rate>=7 <I2S_sample_rate>=8 125.0 s <I2S_sample_rate>=0 90.70 83.33 s s <I2S_sample_rate>=1 <I2S_sample_rate>=2 62.50 45.35 s s <I2S_sample_rate>=3 <I2S_sample_rate>=4 41.67 31.25 s s <I2S_sample_rate>=5 <I2S_sample_rate>=6 22.68 s <I2S_sample_rate>=7 20.83 8.000 s kHz <I2S_sample_rate>=8 <I2S_sample_rate>=0 11.03 12.00 kHz kHz <I2S_sample_rate>=1 <I2S_sample_rate>=2 16.00 22.05 kHz kHz <I2S_sample_rate>=3 <I2S_sample_rate>=4 24.00 kHz <I2S_sample_rate>=5 32.00 44.10 kHz kHz <I2S_sample_rate>=6 <I2S_sample_rate>=7 I2S word alignment period I2S word alignment frequency 48.00 T4 T5 T6 I2S TXD invalid before I2S CLK high end (before shifting edge of I2S CLK) 24 kHz ns <I2S_sample_rate>=8 <I2S_mode> = 2,4,6,8,10,12 I2S TXD invalid before I2S CLK low end (before shifting edge of I2S CLK) I2S TXD valid after I2S CLK low begin (after shifting edge of I2S CLK) I2S TXD valid after I2S CLK high begin (after shifting edge of I2S CLK) I2S RXD setup time before I2S CLK low end (before latching edge of I2S CLK) 24 ns <I2S_mode> = 3,5,7,9,11,13 32 ns <I2S_mode> = 2,4,6,8,10,12 32 ns <I2S_mode> = 3,5,7,9,11,13 60 ns <I2S_mode> = 2,4,6,8,10,12 60 ns <I2S_mode> = 3,5,7,9,11,13 I2S RXD setup time before I2S CLK high end (before latching edge of I2S CLK) Electrical specifications UBX-13001734 - B Advance Information Page 34 of 56 LISA-U2 series - Data Sheet Parameter Description 2 T7 Min. 2 I S RXD hold time after I S CLK high begin (after latching edge of I2S CLK) I2S RXD hold time after I2S CLK low begin (after latching edge of I2S CLK) Typ. Max. Unit Remarks 10 ns <I2S_mode> = 2,4,6,8,10,12 10 ns <I2S_mode> = 3,5,7,9,11,13 Table 21: AC characteristics of digital audio interface in Normal I2S mode and Master mode enabled 2 Normal I S mode - Slave mode T1 CLK (Input) T4 T5 TXD (Output) T6 T7 RXD / WA (Input) Figure 5: AC characteristics of digital audio interface in Normal I2S mode (<I2S_mode> = 2,4,6,8,10,12) and Slave mode enabled T1 CLK (Input) T4 T5 TXD (Output) T6 T7 RXD / WA (Input) Figure 6: AC characteristics of digital audio interface in Normal I2S mode (<I2S_mode> = 3,5,7,9,11,13) and Slave mode enabled Parameter T1 Description 2 I S clock period Min. Typ. Max. Unit Remarks 3.906 s <I2S_sample_rate>=0 2.834 2.604 s s <I2S_sample_rate>=1 <I2S_sample_rate>=2 1.953 1.417 s s <I2S_sample_rate>=3 <I2S_sample_rate>=4 1.302 0.977 s s <I2S_sample_rate>=5 <I2S_sample_rate>=6 0.709 s <I2S_sample_rate>=7 0.651 s <I2S_sample_rate>=8 Electrical specifications UBX-13001734 - B Advance Information Page 35 of 56 LISA-U2 series - Data Sheet Parameter 1/T1 Description Min. Typ. Max. Unit Remarks 256.0 kHz <I2S_sample_rate>=0 352.8 384.0 kHz kHz <I2S_sample_rate>=1 <I2S_sample_rate>=2 512.0 705.6 kHz kHz <I2S_sample_rate>=3 <I2S_sample_rate>=4 768.0 1024 kHz kHz <I2S_sample_rate>=5 <I2S_sample_rate>=6 1411 kHz <I2S_sample_rate>=7 1536 125.0 kHz s <I2S_sample_rate>=8 <I2S_sample_rate>=0 90.70 83.33 s s <I2S_sample_rate>=1 <I2S_sample_rate>=2 62.50 45.35 s s <I2S_sample_rate>=3 <I2S_sample_rate>=4 41.67 s <I2S_sample_rate>=5 31.25 22.68 s s <I2S_sample_rate>=6 <I2S_sample_rate>=7 8.000 s kHz <I2S_sample_rate>=8 <I2S_sample_rate>=0 11.03 12.00 kHz kHz <I2S_sample_rate>=1 <I2S_sample_rate>=2 16.00 kHz <I2S_sample_rate>=3 22.05 24.00 kHz kHz <I2S_sample_rate>=4 <I2S_sample_rate>=5 32.00 44.10 kHz kHz <I2S_sample_rate>=6 <I2S_sample_rate>=7 48.00 24 kHz ns <I2S_sample_rate>=8 <I2S_mode> = 2,4,6,8,10,12 24 ns <I2S_mode> = 3,5,7,9,11,13 32 ns <I2S_mode> = 2,4,6,8,10,12 32 ns <I2S_mode> = 3,5,7,9,11,13 2 I S clock frequency I2S word alignment period 20.83 I2S word alignment frequency T4 T5 T6 T7 I2S TXD invalid before I2S CLK falling edge (before shifting edge of I2S CLK) I2S TXD invalid before I2S CLK rising edge (before shifting edge of I2S CLK) I2S TXD valid after I2S CLK falling edge (after shifting edge of I2S CLK) I2S TXD valid after I2S CLK rising edge (after shifting edge of I2S CLK) I2S RXD setup time before I2S CLK rising edge (before latching edge of I2S CLK) I2S RXD setup time before I2S CLK falling edge (before latching edge of I2S CLK) I2S RXD hold time after I2S CLK rising edge (after latching edge of I2S CLK) 60 ns <I2S_mode> = 2,4,6,8,10,12 60 ns <I2S_mode> = 3,5,7,9,11,13 10 ns <I2S_mode> = 2,4,6,8,10,12 I2S RXD hold time after I2S CLK falling edge (after latching edge of I2S CLK) 10 ns <I2S_mode> = 3,5,7,9,11,13 Table 22: AC characteristics of digital audio interface in Normal I2S mode and Slave mode enabled Electrical specifications UBX-13001734 - B Advance Information Page 36 of 56 LISA-U2 series - Data Sheet PCM mode - Master mode WA (Output) T4 T1 T5 CLK (Output) T2 TXD (Output) T3 T6 LSB T7 MSB T8 RXD (Input) LSB T9 MSB Figure 7: AC characteristics of digital audio interface in PCM mode (<I2S_mode> = 0) and Master mode enabled WA (Output) T4 T5 T1 CLK (Output) T6 TXD (Output) LSB T7 LSB T3 MSB T8 RXD (Input) T2 T9 MSB Figure 8: AC characteristics of digital audio interface in PCM mode (<I2S_mode> = 1) and Master mode enabled Parameter T1 Description 2 I S clock period Min. Typ. 6.940 7.349 Max. Unit Remarks 6.944 s <I2S_mode>=0, <I2S_sample_rate>=0 7.353 s <I2S_mode>=1, <I2S_sample_rate>=0 5.035 5.331 5.039 5.335 s s <I2S_mode>=0, <I2S_sample_rate>=1 <I2S_mode>=1, <I2S_sample_rate>=1 4.626 4.898 4.630 4.902 s s <I2S_mode>=0, <I2S_sample_rate>=2 <I2S_mode>=1, <I2S_sample_rate>=2 3.468 3.672 3.472 3.676 s s <I2S_mode>=0, <I2S_sample_rate>=3 <I2S_mode>=1, <I2S_sample_rate>=3 2.516 2.664 2.520 2.668 s s <I2S_mode>=0, <I2S_sample_rate>=4 <I2S_mode>=1, <I2S_sample_rate>=4 2.311 2.315 s <I2S_mode>=0, <I2S_sample_rate>=5 2.447 1.732 2.451 1.736 s s <I2S_mode>=1, <I2S_sample_rate>=5 <I2S_mode>=0, <I2S_sample_rate>=6 1.834 1.256 1.838 1.260 s s <I2S_mode>=1, <I2S_sample_rate>=6 <I2S_mode>=0, <I2S_sample_rate>=7 1.330 1.153 1.334 1.157 s s <I2S_mode>=1, <I2S_sample_rate>=7 <I2S_mode>=0, <I2S_sample_rate>=8 1.221 1.225 s <I2S_mode>=1, <I2S_sample_rate>=8 Electrical specifications UBX-13001734 - B Advance Information Page 37 of 56 LISA-U2 series - Data Sheet Parameter 1/T1 T2 T3 Description Min. 2 I S clock frequency I2S clock low time I2S clock high time Typ. Max. Unit Remarks 144.0 144.1 kHz <I2S_mode>=0, <I2S_sample_rate>=0 136.0 198.5 136.1 198.6 kHz kHz <I2S_mode>=1, <I2S_sample_rate>=0 <I2S_mode>=0, <I2S_sample_rate>=1 187.4 216.0 187.6 216.2 kHz kHz <I2S_mode>=1, <I2S_sample_rate>=1 <I2S_mode>=0, <I2S_sample_rate>=2 204.0 288.0 204.2 288.3 kHz kHz <I2S_mode>=1, <I2S_sample_rate>=2 <I2S_mode>=0, <I2S_sample_rate>=3 272.0 272.3 kHz <I2S_mode>=1, <I2S_sample_rate>=3 396.9 374.9 397.5 375.4 kHz kHz <I2S_mode>=0, <I2S_sample_rate>=4 <I2S_mode>=1, <I2S_sample_rate>=4 432.0 408.0 432.7 408.7 kHz kHz <I2S_mode>=0, <I2S_sample_rate>=5 <I2S_mode>=1, <I2S_sample_rate>=5 576.0 544.0 577.3 545.2 kHz kHz <I2S_mode>=0, <I2S_sample_rate>=6 <I2S_mode>=1, <I2S_sample_rate>=6 793.8 796.3 kHz <I2S_mode>=0, <I2S_sample_rate>=7 749.7 864.0 752.0 867.0 kHz kHz <I2S_mode>=1, <I2S_sample_rate>=7 <I2S_mode>=0, <I2S_sample_rate>=8 816.0 3.472 818.7 3.452 kHz s <I2S_mode>=1, <I2S_sample_rate>=8 <I2S_mode>=0, <I2S_sample_rate>=0 3.656 2.500 3.676 2.520 s s <I2S_mode>=1, <I2S_sample_rate>=0 <I2S_mode>=0, <I2S_sample_rate>=1 2.648 2.668 s <I2S_mode>=1, <I2S_sample_rate>=1 2.295 2.431 2.315 2.451 s s <I2S_mode>=0, <I2S_sample_rate>=2 <I2S_mode>=1, <I2S_sample_rate>=2 1.716 1.818 1.736 1.838 s s <I2S_mode>=0, <I2S_sample_rate>=3 <I2S_mode>=1, <I2S_sample_rate>=3 1.240 1.314 1.260 1.334 s s <I2S_mode>=0, <I2S_sample_rate>=4 <I2S_mode>=1, <I2S_sample_rate>=4 1.137 1.157 s <I2S_mode>=0, <I2S_sample_rate>=5 1.205 0.848 1.225 0.868 s s <I2S_mode>=1, <I2S_sample_rate>=5 <I2S_mode>=0, <I2S_sample_rate>=6 0.899 0.610 0.919 0.630 s s <I2S_mode>=1, <I2S_sample_rate>=6 <I2S_mode>=0, <I2S_sample_rate>=7 0.647 0.559 0.667 0.579 s s <I2S_mode>=1, <I2S_sample_rate>=7 <I2S_mode>=0, <I2S_sample_rate>=8 0.593 0.613 s <I2S_mode>=1, <I2S_sample_rate>=8 3.452 3.656 3.472 3.676 s s <I2S_mode>=0, <I2S_sample_rate>=0 <I2S_mode>=1, <I2S_sample_rate>=0 2.500 2.648 2.520 2.668 s s <I2S_mode>=0, <I2S_sample_rate>=1 <I2S_mode>=1, <I2S_sample_rate>=1 2.295 2.431 2.315 2.451 s s <I2S_mode>=0, <I2S_sample_rate>=2 <I2S_mode>=1, <I2S_sample_rate>=2 1.716 1.818 1.736 1.838 s s <I2S_mode>=0, <I2S_sample_rate>=3 <I2S_mode>=1, <I2S_sample_rate>=3 1.240 1.260 s <I2S_mode>=0, <I2S_sample_rate>=4 1.314 1.137 1.334 1.157 s s <I2S_mode>=1, <I2S_sample_rate>=4 <I2S_mode>=0, <I2S_sample_rate>=5 1.205 0.848 1.225 0.868 s s <I2S_mode>=1, <I2S_sample_rate>=5 <I2S_mode>=0, <I2S_sample_rate>=6 0.899 0.610 0.919 0.630 s s <I2S_mode>=1, <I2S_sample_rate>=6 <I2S_mode>=0, <I2S_sample_rate>=7 0.647 0.667 s <I2S_mode>=1, <I2S_sample_rate>=7 Electrical specifications UBX-13001734 - B Advance Information Page 38 of 56 LISA-U2 series - Data Sheet Parameter Description Min. Typ. 0.559 0.593 I2S word alignment period I2S word alignment frequency Max. Unit Remarks 0.579 s <I2S_mode>=0, <I2S_sample_rate>=8 0.613 125.0 s s <I2S_mode>=1, <I2S_sample_rate>=8 <I2S_sample_rate>=0 90.70 83.33 s s <I2S_sample_rate>=1 <I2S_sample_rate>=2 62.50 45.35 s s <I2S_sample_rate>=3 <I2S_sample_rate>=4 41.67 s <I2S_sample_rate>=5 31.25 22.68 s s <I2S_sample_rate>=6 <I2S_sample_rate>=7 20.83 8.000 s kHz <I2S_sample_rate>=8 <I2S_sample_rate>=0 11.03 12.00 kHz kHz <I2S_sample_rate>=1 <I2S_sample_rate>=2 16.00 kHz <I2S_sample_rate>=3 22.05 24.00 kHz kHz <I2S_sample_rate>=4 <I2S_sample_rate>=5 32.00 44.10 kHz kHz <I2S_sample_rate>=6 <I2S_sample_rate>=7 kHz ns <I2S_sample_rate>=8 <I2S_mode> = 0 48.00 T4 I2S CLK high begin to I2S WA high begin -24 T5 I2S CLK low end to I2S WA high end -24 T6 T7 I2S TXD invalid before I2S CLK low end I2S TXD valid after I2S CLK high begin T8 T9 I2S RXD setup time before I2S CLK high end I2S RXD hold time after I2S CLK low begin 60 12 32 32 ns <I2S_mode> = 0 24 22 ns ns <I2S_mode> = 0 <I2S_mode> = 0 ns ns <I2S_mode> = 0 <I2S_mode> = 0 Table 23: AC characteristics of digital audio interface in PCM mode (<I2S_mode> = 0,1) and Master mode enabled Electrical specifications UBX-13001734 - B Advance Information Page 39 of 56 LISA-U2 series - Data Sheet PCM mode - Slave mode WA (Input) T4 T5 T1 CLK (Input) T6 TXD (Output) LSB T7 MSB T9 T8 RXD (Input) LSB MSB Figure 9: AC characteristics of digital audio interface in PCM mode (<I2S_mode> = 0) and Slave mode enabled WA (Input) T4 T5 T1 CLK (Input) T6 TXD (Output) LSB T7 MSB T8 RXD (Input) LSB T9 MSB Figure 10: AC characteristics of digital audio interface in PCM mode (<I2S_mode> = 1) and Slave mode enabled Parameter T1 Description 2 I S clock period Min. Typ. Max. Unit Remarks 6.944 s <I2S_mode>=0, <I2S_sample_rate>=0 7.353 s <I2S_mode>=1, <I2S_sample_rate>=0 5.039 5.335 s s <I2S_mode>=0, <I2S_sample_rate>=1 <I2S_mode>=1, <I2S_sample_rate>=1 4.630 4.902 s s <I2S_mode>=0, <I2S_sample_rate>=2 <I2S_mode>=1, <I2S_sample_rate>=2 3.472 3.676 s s <I2S_mode>=0, <I2S_sample_rate>=3 <I2S_mode>=1, <I2S_sample_rate>=3 2.520 s <I2S_mode>=0, <I2S_sample_rate>=4 2.668 2.315 s s <I2S_mode>=1, <I2S_sample_rate>=4 <I2S_mode>=0, <I2S_sample_rate>=5 2.451 1.736 s s <I2S_mode>=1, <I2S_sample_rate>=5 <I2S_mode>=0, <I2S_sample_rate>=6 1.838 1.260 s s <I2S_mode>=1, <I2S_sample_rate>=6 <I2S_mode>=0, <I2S_sample_rate>=7 1.334 s <I2S_mode>=1, <I2S_sample_rate>=7 1.157 1.225 s s <I2S_mode>=0, <I2S_sample_rate>=8 <I2S_mode>=1, <I2S_sample_rate>=8 Electrical specifications UBX-13001734 - B Advance Information Page 40 of 56 LISA-U2 series - Data Sheet Parameter 1/T1 Description 2 I S clock frequency Min. Typ. Max. Unit Remarks 144.0 kHz <I2S_mode>=0, <I2S_sample_rate>=0 136.0 198.5 kHz kHz <I2S_mode>=1, <I2S_sample_rate>=0 <I2S_mode>=0, <I2S_sample_rate>=1 187.4 216.0 kHz kHz <I2S_mode>=1, <I2S_sample_rate>=1 <I2S_mode>=0, <I2S_sample_rate>=2 204.0 288.0 kHz kHz <I2S_mode>=1, <I2S_sample_rate>=2 <I2S_mode>=0, <I2S_sample_rate>=3 272.0 kHz <I2S_mode>=1, <I2S_sample_rate>=3 396.9 374.9 kHz kHz <I2S_mode>=0, <I2S_sample_rate>=4 <I2S_mode>=1, <I2S_sample_rate>=4 432.0 408.0 kHz kHz <I2S_mode>=0, <I2S_sample_rate>=5 <I2S_mode>=1, <I2S_sample_rate>=5 576.0 544.0 kHz kHz <I2S_mode>=0, <I2S_sample_rate>=6 <I2S_mode>=1, <I2S_sample_rate>=6 793.8 kHz <I2S_mode>=0, <I2S_sample_rate>=7 749.7 864.0 kHz kHz <I2S_mode>=1, <I2S_sample_rate>=7 <I2S_mode>=0, <I2S_sample_rate>=8 125.0 kHz s <I2S_mode>=1, <I2S_sample_rate>=8 <I2S_sample_rate>=0 90.70 83.33 s s <I2S_sample_rate>=1 <I2S_sample_rate>=2 62.50 s <I2S_sample_rate>=3 45.35 41.67 s s <I2S_sample_rate>=4 <I2S_sample_rate>=5 31.25 22.68 s s <I2S_sample_rate>=6 <I2S_sample_rate>=7 20.83 8.000 s kHz <I2S_sample_rate>=8 <I2S_sample_rate>=0 11.03 kHz <I2S_sample_rate>=1 12.00 16.00 kHz kHz <I2S_sample_rate>=2 <I2S_sample_rate>=3 22.05 24.00 kHz kHz <I2S_sample_rate>=4 <I2S_sample_rate>=5 32.00 44.10 kHz kHz <I2S_sample_rate>=6 <I2S_sample_rate>=7 816.0 I2S word alignment period I2S word alignment frequency 48.00 T4 T5 T6 T7 T8 T9 kHz <I2S_sample_rate>=8 I2S WA high begin before I2S CLK low begin (latching edge of I2S CLK) I2S WA low begin before I2S CLK low begin (latching edge of I2S CLK) I2S TXD invalid before I2S CLK rising edge (shifting edge of I2S CLK) I2S TXD valid after I2S CLK rising edge (shifting edge of I2S CLK) 36 ns <I2S_mode> = 0 36 ns <I2S_mode> = 0 12 ns <I2S_mode> = 0 79 ns <I2S_mode> = 0 I2S RXD setup time before I2S CLK falling edge (latching edge of I2S CLK) I2S RXD hold time after I2S CLK falling edge (latching edge of I2S CLK) 22 ns <I2S_mode> = 0 24 ns <I2S_mode> = 0 Table 24: AC characteristics of digital audio interface in PCM mode (<I2S_mode> = 0,1) and Slave mode enabled Electrical specifications UBX-13001734 - B Advance Information Page 41 of 56 LISA-U2 series - Data Sheet 4.2.9.2 AC characteristics of Digital Clock Output pin T1 CODEC_CLK (Output) T3 T2 Figure 11: AC characteristics of CODEC_CLK digital clock output Parameter Description T1 CODEC_CLK clock period 1/T1 CODEC_CLK clock frequency T2 CODEC_CLK clock low time T3 CODEC_CLK clock high time Min. Typ. Max. Unit Remarks 38 ns CODEC_CLK output set to 26 MHz 77 26 ns MHz CODEC_CLK output set to 13 MHz CODEC_CLK output set to 26 MHz 13 10 MHz ns CODEC_CLK output set to 13 MHz CODEC_CLK output set to 26 MHz 26 ns CODEC_CLK output set to 13 MHz 10 26 ns ns CODEC_CLK output set to 26 MHz CODEC_CLK output set to 13 MHz Table 25: AC characteristics of CODEC_CLK digital clock output 4.2.9.3 AC characteristics of SPI / IPC pins SPI_MOSI (Input) Valid T isu T ih SPI_SCLK (Input) T txd,va SPI_MISO (Output) T txd,vb Valid Figure 12: SPI_MOSI, SPI_MISO, SPI_SCLK timings Electrical specifications UBX-13001734 - B Advance Information Page 42 of 56 LISA-U2 series - Data Sheet Tm_trans SPI_MRDY (Input) Figure 13: SPI_MRDY transition Ts_trans SPI_SRDY (Output) Figure 14: SPI_SRDY transition SPI_MRDY (Input) SPI_SRDY (Output) Ts_res Figure 15: SPI_SRDY response Parameter Description Min. Typ. Max. Unit 26.0 3846.2 MHz ns Remarks SPI_SCLK frequency SPI_SCLK period 0.26 38.5 Tisu Tih Receive data setup time Receive data hold time 5 5 Ttxd,va Ttxd,vb Transmit data valid after clock rising edge Transmit data valid before clock rising edge Tm_trans Time between two master data transfers 80 ns Power saving disabled by AT+UPSV Time between two slave data transfers s ns Power saving enabled by AT+UPSV Ts_trans 62 80 Ts_res SPI_SRDY active after SPI_MRDY active s ms Power saving disabled by AT+UPSV Power saving enabled by AT+UPSV ns ns 13 0 200 10 ns ns Table 26: AC characteristics of SPI interface Electrical specifications UBX-13001734 - B Advance Information Page 43 of 56 LISA-U2 series - Data Sheet 4.2.10 USB pins USB data lines (USB_D+ and USB_D-) are compliant to the USB 2.0 high-speed specification. Refer to the Universal Serial Bus Revision 2.0 specification [8] for detailed electrical characteristics. Parameter Min. Typ. Max. Unit USB detection voltage on pin VUSB_DET Current sink at VUSB_DET 4.40 5.00 30 5.25 V A High-speed squelch detection threshold (input differential signal amplitude) High speed disconnect detection threshold (input differential signal amplitude) 100 150 mV 525 625 mV High-speed data signaling input common mode voltage range High-speed idle output level -50 -10 500 10 mV mV High-speed data signaling output high level High-speed data signaling output low level 360 -10 440 10 mV mV Chirp J level (output differential voltage) Chirp K level (output differential voltage) 700 -900 1100 -500 mV mV Remarks Table 27: USB pins characteristics 4.2.11 DDC (I2C) pins 2 2 2 DDC (I C) lines (SCL and SDA) are compliant to the I C-bus standard mode specification. Refer to the I C-Bus Specification Version 2.1 [9] for detailed electrical characteristics. Parameter Min. Typ. Internal supply for DDC domain 1.73 1.80 L-level input H-level input -0.20 1.31 L-level output Input/Output leakage current 0.00 Clock frequency on SCL 100 Max. Unit Remarks Digital I/O Interfaces supply (V_INT) 1.87 V 0.35 1.93 V V 0.35 0.7 V A Max value at IOL = +1.0 mA 0.2 V < VIN < 1.93 V kHz 2 Table 28: DDC (I C) pins characteristics (DDC domain) Electrical specifications UBX-13001734 - B Advance Information Page 44 of 56 LISA-U2 series - Data Sheet 5 Mechanical specifications E F B E X D F D N C M A K X Figure 16: Dimensions (LISA-U2 series bottom and sides views) Parameter Description A B Module Height [mm] Module Width [mm] C D E Typical Tolerance 33.2 22.4 (1307.1 mil) (881.9 mil) +0.20/-0.20 +0.20/-0.20 (+7.9/-7.9 mil) (+7.9/-7.9 mil) Module Total Thickness [mm] 2.6 (102.4 mil) +0.27/-0.17 (+10.6/-6.7 mil) Horizontal Edge to Pin Pitch [mm] Vertical Edge to Pin Pitch [mm] 2.3 5.7 (90.6 mil) (224.4 mil) +0.20/-0.20 +0.20/-0.20 (+7.9/-7.9 mil) (+7.9/-7.9 mil) F K Pin to Pin Pitch [mm] Pad width [mm] 1.1 0.8 (43.3 mil) (31.5 mil) +0.02/-0.02 +0.02/-0.02 (+0.8/-0.8 mil) (+0.8/-0.8 mil) M N Pad height [mm] Pad half-moon diameter [mm] 1.0 0.5 (39.4 mil) (19.7 mil) +0.10/-0.10 +0.10/-0.10 (+3.9/-3.9 mil) (+3.9/-3.9 mil) Weight Module Weight [g] <5 Note: the values in mil have been calculated from the relative values in mm. Table 29: Dimensions For information regarding Footprint and Paste Mask see the LISA-U series System Integration Manual [6]. Mechanical specifications UBX-13001734 - B Advance Information Page 45 of 56 LISA-U2 series - Data Sheet 6 Reliability tests and approvals 6.1 Reliability tests Qualifications according to ISO 16750 "Road vehicles - Environmental conditions and testing for electrical and electronic equipment". 6.2 Approvals Products marked with this lead-free symbol on the product label comply with the "Directive 2002/95/EC of the European Parliament and the Council on the Restriction of Use of certain Hazardous Substances in Electrical and Electronic Equipment" RoHS). LISA-U2 modules are RoHS compliant. No natural rubbers, hygroscopic materials, or materials containing asbestos are employed. Table 30 lists the LISA-U2 series main approvals. Directive / Standard / Regulatory LISA-U200 LISA-U230 LISA-U260 LISA-U270 GCF (Global Certification Forum) * * * * * * * * * * * * CE NB ID: 0682 CE NB ID: 0682 CE NB ID: 0682 CE NB ID: 0682 FCC ID: XPYLISAU200 FCC ID: XPYLISAU230 FCC ID: XPYLISAU200 FCC ID: XPYLISAU200 PTCRB (PCS Type Certification Review Board) R&TTE (Radio and Telecommunications Terminal Equipment EU Directive) CE (Conformite Europeenne) FCC (US Federal Communications Commission) IC (Industry Canada) IC ID: 8595A-LISAU200N IC ID: 8595A-LISAU230N IC ID: 8595A-LISAU200N IC ID: 8595A-LISAU200N Table 30: LISA-U2 series main certification approvals IC (Industry Canada) ID for LISA-U200-00S is 8595A-LISAU200. For the complete list of countries and network operators approvals, refer to our website www.u-blox.com. Reliability tests and approvals UBX-13001734 - B Advance Information Page 46 of 56 LISA-U2 series - Data Sheet 7 Product handling & soldering 7.1 Packaging LISA-U2 modules are delivered as hermetically sealed, reeled tapes to enable efficient production, production lot set-up and tear-down. For more information about packaging, see the u-blox Package Information Guide [11]. Figure 17: Reeled LISA-U2 modules 7.1.1 Reels LISA-U2 modules are deliverable in quantities of 150 pieces on a reel. LISA-U2 modules are delivered using reel Type B as described in the u-blox Package Information Guide [11]. Parameter Specification Reel Type B Delivery Quantity 150 Table 31: Reel information for LISA-U2 modules Quantities of less than 150 pieces are also available. Contact u-blox for more information. Product handling & soldering UBX-13001734 - B Advance Information Page 47 of 56 LISA-U2 series - Data Sheet 7.1.2 Tapes Figure 18 shows the position and orientation of LISA-U2 modules as they are delivered on tape. The dimensions of the tapes are specified in Figure 19. Figure 18: Orientation for LISA-U2 modules on tape Figure 19: LISA-U2 series tape dimensions (mm) Parameter Value A0 B0 23.0 34.0 K0 3.2 Table 32: LISA-U2 series tape dimensions (mm) Product handling & soldering UBX-13001734 - B Advance Information Page 48 of 56 LISA-U2 series - Data Sheet Note 1: 10 sprocket hole pitch cumulative tolerance 0.2. Note 2: the camber is compliant with EIA 481. Note 3: the pocket position relative to sprocket hole is measured as true position of pocket, not pocket hole. Note 4: A0 and B0 are calculated on a plane at a distance "R" above the bottom of the pocket. 7.2 Moisture Sensitivity Levels LISA-U2 modules are Moisture Sensitive Devices (MSD) in accordance to the IPC/JEDEC specification. The Moisture Sensitivity Level (MSL) relates to the packaging and handling precautions required. LISA-U2 modules are rated at MSL level 4. For more information regarding moisture sensitivity levels, labeling, storage and drying see the u-blox Package Information Guide [11]. For MSL standard see IPC/JEDEC J-STD-020 (can be downloaded from www.jedec.org). 7.3 Reflow soldering Reflow profiles are to be selected according to u-blox recommendations (see LISA-U series System Integration Manual [6]). Failure to observe these recommendations can result in severe damage to the device! 7.4 ESD precautions LISA-U2 modules contain highly sensitive electronic circuitry and are Electrostatic Sensitive Devices (ESD). Handling LISA-U2 modules without proper ESD protection may destroy or damage them permanently. LISA-U2 modules are Electrostatic Sensitive Devices (ESD) and require special ESD precautions typically applied to ESD sensitive components. Table 8 reports the maximum ESD ratings of the LISA-U2 module. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates LISA-U2 module. ESD precautions should be implemented on the application board where the module is mounted, as described in the LISA-U series System Integration Manual [6]. Failure to observe these precautions can result in severe damage to the device! Product handling & soldering UBX-13001734 - B Advance Information Page 49 of 56 LISA-U2 series - Data Sheet 8 Default settings Interface AT Settings Comments UART interface Enabled AT+IPR=0 Multiplexing mode can be enabled by AT+CMUX command providing following channels: * Channel 0: control channel * Channel 1 - 5: AT commands / data connection * Channel 6: GPS tunneling All LISA-U2 modules versions except LISA-U200-00S provide an additional channel: * Channel 7: SAP (SIM Access Profile) Autobauding enabled AT+ICF=3,1 Frame format: 8 bits, no parity, 1 stop bit On LISA-U200-00S version AT+IPR=115200. Where AT+IPR=0 is the default value, the +ICF value in the profile is not applied (+IPR=0 overrules the +ICF setting) and the automatic frame detection is active. AT&K3 AT&S1 HW flow control enabled DSR line set ON in data mode and set OFF in command mode AT&D1 Upon an ON-to-OFF transition of DTR, the DCE enters online command state and issues an OK result code Circuit 109 changes in accordance with the Carrier detect status; ON if the Carrier is detected, OFF otherwise AT&C1 USB interface Enabled 6 CDCs are available, configured as described in the following list: * USB1: AT commands / data connection * USB2: AT commands / data connection * USB3: AT commands / data connection * USB4: GPS tunneling * USB5: Primary TraceLog (debug purpose) * USB6: Secondary TraceLog (debug purpose) All LISA-U2 modules versions except LISA-U200-00S provide an additional CDC: * USB7: SAP (SIM Access Profile) AT&K3 AT&S1 HW flow control enabled DSR line set ON in data mode and set OFF in command mode AT&D1 AT&K3 Upon an ON-to-OFF transition of DTR, the DCE enters online command state and issues an OK result code Circuit 109 changes in accordance with the Carrier detect status; ON if the Carrier is detected, OFF otherwise Multiplexing mode can be enabled by AT+CMUX command providing following channels: * Channel 0: control channel * Channel 1 - 5: AT commands / data connection * Channel 6: GPS tunneling All LISA-U2 modules versions except LISA-U200-00S provide an additional channel: * Channel 7: SAP (SIM Access Profile) HW flow control enabled AT&S1 DSR line set ON in data mode and set OFF in command mode AT&D1 AT&C1 SPI interface Enabled Power Saving AT+UPSV=0 Upon an ON-to-OFF transition of DTR, the DCE enters online command state and issues an OK result code Circuit 109 changes in accordance with the Carrier detect status; ON if the Carrier is detected, OFF otherwise Disabled Network registration AT+COPS=0 Self network registration AT&C1 Table 33: Default settings Refer to the u-blox AT Commands Manual [5] and to the LISA-U series System Integration Manual [6] for information about further settings. Default settings UBX-13001734 - B Advance Information Page 50 of 56 LISA-U2 series - Data Sheet 9 Labeling and ordering information 9.1 Product labeling The labels of LISA-U2 series modules include important product information as described in this section. Figure 20 illustrates the label of all the LISA-U2 series modules, and includes: u-blox logo, production lot, Pb-free marking, product Type Number, IMEI number, certification numbers (if applicable), CE marking with the Notified Body number, and production country. Figure 20: Location of product type number on LISA-U2 module label For information about the approval codes and for all the certificates of compliancy of LISA-U2 series modules, refer to our website, www.u-blox.com. 9.2 Explanation of codes Three different product code formats are used. The Product Name is used in documentation such as this data sheet and identifies all u-blox products, independent of packaging and quality grade. The Ordering Code includes options and quality, while the Type Number includes the hardware and firmware versions. Table 34 details these 3 different formats: Format Structure Product Name LISA-CDVG Ordering Code Type Number LISA-CDVG-TTQ LISA-CDVG-TTQ-XX Table 34: Product Code Formats Table 35 explains the parts of the product code. Labeling and ordering information UBX-13001734 - B Advance Information Page 51 of 56 LISA-U2 series - Data Sheet Code Meaning Example C Cellular standard (i.e. G: GSM; E: EDGE; W: WEDGE; H: HSDPA; U: HSUPA; L: LTE; C: CDMA 1xRTT; D: EV-DO) Generation, e.g. chip or function set; range[0...9] Variant based on the same cellular chip range: [0...9] U: HSUPA D V G TT Q 2 GPS/GNSS generation (if GPS/GNSS functionality available) Version 6 = u-blox 6, 0: no GPS/GNSS functionality Quality grade/production site * S = standard * A = automotive * B = standard / made in Brazil S XX 0 Default value is 00 Table 35: Part identification code 9.3 Ordering information Ordering No. Product LISA-U200-00S HSPA 800/850/1900/2100 MHz, quad-band GPRS/EDGE, data only, 33.2 x 22.4 x 2.6 mm, 150 pcs/reel HSPA 800/850/900/1700/1900/2100 MHz, quad-band GPRS/EDGE, voice and data, 33.2 x 22.4 x 2.6 mm, 150 pcs/reel HSPA 800/850/900/1700/1900/2100 MHz, quad-band GPRS/EDGE, voice and data, 33.2 x 22.4 x 2.6 mm, 150 pcs/reel LISA-U200-01S LISA-U200-02S LISA-U200-61S LISA-U200-62S LISA-U230-01S LISA-U260-01S LISA-U260-02S LISA-U270-01S LISA-U270-02S LISA-U270-62S HSPA 800/850/900/1700/1900/2100 MHz, quad-band GPRS/EDGE, voice and data, 33.2 x 22.4 x 2.6 mm, FW version approved and locked for SoftBank Japanese network operator 150 pcs/reel HSPA 800/850/900/1700/1900/2100 MHz, quad-band GPRS/EDGE, voice and data, 33.2 x 22.4 x 2.6 mm, FW version approved and locked for SoftBank Japanese network operator 150 pcs/reel HSPA 800/850/900/1700/1900/2100 MHz, quad-band GPRS/EDGE, voice and data, 33.2 x 22.4 x 2.6 mm, 150 pcs/reel HSPA 850/1900 MHz, quad-band GPRS/EDGE, voice and data, 33.2 x 22.4 x 2.6 mm, 150 pcs/reel HSPA 850/1900 MHz, quad-band GPRS/EDGE, voice and data, 33.2 x 22.4 x 2.6 mm, 150 pcs/reel HSPA 900/2100 MHz, quad-band GPRS/EDGE, voice and data, 33.2 x 22.4 x 2.6 mm, 150 pcs/reel HSPA 900/2100 MHz, quad-band GPRS/EDGE, voice and data, 33.2 x 22.4 x 2.6 mm, 150 pcs/reel HSPA 900/2100 MHz, quad-band GPRS/EDGE, voice and data, 33.2 x 22.4 x 2.6 mm, FW version approved and locked for SoftBank Japanese network operator 150 pcs/reel Table 36: Product ordering codes Labeling and ordering information UBX-13001734 - B Advance Information Page 52 of 56 LISA-U2 series - Data Sheet Appendix A Glossary Name Definition BER Bit Error Rate DCE Data Communication Equipment DDC Display Data Channel (I2C compatible) Interface DL Down-link (Reception) Driver Class Output Driver Class: see Table 20 for definition DRX Discontinuous Reception DTE Data Terminal Equipment EDGE Enhanced Data rates for GSM Evolution ERS External Reset Input Signal GDI Generic Digital Interfaces (power domain) GND Ground GNSS Global Navigation Satellite System GPIO General Purpose Input Output GPRS General Packet Radio Service GPS Global Positioning System GSM H Global System for Mobile Communication High HSDPA High Speed Downlink Packet Access HSUPA High Speed Uplink Packet Access I2C Inter-Integrated Circuit Interface I2S Inter-IC Sound Interface L Low LCC Leadless Chip Carrier N/A Not Applicable (used in the I/O field of pinout) OD Open Drain PCN / IN Product Change Notification / Information Note PD Pull-Down POS Power-On Input (power domain) PU Pull-Up PU/PD Class Pull Class: see Table 20 for definition RMC Reference Measurement Channel SIM SIM Interface (power domain) SPI Serial Peripheral Interface T Tristate (Output of the pin set to tri-state, i.e. high impedance state) T/PD Tristate with internal active Pull-Down enabled T/PU Tristate with internal active Pull-Up enabled UART Universal Asynchronous Receiver-Transmitter serial interface UL Up-link (Transmission) UMTS USB Universal Mobile Telecommunications System Universal Serial Bus (power domain) Table 37: Explanation of abbreviations and terms used Appendix UBX-13001734 - B Advance Information Page 53 of 56 LISA-U2 series - Data Sheet Related documents [1] [2] [3] 3GPP TS 27.007 V3.13.0 - AT command set for User Equipment (UE) (Release 1999) 3GPP TS 27.005 V3.2.0 (2002-06) - Use of Data Terminal Equipment - Data Circuit terminating; Equipment (DTE - DCE) interface for Short Message Service (SMS) and Cell Broadcast Service (CBS) (Release 1999) 3GPP TS 27.010 V3.4.0 - Terminal Equipment to User Equipment (TE-UE) multiplexer protocol (Release 1999) [4] ITU-T Recommendation V24, 02-2000. List of definitions for interchange circuits between Data Terminal Equipment (DTE) and Data Connection Equipment (DCE) [5] u-blox AT Commands Manual, Docu No WLS-SW-11000 [6] [7] LISA-U series System Integration Manual, Docu No 3G.G2-HW-10002 GSM Mux Implementation Application Note for wireless modules, Docu No WLS-CS-11002 [8] Universal Serial Bus Revision 2.0 specification, http://www.usb.org/developers/docs/ [9] I2C-Bus Specification Version 2.1 Philips Semiconductors (January 2000), http://www.nxp.com/acrobat_download/literature/9398/39340011_21.pdf [10] u-blox SPI Interface Application Note, Docu No 3G.G2-CS-11000 [11] [12] u-blox Package Information Guide, Docu No GPS-X-11004 GPS Implementation Application Note, Docu No GSM.G1-CS-09007 For regular updates to u-blox documentation and to receive product change notifications, register on our homepage. Related documents UBX-13001734 - B Advance Information Page 54 of 56 LISA-U2 series - Data Sheet Revision history Revision Date Name Status / Comments - Jul. 25, 2011 lpah Initial release (draft) 1 Oct. 12, 2011 sses First release for LISA-U200-00S, LISA-U200-01x, LISA-U230-01x 2 Nov. 22, 2011 sses Updated status to Advance Information Added Antenna Supervisor support by LISA-U200-00S Added module switch-on by RESET_N support Updated LISA-U2x0-01x features in GPIO section Updated ESD maximum rating table 3 Feb. 02, 2012 sses Updated status to Preliminary Updated current consumption table Updated features support in module power off and GPIO sections A May. 15, 2012 sses / lpah Updated status to Objective Specification Updated PWR_ON low time to switch-on the module Removed Audio over USB support Added UART autobauding feature support A1 Jul. 20, 2012 sses / lpah Updated status to Preliminary Updated LISA-U2x0-01x GPRS/EDGE multi-slot class support Updated list of available USB drivers Updated module dimensions tolerances A2 Sep. 28, 2012 lpah Updated status to Advance Information First release for LISA-U260-01S, LISA-U270-01S A3 Nov. 26, 2012 lpah Updated status to Preliminary status (Last revision with old doc number, 3G.G3-HW-11004) B Jul. 11, 2013 lpah Update status to Advance Information First release for LISA-U200-02S, LISA-U200-61S, LISA-U200-62S, LISA-U260-02S, LISA-U270-02S, LISA-U270-62S Revision history UBX-13001734 - B Advance Information Page 55 of 56 LISA-U2 series - Data Sheet Contact For complete contact information visit us at www.u-blox.com u-blox Offices North, Central and South America u-blox America, Inc. Phone: E-mail: +1 703 483 3180 info_us@u-blox.com Regional Office West Coast: Phone: +1 408 573 3640 E-mail: info_us@u-blox.com Headquarters Europe, Middle East, Africa Asia, Australia, Pacific u-blox AG Phone: E-mail: Support: Phone: E-mail: Support: +41 44 722 74 44 info@u-blox.com support@u-blox.com Technical Support: Phone: E-mail: +1 703 483 3185 support_us@u-blox.com u-blox Singapore Pte. Ltd. +65 6734 3811 info_ap@u-blox.com support_ap@u-blox.com Regional Office China (Beijing): Phone: +86 10 68 133 545 E-mail: info_cn@u-blox.com Support: support_cn@u-blox.com Regional Office China (Shenzhen): Phone: +86 755 8627 1083 E-mail: info_cn@u-blox.com Support: support_cn@u-blox.com Regional Office India: Phone: +91 959 1302 450 E-mail: info_in@u-blox.com Support: support_in@u-blox.com Regional Office Japan: Phone: +81 3 5775 3850 E-mail: info_jp@u-blox.com Support: support_jp@u-blox.com Regional Office Korea: Phone: +82 2 542 0861 E-mail: info_kr@u-blox.com Support: support_kr@u-blox.com Regional Office Taiwan: Phone: +886 2 2657 1090 E-mail: info_tw@u-blox.com Support: support_tw@u-blox.com Contact UBX-13001734 - B Advance Information Page 56 of 56