Dual Channel, High Speed
Optocouplers
Technical Data
HCPL-2530 HCPL-0530
HCPL-2531 HCPL-0531
HCPL-4534 HCPL-0534
Features
• 15 kV/µs Minimum Common
Mode Transient Immunity at
VCM = 1500 V
(HCPL-4534/0534)
• High Speed: 1 Mb/s
• TTL Compatible
• Available in 8 Pin DIP, SO-8,
and 8 Pin DIP – Gull Wing
Surface Mount (Option 020)
Packages
• High Density Packaging
• 3 MHz Bandwidth
• Open Collector Outputs
• Guaranteed Performance
from 0°C to 70°C
• Safety Approval
UL Recognized – 2500 V rms
for 1 minute (5000 V rms for
1 minute for Option 020) per
UL1577
CSA Approved
• Single Channel Version
Available (4502/3, 0452/3)
• MIL-STD-1772 Version
Available (55XX/65XX/4N55)
Functional Diagram
Applications
• Line Receivers – High
Common Mode Transient
Immunity (>1000 V/µs) and
Low Input-Output Capacitance
(0.6 pF)
• High Speed Logic Ground
Isolation – TTL/TTL, TTL/
LTTL, TTL/CMOS, TTL/LSTTL
• Replace Pulse Transformers
– Save Board Space and Weight
• Analog Signal Ground
Isolation – Integrated Photon
Detector Provides Improved
Linearity over Phototransistor
Type
• Polarity Sensing
• Isolated Analog Amplifier –
Dual Channel Packaging
Enhances Thermal Tracking
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to
prevent damage and/or degradation which may be induced by ESD.
A 0.1 µF bypass capacitor between pins 5 and 8 is recommended.
7
1
2
3
45
6
8
ANODE
1
CATHODE
1
CATHODE
2
ANODE
2
V
CC
V
O1
V
O2
GND
TRUTH TABLE
(POSITIVE LOGIC)
LED
ON
OFF
V
O
LOW
HIGH
Description
These dual channel optocouplers
contain a pair of light emitting
diodes and integrated photodetec-
tors with electrical insulation
between input and output.
Separate connection for the
photodiode bias and output
transistor collectors increase the
speed up to a hundred times that
of a conventional phototransistor
coupler by reducing the base-
collector capacitance.
2
These dual channel optocouplers
are available in an 8 Pin DIP and
in an industry standard SO-8
package. The following is a cross
reference table listing the 8 Pin
DIP part number and the
electrically equivalent SO-8 part
number.
SO-8
8 Pin DIP Package
HCPL-2530 HCPL-0530
HCPL-2531 HCPL-0531
HCPL-4534 HCPL-0534
The SO-8 does not require
“through holes” in a PCB. This
package occupies approximately
one-third the footprint area of the
standard dual-in-line package.
The lead profile is designed to be
compatible with standard surface
mount processes.
The HCPL-2530/0530 is for use in
TTL/CMOS, TTL/LSTTL or wide
bandwidth analog applications.
Current transfer ratio (CTR) for
the HCPL-2530/0530 is 7%
minimum at IF = 16 mA.
The HCPL-2531/0531 is designed
for high speed TTL/TTL
applications. A standard 16 mA
TTL sink current through the
input LED will provide enough
output current for 1 TTL load and
a 5.6 kΩ pull-up resistor. CTR of
the HCPL-2531/0531 is 19%
minimum at IF = 16 mA.
The HCPL-4534/0534 is an
HCPL-2531/0531 with increased
common mode transient immunity
of 15,000 V/µs minimum at
VCM = 1500 V guaranteed.
Selection Guide
Widebody
Minimum CMR 8-pin DIP (300 Mil) Small-Outline SO-8 (400 Mil) Hermetic
Current Dual Single Dual Single Single Single and
dV/dt VCM Transfer Channel Channel Channel Channel Channel Dual Channel
(V/µs) (V) Ratio (%) Package Package* Package Package* Package* Packages*
1,000 10 7 HCPL-2530 6N135 HCPL-0530 HCPL-0500 HCNW135
19 HCPL-2531 6N136 HCPL-0531 HCPL-0501 HCNW136
HCPL-4502 HCPL-0452 HCNW4502
15,000 1500 19 HCPL-4534 HCPL-4503 HCPL-0534 HCPL-0453 HCNW4503
1,000 10 9 HCPL-55XX
HCPL-65XX
4N55
*Technical data for these products are on separate Agilent publications.
3
Ordering Information
Specify Part Number followed by Option Number (if desired).
Example:
HCPL-2531#XXX
020 = UL 5000 V rms/1 Minute Option*
300 = Gull Wing Surface Mount Option†
500 = Tape and Reel Packaging Option
Option data sheets available. Contact your Agilent sales representative or authorized distributor for
information.
*For HCPL-2530/1 and HCPL-4534 only.
†Gull wing surface mount option applies to through hole parts only.
Schematic
I
F1
HCPL-4534/0534 SHIELD
8
7
V
CC
+
2
V
O1
I
CC
V
F1
I
O1
1
–
I
F2
6
5GND
–
4
V
O2
V
F2
I
O2
3
+
USE OF A 0.1 µF BYPASS CAPACITOR CONNECTED
BETWEEN PINS 5 AND 8 IS RECOMMENDED.
4
Package Outline Drawings
8-Pin DIP Package (HCPL-2530/2531/4534)
8-Pin DIP Package with Gull Wing Surface Mount Option 300 (HCPL-2530/2531/4534)
0.635 ± 0.25
(0.025 ± 0.010) 12° NOM.
9.65 ± 0.25
(0.380 ± 0.010)
0.635 ± 0.130
(0.025 ± 0.005)
7.62 ± 0.25
(0.300 ± 0.010)
5
6
7
8
4
3
2
1
9.65 ± 0.25
(0.380 ± 0.010)
6.350 ± 0.25
(0.250 ± 0.010)
1.016 (0.040)
1.194 (0.047)
1.194 (0.047)
1.778 (0.070)
9.398 (0.370)
9.906 (0.390)
4.826
(0.190)
TYP.
0.381 (0.015)
0.635 (0.025)
PAD LOCATION (FOR REFERENCE ONLY)
1.080 ± 0.320
(0.043 ± 0.013)
4.19
(0.165)MAX.
1.780
(0.070)
MAX.
1.19
(0.047)
MAX.
2.54
(0.100)
BSC
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
0.254 + 0.076
- 0.051
(0.010+ 0.003)
- 0.002)
9.65 ± 0.25
(0.380 ± 0.010)
1.78 (0.070) MAX.
1.19 (0.047) MAX.
A XXXXZ
YYWW
DATE CODE
1.080 ± 0.320
(0.043 ± 0.013) 2.54 ± 0.25
(0.100 ± 0.010)
0.51 (0.020) MIN.
0.65 (0.025) MAX.
4.70 (0.185) MAX.
2.92 (0.115) MIN.
DIMENSIONS IN MILLIMETERS AND (INCHES).
5678
4321
5° TYP.
OPTION CODE*
UL
RECOGNITION
UR
0.254 + 0.076
- 0.051
(0.010+ 0.003)
- 0.002)
7.62 ± 0.25
(0.300 ± 0.010)
6.35 ± 0.25
(0.250 ± 0.010)
TYPE NUMBER
* MARKING CODE LETTER FOR OPTION NUMBERS.
"L" = OPTION 020
OPTION NUMBERS 300 AND 500 NOT MARKED.
5
Small Outline SO-8 Package (HCPL-0530/0531/0534)
Note: Use of nonchlorine activiated fluxes is highly recommended.
240
∆T = 115°C, 0.3°C/SEC
0
∆T = 100°C, 1.5°C/SEC
∆T = 145°C, 1°C/SEC
TIME – MINUTES
TEMPERATURE – °C
220
200
180
160
140
120
100
80
60
40
20
0
260
123456789101112
Solder Reflow Temperature Profile (HCPL-0530/0531/0534 and Gull Wing Surface
Mount Option Parts)
Regulatory Information
The devices contained in this data
sheet have been approved by the
following organizations:
UL
Recognized under UL 1577,
Component Recognition
Program, File E55361.
CSA
Approved under CSA Component
Acceptance Notice #5, File CA
88324.
XXX
YWW
8765
4321
5.994 ± 0.203
(0.236 ± 0.008)
3.937 ± 0.127
(0.155 ± 0.005)
0.406 ± 0.076
(0.016 ± 0.003) 1.270
(0.050)BSG
5.080 ± 0.127
(0.200 ± 0.005)
3.175 ± 0.127
(0.125 ± 0.005) 1.524
(0.060)
45° X 0.432
(0.017)
0.228 ± 0.025
(0.009 ± 0.001)
TYPE NUMBER
(LAST 3 DIGITS)
DATE CODE
0.305
(0.012)MIN.
TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH)
5.207 ± 0.254 (0.205 ± 0.010)
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX.
0.203 ± 0.102
(0.008 ± 0.004)
7°
PIN ONE
0 ~ 7°
*
*
6
Absolute Maximum Ratings
Parameter Symbol Device Min. Max. Units Note
Storage Temperature TS-55 125 °C
Operating Temperature TA-55 100 °C
Average Forward Input Current IF(AVG) 25 mA
(each channel)
Peak Forward Input Current (each channel) IF(PEAK) 50 mA
(50% duty cycle, 1 ms pulse width)
Peak Transient Input Current (each channel) IF(TRANS) 1A
(≤1 µs pulse width, 300 pps)
Reverse LED Input Voltage (each channel) VR5V
Input Power Dissipation (each channel) PIN 45 mW
Average Output Current (each channel) IO(AVG) 8mA
Peak Output Current IO(PEAK) 16 mA
Supply Voltage (Pin 8-5) VCC -0.5 30 V
Output Voltage (Pins 7-5, 6-5) VO-0.5 20 V
Output Power Dissipation (each channel) PO35 mW 13
Lead Solder Temperature
(Through-Hole Parts Only)
1.6 mm below seating plane, 10 seconds TLS 8 Pin DIP 260 °C
Reflow Temperature Profile TRP SO-8 and
Option 300
Insulation and Safety Related Specifications
8-Pin DIP
(300 Mil) SO-8
Parameter Symbol Value Value Units Conditions
Minimum External L(101) 7.1 4.9 mm Measured from input terminals to output to
Air Gap (External to output terminals, shortest distance through
Clearance) air.
Minimum External L(102) 7.4 4.8 mm Measured from input terminals to output
Tracking (External terminals, shortest distance path along body.
Creepage)
Minimum Internal 0.08 0.08 mm Through insulation distance, conductor to
Plastic Gap conductor, usually the direct distance
(Internal Clearance) between the photoemitter and photodetector
inside the optocoupler cavity.
Minimum Internal NA NA mm Measured from input terminals to output
Tracking (Internal terminals, along internal cavity.
Creepage)
Tracking Resistance CTI 200 200 Volts DIN IEC 112/VDE 0303 Part 1
(Comparative
Tracking Index)
Isolation Group IIIa IIIa Material Group (DIN VDE 0110, 1/89, Table 1)
Option 300 - surface mount classification is Class A in accordance with CECC 00802.
See Package Outline
Drawings section
7
Electrical Specifications (DC)
Over recommended temperature (TA = 0°C to 70°C) unless otherwise specified. See note 9.
Parameter Sym. Device Min. Typ.* Max. Units Test Conditions Fig. Note
Current CTR HCPL-2530/ 7 18 50 % TA = 25°CI
F
= 16 mA, 1, 2 1, 2
Transfer 0530 VCC = 4.5 V 4
Ratio 5 VO = 0.5 V
HCPL-2531/ 19 24 50 % TA = 25°C
0531
HCPL-4534/ 15
0534
Logic Low V
OL HCPL-2530/ 0.1 0.5 V TA = 25°CI
O
= 1.1 mA IF = 16 mA, 1 1
Output 0530 VCC = 4.5 V
Voltage 0.5 IO = 0.8 mA
HCPL-2531/ 0.1 0.5 V TA = 25°CI
O
= 3.0 mA
0531
HCPL-4534/ 0.5 IO = 2.4 mA
0534
Logic High IOH 0.003 0.5 µAT
A
= 25°CV
O
= Open IF = 0 mA 6 1
Output VCC = 5.5 V
Current
50 TA = 25°CV
O
= Open
VCC = 15.0 V
Logic Low ICCL 100 400 µAI
F = 16 mA, VO = Open,
Supply VCC = 15 V
Current
Logic High ICCH 0.05 4 µAI
F
= 0 mA, VO = Open,
Supply VCC = 15 V
Current
Input VF1.5 1.7 V TA = 25°C31
Forward IF = 16 mA
Voltage 1.8
Input BVR5VI
R
=10 µA1
Reverse
Breakdown
Voltage
Temperature ∆VF-1.6 mV/ IF = 16 mA
Coefficient ∆TA°C
of Forward
Voltage
Input CIN 60 pF f = 1 MHz, VF = 0 V 1
Capacitance
*All typicals at TA = 25°C.
8
Package Characteristics
Parameter Sym. Device Min. Typ.* Max. Units Test Conditions Fig. Note
Input-Output VISO 2500 V rms RH < 50%, 3, 10
Momentary With- t = 1 min.,
stand Voltage**
Resistance RI-O 1012 ΩRH ≤45% 3
(Input-Output) VI-O = 500 Vdc,
t = 5 s
Capacitance CI-O 0.6 pF f = 1 MHz, 12
(Input-Output) TA = 25°C
Input-Input II-I 0.005 µA RH ≤45%, 4
Insulation t = 5 s,
Leakage Current VI-I = 500 Vdc
Resistance RI-I 1011 Ω4
(Input-Input)
Capacitance CI-I HCPL-2530/ 0.03 pF f = 1 MHz 4
(Input-Input) 2531/4534
HCPL-0530/ 0.25
0531/0534
*All typicals at T
A = 25°C.
**The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output
continuous voltage rating. For the continuous voltage rating refer to the VDE 0884 Insulation Characteristics Table (if applicable),
your equipment level safety specification or Agilent Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage,”
publication number 5963-2203E.
Device
Parameter Sym. HCPL- Min. Typ.* Max. Units Test Conditions Fig. Note
Propagation tPHL 2530/0530 0.2 1.5 µsT
A
= 25°CR
L
= 4.1 kΩ5, 9, 6, 7
Delay Time 2.0 11
to Logic Low 2531/0531/ 0.2 0.8 TA = 25°CR
L
= 1.9 kΩ
at Output 4534/0534 1.0
Propagation tPLH 2530/0530 1.3 1.5 µsT
A
= 25°CR
L
= 4.1 kΩ5, 9, 6, 7
Delay Time 2.0 11
High to Logic 2531/0531/ 0.6 0.8 TA = 25°CR
L
= 1.9 kΩ
at Output 4534/0534 1.0
Common |CMH| 2530/0530 1 10 kV/µsR
L
= 4.1 kΩIF = 0 mA, 10 5, 6,
Mode Transient 2531/0531 1 10 RL = 1.9 kΩTA = 25°C, 7
Immunity at 4534/0534 15 30 RL = 1.9 kΩVCM = 10 Vp-p
Logic High
Level Output
Common |CML| 2530/0530 1 10 kV/µsR
L
= 4.1 kΩIF = 0 mA, 10 5, 6,
Mode Transient 2531/0531 1 10 RL = 1.9 kΩTA = 25°C, 7
Immunity at 4534/0534 15 30 RL = 1.9 kΩVCM = 10 Vp-p
Logic Low
Level Output
Bandwidth BW 3 MHz RL = 100 kΩ7, 8
*All typicals at TA = 25°C.
Switching Specifications (AC)
Over recommended temperature (T
A = 0°C to 70°C), VCC = 5 V, IF = 16 mA unless otherwise specified.
HCPL-2530/
2531/4534
Option 020
3, 115000
9
Notes:
1. Each channel.
2. CURRENT TRANSFER RATIO is
defined as the ratio of output
collector current, IO, to the forward
LED input current, IF, times 100%.
3. Device considered a two-terminal
device: pins 1, 2, 3, and 4 shorted
together and pins 5, 6, 7, and 8
shorted together.
4. Measured between pins 1 and 2
shorted together, and pins 3 and 4
shorted together.
5. Common mode transient immunity in
a Logic High level is the maximum
tolerable (positive) dVCM/dt on the
rising edge of the common mode
pulse, VCM, to assure that the output
will remain in a Logic High state (i.e.,
VO > 2.0 V). Common mode transient
immunity in a Logic Low level is the
maximum tolerable (negative)
dV
CM/dt on the falling edge of the
common mode pulse signal, VCM, to
assure that the output will remain in a
Logic Low state (i.e., VO < 0.8 V).
6. The 1.9 kΩ load represents 1 TTL
unit load of 1.6 mA and the 5.6 kΩ
pull-up resistor.
7. The 4.1 kΩ load represents 1 LSTTL
unit load of 0.36 mA and the 6.1 kΩ
pull-up resistor.
8. The frequency at which the ac output
voltage is 3 dB below the low
frequency asymptote.
9. Use of a 0.1 µF bypass capacitor
connected between pins 5 and 8 is
recommended.
10. In accordance with UL 1577, each
optocoupler is proof tested by
applying an insulation test voltage
≥3000 V rms for 1 second (leakage
detection current limit, II-O ≤5 µA).
11. In accordance with UL 1577, each
optocoupler is proof tested by
applying an insulation test voltage
≥6000 V rms for 1 second (leakage
detection current limit, II-O ≤5 µA).
12. Measured between the LED anode and
cathode shorted together and pins 5
through 8 shorted together.
13. Derate linearly above 90°C free-air
temperature at a rate of 3.0 mW/ °C
for the SOIC-8 package.
Figure 1. DC and Pulsed Transfer
Characteristics. Figure 2. Current Transfer Ratio vs.
Input Current. Figure 3. Input Current vs. Forward
Voltage.
010 20
V
O
– OUTPUT VOLTAGE – V
I
O
– OUTPUT CURRENT – mA
10
5
0
T = 25°C
V = 5.0 V
A
CC
40 mA
35 mA
30 mA
25 mA
20 mA
15 mA
10 mA
I = 5 mA
F
NORMALIZED
I = 16 mA
V = 0.5 V
V = 5 V
T = 25°C
F
O
CC
A
HCPL-2530/0530
HCPL-2531/0531/4534/0534
1.5
1.0
0.5
0.10 1 10 100
NORMALIZED CURRENT TRANSFER RATIO
I
F
– INPUT CURRENT – mA V
F
– FORWARD VOLTAGE – VOLTS
100
10
0.1
0.01
1.1 1.2 1.3 1.4
I
F
– FORWARD CURRENT – mA
1.61.5
1.0
0.001
1000
I
F
V
F
+T = 25°C
A
–
10
Figure 4. Current Transfer Ratio vs.
Temperature. Figure 5. Propagation Delay vs.
Temperature. Figure 6. Logic High Output Current vs.
Temperature.
Figure 8. Frequency Response.
Figure 7. Small-Signal Current Transfer
Ratio vs. Quiescent Input Current.
-50 +50
TA – TEMPERATURE – °C
IOH – LOGIC HIGH OUTPUT CURRENT – nA
10-2 -25 0 +25 +75 +100
10-1
100
10+1
10+2
10+3
10+4
VO = VCC = 5.0 V
IF = 0
HCPL-2531/0531/4534/0534
(R = 1.9 kΩ)
2000
1500
1000
500
0
-60 -20 20 60 100
T – TEMPERATURE – °C
A
t – PROPAGATION DELAY – ns
P
t
PHL
t
PLH
I = 16 mA, V = 5.0 V
FCC
HCPL-2530/0530 (R = 4.1 kΩ)
L
L
f – FREQUENCY – MHz
0
-20
0.01 0.1
NORMALIZED RESPONSE –dB
1.0
-25
10
-30
T
A
= 25°C
I
F
= 16 mA
-15
-10
-5 R
L
= 100 Ω
R
L
= 220 Ω
R
L
= 470 Ω
R
L
= 1 kΩ
1
2
3
4
8
7
6
5
20 kΩ
SET I
F
+5 V
AC INPUT 0.1 µF560 Ω100 Ω
2N3053
1.6 V dc
0.25 Vp-p ac
0.1 µF
+5 V
V
O
R
L
1.1
1.0
0.9
0.8
0.7
0.6
-60 -20 0 80
NORMALIZED CURRENT TRANSFER RATIO
T
A
– TEMPERATURE – °C
F
CC
A
-40 20 40 60 100
O
NORMALIZED
I = 16 mA
V = 0.5 V
V = 5 V
T = 25°C
HCPL-2530/0530
HCPL-2531/0531/4534/0534
∆ I
F
∆ I
O
– SMALL SIGNAL CURRENT TRANSFER RATIO
0
0.10
0.20
0.30
0
I
F
– QUIESCENT INPUT CURRENT – mA
24
16
4 8 12 20
T
A
= 25°C, R
L
= 100 Ω, V
CC
= 5 V
11
3.0
2.0
1.0
0.1 4
0.6
0.4
321
0.2
8765910
0.8
R
L
– LOAD RESISTANCE – kΩ
t
PLH
t
PHL
V = 5.0 V
T = 25 °C
CC
I = 10 mA
I = 16 mA
F
t
P
– PROPAGATION DELAY – µs
F
A
Figure 11. Propagation Delay Time vs. Load Resistance.
Figure 10. Test Circuit for Transient Immunity and Typical Waveforms.
Figure 9. Switching Test Circuit.
V
O
PULSE
GEN.
Z = 50 Ω
t = 5 ns
O
r
I MONITOR
F
I
F
0.1µF
L
R
C
L
= 1.5 pF
R
M
0
t
PHL
t
PLH
O
V
I
F
OL
V
1.5 V
+5 V
1.5 V
5 V 10% DUTY CYCLE
1/f < 100 µs
7
1
2
3
45
6
8
O
V5 V
OL
V
O
V
0 V 10% 90% 90% 10%
SWITCH AT A: I = 0 mA
F
SWITCH AT B: I = 16 mA
F
CM
V
t
r
t
f
V
O
I
F
0.1 µF
L
R
+5 V
A
B
PULSE GEN.
V
CM
+–
V
FF
7
1
2
3
45
6
8
www.semiconductor.agilent.com
Data subject to change.
Copyright © 1999 Agilent Technologies
Obsoletes 5966-1272E
5968-1090E (11/99)