CY74FCT16841ATPAC - Cypress Semiconductor

20-Bit Latch

fax id: 7018

CY74FCT16841T

CY74FCT162841T

Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600

July 1994 - Revised March 19, 1997

1CY74FCT162841T

Features

• Low power, pin-compatible replacement for ABT f u nc-

tions

• FCT-C speed at 5.5 ns

• Power-off disable outputs permits live insertion

• Edge-rate con trol circuitry for significantly improved

noise c h aracteristics

• Typical output skew < 250 ps

• ESD > 2000V

• TSSOP (19.6-mi l pi tch) a nd SSOP ( 2 5-mil pitch)

packages

• Extended c ommerci al r an ge of −40°C to +85°C

•V

CC = 5V ± 10%

CY74FCT16841T Features:

• 64 mA sink curre nt, 32 mA source current

• Typical VOLP (grou nd bounce) <1.0V at VCC = 5V,

TA = 25°C

CY74FCT162841T Features:

• Balanced output drivers: 24 mA

• Reduced s ystem switching noise

• Typical VOLP (ground bounce) <0.6V at VCC = 5V,

TA= 25°C

Functional Description

The CY74FCT16841T and CY74FCT162841T are 20-bit

D-type latches d esigned for use in bus applications requiring

high speed and low po wer. These de vices c an be used as two

independent 10-bit lat ches, or as a single 10-bit latch, or as a

single 20-bit latch b y connecting the Outp ut Enable (OE) and

Latch (LE) inputs. Flow-through pinout and small shrink pack-

aging aid in simpli fying bo ard layout. The output buffers are

designe d with a power-of f disable feature to a llow live insertion

of bo ard s.

The CY74FCT16841T is ideally suited for driving

high-capaci tance loads and low-impedance backplanes.

The CY74FCT162841T has 24-mA balanced output drivers

with curr ent limiting resistors in the outputs. This re duces the

need for exter nal terminating r esist ors and provides for mini-

mal undershoot and reduced ground bounce. The

CY74FCT162841T is ideal for driving t ransmission lin es.

GND

1D1

Logic Block Diagrams Pin Configuration

TO 9 OTHER CHANNELS

2D1

2Q1

2LE

2OE

1Q7

1OE

SSOP/TSSOP

Top View

1Q1

1LE

1OE

1Q1

1Q2

1Q3

1Q4

1D1

1D2

1D3

1D4

1LE

GND

VCC

1Q5

1Q6

1D5

1D6

VCC

GND

2D1

GND

VCC VCC

GND

1Q8

1Q10

2Q1

1Q9

2Q2

2Q3

2Q4

2Q5

2Q6

2Q7

2Q8

2Q9

2Q10

2OE

1D7

GND

1D8

1D9

1D10

2D2

2D3

2D4

2D5

2D6

2D7

2D8

2D9

2D10

2LE

FCT16841-1

FCT16841-2

FCT16841-3

TO 9 OTHER CHANNELS

CY74FCT16841T

CY74FCT162841T

Maximum Ratings[3, 4]

(Above which the useful life may be impaired. For user

guidelines, not tested.)

Storage Temperat ure......................................−55°C to +125°C

Ambient Temper ature with

Power Applied ..................................................−55°C to +125°C

DC Input Voltage.................................................−0.5V to +7.0V

DC Output Voltage..............................................−0.5V to +7.0V

DC Output Current

(Maximum Sink Current/Pin)...........................−60 to +120 mA

Power Dissipation. ...................... ............ .......... ............. 1.0W

Static Discharge Voltage...........................................>2001V

(per MIL-STD-883, Method 3015)

Pin Description

Name Description

DData Inputs

LE Latch Enable Input (Active HIGH)

OE O utput Enable Input (Active LOW)

OThree-State O utputs

Function Table[1]

Inputs Outputs

DLE OE Q

H H L H

L H L L

X L L Q[2]

X X H Z

Operating Range

Range Ambient

Temperature VCC

Commercial −40°C to +85°C 5V ± 10%

Electrical Characteristics Over the Operating Range

Parame-

ter Description Test Conditions Min. Typ.[5] Max. Unit

VIH Input HIGH Voltag e Guaranteed Logic HIGH Level 2.0 V

VIL Input LOW Voltage Guaranteed Logic LOW Level 0.8 V

VHInput Hysteresis[6] 100 mV

VIK Input Clamp Diode Voltage VCC=Min., IIN=−18 mA −0.7 −1.2 V

IIH Input HIGH Current VCC=Max., VI=VCC ±1µA

IIL Input LOW Current VCC=Max., VI=GND ±1µA

IOZH High Impedance Output

Current (Three-State Output pins) VCC=Max., V OUT=2.7V ±1µA

IOZL High Impedance Output

Current (Three-State Output pins) VCC=Max., V OUT=0.5V ±1µA

IOS Sh ort Circuit Current[7] VCC=Max., VOUT=GND −80 −140 −200 mA

IOOutput Drive Current[7] VCC=Max., VOUT=2.5V −50 −180 mA

IOFF Power-Off Disable VCC=0V, VOUT≤4.5V[8] ±1µA

Notes:

1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = HIGH Impedance.

2. Output level before LE HIGH-to-LOW Transition.

3. Operation beyond the limits set for th may impair the useful l ife of the device. Unles s otherwise noted, these limits are over the operating free-air temperature

range.

4. Unus ed inputs must always be connected to an appropriate logic voltage lev e l, preferably either VCC or g ro und.

5. Typical values are at VCC= 5.0V, TA= +25°C ambient.

6. This parameter is guaranteed but not tested.

7. Not more than one output should be shorted at a time. Duration of short should not exceed one sec ond. The use of high-s peed test apparatus and/or sample

and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational val ues. Otherwise prolonged shorting

of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other par ametric tests. In any sequence of para meter

tests, IOS tests should be performed last.

8. Tested at +25°C.

CY74FCT16841T

CY74FCT162841T

Output Drive Characteristics for CY74 FCT16841T

Parame-

ter Description Test Conditions Min. Typ.[5] Max. Unit

VOH Output HIGH Volt a ge VCC=Min., IOH=−3 mA 2.5 3.5 V

VCC=Min., IOH=−15 mA 2.4 3.5

VCC=Min., IOH=−32 mA 2.0 3.0

VOL Output LOW Voltage V CC=Min., IOL=64 mA 0.2 0.55 V

Output Drive Characteristics for CY74 FCT162841T

Parame-

ter Description Test Conditions Min. Typ.[5] Max. Unit

IODL Output LOW Current[7] VCC=5V, VIN=VIH or VIL, VOUT=1.5V 60 115 150 mA

IODH Output HIGH Current[7] VCC=5V, V IN=VIH or VIL, VOUT=1.5V −60 −115 −150 mA

VOH Output HIGH Volt a ge VCC=Min., IOH=−24 mA 2.4 3.3 V

VOL Output LOW Voltage V CC=Min., IOL=24 mA 0.3 0.55 V

Capacitance[6] (TA =+25°C, f = 1.0 MHz)

Symbol Description Conditions Typ.[5] Max. Unit

CIN Input Capacitance VIN = 0V 4.5 6.0 pF

COUT Output C apacitance VOUT = 0V 5.5 8.0 pF

Power Supply Characteristics

Parameter Description Test C onditions Min. Typ.[5] Max. Unit

ICC Quiescent Power Su pply

Current VCC=Max. VIN<0.2V

VIN>VCC-0.2V — 5 500 µA

∆ICC Quiescent Power S upply

Current (TTL inputs HIGH) VCC=Max., VIN=3.4V[9] —0.5 1.5 mA

ICCD Dynamic Power Su pply

Current[10] VCC=Max., One Input

Toggling, 50% Duty

Cycle, Outputs Open,

OE=GND

VIN=VCC or

VIN=GND —60 100 µA/MHz

ICTot al Power Supply Cur rent[11] VCC=Max., f1=10 MHz,

50% Duty Cycle,

Outputs Open, One Bit

Toggling, OE=GND

LE = VCC

VIN=VCC or

VIN=GND —0.6 1.5 mA

VIN=3.4V or

VIN=GND —0.9 2.3

VCC=Max., f1=2.5 MHz,

50% Duty Cycle, Outputs

Open, Twenty Bits

Toggling, OE=GND

LE = VCC

VIN=VCC or

VIN=GND —3.0 5.5[12]

VIN=3.4V or

VIN=GND —8.0 20.5[12]

CY74FCT16841T

CY74FCT162841T

Notes:

9. Per TTL driven in put (VIN=3.4V); all other inputs at VCC or GND.

10. This parameter is not directly testable, but is derived for use in Total Power Supply calcul atio ns.

11. IC=I

QUIESCENT + IINPUTS + IDYNAMIC

IC=I

CC+∆ICCDHNT+ICCD(f0/2 + f1N1)

ICC = Quiescent Current with CMOS input levels

∆ICC = Power Supply Current fo r a TTL HIGH input (VIN=3.4V)

DH= Duty Cycle for TTL inputs HIGH

NT= Number of TTL inputs at DH

ICCD = Dynamic Current caus ed by an input transition pair (HLH or LHL)

f0= Clock frequency for registered devices, otherwise zero

f1= Input signal frequency

N1= Number of inputs changing at f1

All currents are in milliamps and all frequencies are in megahertz.

12. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.

Power Supply Characteristics (continue d)

Parameter Description Test C onditions Min. Typ.[5] Max. Unit

Switching Characteristics Over the Operating Range[13]

74FCT16841AT

74FCT162841AT 74FCT16841BT

74FCT162841BT 74FCT16841CT

74FCT162841CT Fig.

No.[15]

Parameter Description Condition[14] Min. Max. Min. Max. Min. Max. Unit

tPLH

tPHL Propagation Delay

D to Q

(LE=HIGH)

CL=50 pF

RL=500Ω1.5 9.0 1.5 6.5 1.5 5.5 ns 1, 5

CL=300 pF[16]

RL=500Ω1.5 13.0 1.5 13.0 1.5 13.0

tPLH

tPHL Propagation Delay

LE to Q CL=50 pF

RL=500Ω1.5 12.0 1.5 8.0 1.5 6.4 ns 1, 5

CL=300 pF[16]

RL=500Ω1.5 16.0 1.5 15.5 1.5 15.0

tPHZ

tPZL Output Enable Time

OE to Q CL=50 pF

RL=500Ω1.5 11.5 1.5 8.0 1.5 6.5 ns 1, 7, 8

CL=300 pF[16]

RL=500Ω1.5 23.0 1.5 14.0 1.5 12.0

tPHZ

tPLZ Output Disable Time

OE to Q CL=5 pF[16]

RL=500Ω1.5 7.0 1.5 6.0 1.5 5.7 ns 1, 7, 8

CL=50 pF

RL=500Ω1.5 8.0 1.5 7.0 1.5 6.0

tSU Set-Up Time

HIGH or LOW,

D to LE

CL=50 pF

RL=500Ω2.5 — 2.5 — 2.0 — ns 9

tHHold Time

HIGH or LOW,

D to LE

2.5 — 2.5 — 1.5 — ns 9

tWLE Pulse Width HIGH 4.0[17] —4.0[17] —4.0[17] —ns 5

tSK(O) Output Skew[18] —0.5 — 0.5 — 0.5 ns —

Notes:

13. Minimum limits are guaranteed but not tested on Propagation Delays.

14. See test circuit and waveform.

15. See “Parameter Measurement Information” in the General Information section.

16. These conditions are guaranteed but not tested.

17. These limits are guaranteed but not tested.

18. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.

CY74FCT16841T

CY74FCT162841T

Document #: 38−00387-A

Ordering Information for CY74FCT16841T

Speed

(ns) Order ing Code Package

Name Package Ty p e Operating

Range

5.5 CY74FCT16841CTPAC Z56 5 6 -Lead (240-Mil) TSSOP Commercial

CY74FCT16841CTPVC O56 5 6 -Lead (300 -Mil) SSOP

6.5 CY74FCT16841ATPAC Z56 56 -Lead (240 -Mil) TSSOP Commercial

CY74FCT16841ATPVC O56 56-Lead ( 300-Mil) SSOP

9.0 CY74FCT16841TPAC Z56 56-Lead ( 240- Mil) TSSOP Commercial

CY74FCT16841TPVC O56 56-Lead ( 300-Mil) SSOP

Orderin g Inf ormation CY 74FCT162841T

Speed

(ns) Order ing Code Package

Name Package Ty p e Operating

Range

5.5 CY74FCT162841CTPAC Z56 56-Lead (240-Mil) TSSOP Commercial

CY74FCT162841CTPVC O56 5 6 -Lead (300 -Mil) SSOP

6.5 CY74FCT162841ATPAC Z56 56-Lead (240-Mil) TSSOP Commercial

CY74FCT162841ATPVC O56 56-Lead (300- Mil) SSOP

9.0 CY74FCT162841TPAC Z56 56-Lead (240-Mil) TSSOP Commercial

CY74FCT162841TPVC O56 56-Lead (300- Mil) SSOP

CY74FCT16841T

CY74FCT162841T

of any circuitry othe r than circui try embodi ed in a Cypress Semi conductor prod uct. Nor do es it convey or im ply an y li cens e under p atent or other rights . Cypress Semi conductor does not authori ze

its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in signif icant injury to the user. The inclusion of Cypress

Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.

Package Diagrams

56-LeadShrunk Small Outline PackageO56

56-LeadThinShrunkSmall Outline Package Z56