BSC072N03LD G
OptiMOS™3 Power-Transistors
Features
• Dual N-channel, logic level
• Fast switching MOSFETs for SMPS
• Optimized technology for DC/DC converters
• Qualified according to JEDEC1) for target applications
• Excellent gate charge x RDS(on) product (FOM)
• Very low on-resistance RDS(on)
• Superior thermal resistance
• 100% avalanche tested
• Pb-free plating; RoHS compliant
• Halogen-free according to IEC61249-2-21
Maximum ratings, at Tj=25 °C, unless otherwise specified
Parameter Symbol Conditions Unit
≤10 secs steady state
Continuous drain current IDVGS=10 V, TC=25 °C A
VGS=10 V, TC=100 °C
VGS=4.5 V, TC=25 °C
VGS=4.5 V,
TC=100 °C
VGS=10 V, TA=25 °C3) 17.9 11.5
Pulsed drain current2) ID,pulse TC=25 °C
Avalanche energy, single pulse EAS ID=20 A, RGS=25 ΩmJ
Gate source voltage VGS V
Power dissipation Ptot TC=25 °C W
TA=25 °C3) 3.6 1.5
Operating and storage temperature Tj, Tstg °C
IEC climatic category; DIN IEC 68-1
1) J-STD20 and JESD22
±20
57
-55 ... 150
55/150/56
20
80
90
Value
20
20
20
VDS 30 V
RDS(on),max 7.2 mΩ
ID20 A
Product Summary
Type Package Marking
BSC072N03LD G PG-TDSON-8 072N03LD
PG-TDSON-8
Rev. 1.4 page 1 2009-10-23
BSC072N03LD G
Parameter Symbol Conditions Unit
min. typ. max.
Thermal characteristics
Thermal resistance, junction - case RthJC bottom - - 2.2 K/W
top 20
RthJA t≤10 s - - 35
steady state - - 85
Electrical characteristics, at Tj=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage V(BR)DSS VGS=0 V, ID=1 mA 30 - - V
Gate threshold voltage VGS(th) VDS=VGS, ID=250 µA 1 - 2.2
Zero gate voltage drain current IDSS
VDS=30 V, VGS=0 V,
Tj=25 °C - 0.1 1 µA
VDS=30 V, VGS=0 V,
Tj=125 °C - 10 100
Gate-source leakage current IGSS VGS=20 V, VDS=0 V - 10 100 nA
RDS(on) VGS=4.5 V, ID=20 A - 7.5 9.4 mΩ
VGS=10 V, ID=20 A - 6.0 7.2
Gate resistance RG- 1.5 2.3 Ω
Transconductance gfs
|VDS|>2|ID|RDS(on)max,
ID=20 A 28 57 - S
3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm² (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air. One transistor active.
Values
2) See figure 3
Thermal resistance, junction -
ambient, 6 cm² cooling area3)
Drain-source on-state resistance
Rev. 1.4 page 2 2009-10-23
BSC072N03LD G
Parameter Symbol Conditions Unit
min. typ. max.
Dynamic characteristics
Input capacitance Ciss - 2600 3500 pF
Output capacitance Coss - 920 1200
Reverse transfer capacitance Crss -49-
Turn-on delay time td(on) - 6.0 - ns
Rise time tr- 4.0 -
Turn-off delay time td(off) -25-
Fall time tf- 4.0 -
Gate Char
g
e Characteristics4)
Gate to source charge Qgs - 7.2 - nC
Gate charge at threshold Qg(th) - 3.8 -
Gate to drain charge Qgd - 3.4 -
Switching charge Qsw - 6.8 -
Gate charge total Qg-1520
Gate plateau voltage Vplateau - 3.0 - V
Gate charge total Qg
VDD=15 V, ID=20 A,
VGS=0 to 10 V -3141
Gate charge total, sync. FET Qg(sync)
VDS=0.1 V,
VGS=0 to 4.5 V -13-nC
Output charge Qoss VDD=15 V, VGS=0 V -24-
Reverse Diode
Diode continuous forward current IS- - 20 A
Diode pulse current IS,pulse --80
Diode forward voltage VSD
VGS=0 V, IF=20 A,
Tj=25 °C - 0.87 1.1 V
Reverse recovery charge Qrr
VR=15 V, IF=IS,
diF/dt=400 A/µs - - 10 nC
4) See figure 16 for gate charge parameter definition
TC=25 °C
Values
VGS=0 V, VDS=15 V,
f=1 MHz
VDD=15 V, VGS=10 V,
ID=20 A, RG=1.6 Ω
VDD=15 V, ID=20 A,
VGS=0 to 4.5 V
Rev. 1.4 page 3 2009-10-23
BSC072N03LD G
1 Power dissipation 2 Drain current
Ptot=f(TC)ID=f(TC); VGS≥10 V
3 Safe operating area 4 Max. transient thermal impedance
ID=f(VDS); TC=25 °C; D=0 ZthJC=f(tp)
parameter: tpparameter: D=tp/T
1 µs
10 µs
100 µs
1 ms
10 ms
DC
102
101
100
10-1
103
102
101
100
10-1
VDS [V]
ID [A]
limited by on-state
resistance
single pulse
0.01
0.02
0.05
0.1
0.2
0.5
100
10-1
10-2
10-3
10-4
10-5
10-6
0.01
0.1
1
10
0000001
tp [s]
ZthJC [K/W]
0
10
20
30
40
50
60
0 40 80 120 160
TC [°C]
Ptot [W]
0
5
10
15
20
25
0 40 80 120 160
TC [°C]
ID [A]
Rev. 1.4 page 4 2009-10-23
BSC072N03LD G
5 Typ. output characteristics 6 Typ. drain-source on resistance
ID=f(VDS); Tj=25 °C RDS(on)=f(ID); Tj=25 °C
parameter: VGS parameter: VGS
7 Typ. transfer characteristics 8 Typ. forward transconductance
ID=f(VGS); |VDS|>2|ID|RDS(on)max gfs=f(ID); Tj=25 °C
parameter: Tj
3 V
3.2 V 3.5 V
4 V
4.5 V
5 V
10 V
0
5
10
15
20
0102030
ID [A]
RDS(on) [mΩ]
25 °C
150 °C
0
10
20
30
40
50
60
70
80
012345
VGS [V]
ID [A]
0
10
20
30
40
50
60
70
80
0102030
ID [A]
gfs [S]
2.8 V
3 V
3.2 V
3.5 V
4 V
4.5 V
5 V
10 V
0
10
20
30
40
50
60
70
80
0123
VDS [V]
ID [A]
Rev. 1.4 page 5 2009-10-23
BSC072N03LD G
9 Drain-source on-state resistance 10 Typ. gate threshold voltage
RDS(on)=f(Tj); ID=20 A; VGS=10 V VGS(th)=f(Tj); VGS=VDS; ID=250 µA
11 Typ. capacitances 12 Forward characteristics of reverse diode
C=f(VDS); VGS=0 V; f=1 MHz IF=f(VSD)
parameter: Tj
typ
98 %
0
2
4
6
8
10
12
-60 -20 20 60 100 140 180
Tj [°C]
RDS(on) [mΩ]
0
0.5
1
1.5
2
2.5
-60 -20 20 60 100 140 180
Tj [°C]
VGS(th) [V]
Ciss
Coss
Crss
104
103
102
101
0102030
VDS [V]
C [pF]
25 °C
150 °C
25 °C, 98%
150 °C, 98%
1
10
100
0.0 0.5 1.0 1.5 2.0
VSD [V]
IF [A]
Rev. 1.4 page 6 2009-10-23
BSC072N03LD G
13 Avalanche characteristics 14 Typ. gate charge
IAS=f(tAV); RGS=25 ΩVGS=f(Qgate); ID=20 A pulsed
parameter: Tj(start) parameter: VDD
15 Drain-source breakdown voltage 16 Gate charge waveforms
VBR(DSS)=f(Tj); ID=1 mA
20
22
24
26
28
30
32
34
-60 -20 20 60 100 140 180
Tj [°C]
VBR(DSS) [V]
V
GS
Q
gate
V
gs(th)
Q
g(th)
Q
gs
Q
gd
Q
sw
Q
g
25 °C
100 °C
125 °C
0.1
1
10
100
1 10 100 1000
tAV [µs]
IAV [A]
6 V
15 V
24 V
0
2
4
6
8
10
12
0 10203040
Qgate [nC]
VGS [V]
Rev. 1.4 page 7 2009-10-23
BSC072N03LD G
Package Outline and Footprint PG-TDSON-8 dual
Rev. 1.4 page 8 2009-10-23
BSC072N03LD G
Tape PG-TDSON-8
Dimensions in mm
Rev. 1.4 page 9 2009-10-23
BSC072N03LD G
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2008 Infineon Technologies AG
All Rights Reserved.
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conditions or characteristics. With respect to any examples or hints given herein, any typical
values stated herein and/or any information regarding the application of the device,
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including without limitation, warranties of non-infringement of intellectual property rights
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on the types in question, please contact the nearest Infineon Technologies Office.
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Rev. 1.4 page 10 2009-10-23
