LM25066IAPSQ/NOPB - Texas Instruments

LM25066I, LM25066IA

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SNVS824C –JUNE 2012–REVISED MARCH 2013

Intel Node Manager Compliant System Power Management and Protection IC with PMBus

Check for Samples: LM25066I,LM25066IA

1FEATURES DESCRIPTION

While the LM25066I/A is functionally similar to the

2• Fully Node Manager 2.0 and 2.5 Compliant with LM25066/A, the LM25066I/A is fully compliant to Intel

I2C/SMBus interface and PMBus™ compliant Node Manager 2.0, 2.5 and adds the READ_EIN

command structure energy accumulator feature. The LM25066I/A

• Input voltage range: 2.9V to 17V combines a high-performance hot-swap controller

with a PMBus 1.2™compliant SMBus/I2C interface to

• Programmable 25mV or 46mV current limit accurately measure, control and protect the electrical

threshold operating conditions of critical systems. The

• Read_EIN accurately measures true input LM25066I/A continuously supplies real-time power,

power via simultaneous sampling voltage, current, temperature, and fault data to the

• Configurable circuit breaker protection for system management host via the SMBus interface.

hard shorts The LM25066I/A control block includes a unique hot-

• Configurable under- and over-voltage lockouts swap architecture that provides current and power

with hysteresis limiting to protect sensitive circuitry even during the

most stressful conditions. A fast-acting circuit breaker

• Real time monitoring of VIN, VOUT, IIN, PIN, VAUX prevents damage in the event of a short circuit on the

with 12-bit resolution and 1 kHz sampling rate output. The input under-voltage, over-voltage

• Current measurement accuracy: ±1% hysteresis, insertion delay time and fault detection

(LM25066IA) and Power measurement time are all configurable. A temperature monitoring

accuracy: ±2.0% (LM25066IA) over temperature block on the LM25066I/A interfaces with a low-cost

• Averaging of VIN, IIN, PIN, and VOUT over external diode for continuous temperature

assessment of the external MOSFET or other thermal

programmable interval ranging from 0.001 to 4 sensitive components. The POWER GOOD output

seconds provides a fast alert when the input and/or output

• Programmable WARN and FAULT thresholds voltages are outside their programmed range.

with SMBA notification Accurate power readings are accomplished by using

• Blackbox capture of telemetry measurements the READ_EIN command. A black box

and device status triggered by WARN or (Telemetry/Fault Snapshot) function captures and

stores telemetry data and device status in the event

FAULT condition of a warning or a fault.

• 24-lead WQFN package

APPLICATIONS

• Server backplane systems

• Basestation power distribution systems

• Solid state circuit breaker (eFuse)

1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

5x4 mm WQFN 24L

GATE

OUT

PGD

TIMER

ADR2

ADR1

VAUX

SCL

SMBA

VREF

DIODE

PWR

SENSE

VIN

UVLO/EN

OVLO

GND

ADR0

SDA

VDD

RETRY

Exposed

Pad

OUT

UVLO/EN

VIN GATE DIODE

ADR2

ADR1

ADR0

VDD

N/C

OVLO

SDA

SCL

PGD

N/C

SENSE

VDD

SMBus

Interface

SMBA

RETRY

VAUX

VDD VREF TIMER PWR

GND

LM25066I/A Auxillary ADC Input

(0V - 1.16V)

UVLO/EN

VOUT

CLOAD

VIN

CVDD CVREF RPWR

CIN DZQ1

RPG

OUT

LM25066I, LM25066IA

SNVS824C –JUNE 2012–REVISED MARCH 2013

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Typical Application Schematic

Connection Diagram

Solder exposed pad to ground.

Top View

WQFN-24

Product Folder Links: LM25066I LM25066IA

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SNVS824C –JUNE 2012–REVISED MARCH 2013

Pin Descriptions

Pin Name Description Applications Information

No.

Pad Exposed Exposed pad of WQFN No internal electrical connection. Solder to the ground plane to reduce thermal resistance.

Pad package

1 ADR2 SMBUS address line 2 3 - state address line. Should be connected to GND, VDD, or left floating.

2 ADR1 SMBUS address line 1 3 - state address line. Should be connected to GND, VDD, or left floating.

3 ADR0 SMBUS address line 0 3 - state address line. Should be connected to GND, VDD, or left floating.

4 VDD Internal sub-regulator Internally sub-regulated 4.5V bias supply. Connect a 1 µF capacitor on this pin to ground

output for bypassing.

5 CL Current limit range Connect this pin to GND to set the nominal over-current threshold at 25mV. Connecting

CL to VDD will set the over-current threshold to be 46mV.

6 CB Circuit breaker range This pin sets the circuit breaker protection point in relation to the over-current trip point.

When connected to GND, this pin will set the circuit breaker point to be 1.8 times the

over-current threshold. Connecting this pin to VDD sets the circuit breaker trip point to be

3.6 times the over-current threshold.

7 FB Power Good feedback An external resistor divider from OUT sets the output voltage at which the PGD pin

switches. The threshold at the pin is 1.167V. An internal 24 µA current source provides

hysteresis.

8 RETRY Fault retry input This pin configures the power up fault retry behavior. When this pin is grounded, the

device will continually try to engage power during a fault. If the pin is connected to VDD,

the device will latch off during a fault.

9 TIMER Timing capacitor An external capacitor connected to this pin sets the insertion time delay, fault timeout

period and restart timing.

10 PWR Power limit set An external resistor connected to this pin, in conjunction with the current sense resistor

(RS), sets the maximum power dissipation allowed in the external series pass MOSFET.

11 PGD Power Good indicator An open drain output. This output is high when the voltage at the FB pin is above 1.167V

and the input supply is within its under-voltage and over-voltage thresholds. Connect via a

pullup resistor to the output rail (external MOSFET source) or any other voltage to be

monitored.

12 OUT Output feedback Connect to the output rail (external MOSFET source). Internally used to determine the

MOSFET VDS voltage for power limiting, and to monitor the output voltage.

13 GATE Gate drive output Connect to the external MOSFET's gate.

14 SENSE Current sense input The voltage across the current sense resistor (RS) is measured from VIN to this pin. If the

voltage across RSreaches over-current threshold, the load current is limited and the fault

timer activates.

15 VIN Positive supply input A small ceramic bypass capacitor close to this pin is recommended to suppress transients

which occur when the load current is switched off.

16 UVLO/EN Under-voltage lockout An external resistor divider from the system input voltage sets the under-voltage turn-on

threshold. An internal 23 µA current source provides hysteresis. The enable threshold at

the pin is 1.16V. This pin can also be used for remote shutdown control.

17 OVLO Over-voltage lockout An external resistor divider from the system input voltage sets the over-voltage turn-off

threshold. An internal 23 µA current source provides hysteresis. The disable threshold at

the pin is 1.16V.

18 GND Circuit ground

19 SDA SMBus data pin Data pin for SMBus.

20 SCL SMBus clock Clock pin for SMBus.

21 SMBA SMBus alert line Alert pin for SMBus, active low.

22 VREF Internal Reference Internally generated precision 2.73V reference used for analog to digital conversion.

Connect a 1 µF capacitor on this pin to ground for bypassing.

23 DIODE External diode Connect this to a diode-configured NPN transistor for temperature monitoring.

24 VAUX Auxiliary voltage input Auxiliary pin allows voltage telemetry from an external source. Full scale input of 1.16V.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Product Folder Links: LM25066I LM25066IA

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SNVS824C –JUNE 2012–REVISED MARCH 2013

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Absolute Maximum Ratings(1)

VIN, SENSE to GND (2) -0.3V to 24V

GATE, FB, UVLO/EN, OVLO, PGD to GND (2) -0.3V to 20V

Out to GND -1 to 20V

SCL, SDA, SMBA, CL, CB, ADR0, ADR1, ADR2, VDD, VAUX, DIODE, RETRY to GND -0.3V to 6V

VIN to SENSE -0.3V to +0.3V

ESD Rating, Human Body Model(3) 2kV

Storage Temperature -65°C to +150°C

Junction Temperature +150°C

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for

which the device is intended to be functional.

(2) The GATE pin voltage is typically 7.5V above VIN when the LM25066I/A is enabled. Therefore, the Absolute Maximum Rating of 24V for

VIN and SENSE apply only when the LM25066I/A is disabled or for a momentary surge to that voltage since the Absolute Maximum

Rating for the GATE pin is 20V.

(3) The human body model is a 100 pF capacitor discharged through a 1.5 kΩresistor into each pin.

Operating Ratings

VIN, SENSE, OUT voltage 2.9V to 17V

VDD 2.9V to 5.5V

Junction Temperature −40°C to +125°C

Electrical Characteristics

Limits in standard type are for TJ= 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C

to +85°C unless otherwise stated. Minimum and Maximum limits are specified through test, design, or statistical correlation.

Typical values represent the most likely parametric norm at TJ= 25°C, and are provided for reference purposes only. Unless

otherwise stated the following conditions apply: VIN = 12V. See (1) and

Symbol Parameter Conditions Min Typ Max Unit

Input (VIN Pin)

IIN-EN Input Current, enabled UVLO = 2V and OVLO = 0.7V 5.8 8mA

POR Power On Reset threshold at VIN VIN increasing 2.6 2.8 V

PORHYS POREN Hysteresis VIN decreasing 150 mV

VDD Regulator (VDD pin)

VDD IVDD = 5mA, VIN = 12V 4.3 4.5 4.7 V

IVDD = 5mA, VIN = 4.5V 3.5 3.9 4.3 V

VDDILIM VDD Current Limit 25 45 mA

UVLO/EN, OVLO Pins

UVLOTH UVLO threshold VUVLO Falling 1.147 1.16 1.173 V

UVLOHYS UVLO hysteresis current UVLO = 1V 18 23 28 µA

UVLODEL UVLO delay Delay to GATE high 8 µs

Delay to GATE low 20

UVLOBIAS UVLO bias current UVLO = 3V 1µA

OVLOTH OVLO threshold VOVLO rising 1.141 1.16 1.185 V

OVLOHYS OVLO hysteresis current OVLO = 1V -28 -23 -18 µA

OVLODEL OVLO delay Delay to GATE high 19 µs

Delay to GATE low 9

OVLOBIAS OVLO bias current OVLO = 1V 1µA

Power Good (PGD pin)

PGDVOL Output low voltage ISINK = 2 mA 25 60 mV

PGDIOH Off leakage current VPGD = 17V 1µA

PGDDELAY Power Good Delay VFB to VPG 115 ns

(1) Current out of a pin is indicated as a negative value.

Product Folder Links: LM25066I LM25066IA

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SNVS824C –JUNE 2012–REVISED MARCH 2013

Electrical Characteristics (continued)

Limits in standard type are for TJ= 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C

to +85°C unless otherwise stated. Minimum and Maximum limits are specified through test, design, or statistical correlation.

Typical values represent the most likely parametric norm at TJ= 25°C, and are provided for reference purposes only. Unless

otherwise stated the following conditions apply: VIN = 12V. See (1) and

Symbol Parameter Conditions Min Typ Max Unit

FB Pin

FBTH FB Threshold VFB rising 1.141 1.167 1.19 V

FBHYS FB Hysteresis Current -31 -24 -18 µA

FBLEAK Off Leakage Current VFB = 1V 1µA

Power Limit (PWR Pin)

PWRLIM Power limit sense voltage (VIN-SENSE) SENSE-OUT = 12V, RPWR = 25 kΩ912.5 15 mV

IPWR PWR pin current VPWR = 2.5V -10 µA

RSAT(PWR) PWR pin impedance when disabled UVLO = 0.7V 180 Ω

Gate Control (GATE Pin)

IGATE Source current Normal operation -28 -22 -16 µA

Fault Sink current UVLO = 1V 1.5 22.5 mA

POR Circuit Breaker sink current VIN - SENSE = 150 mV or VIN < RPOR,105 190 275 mA

VGATE = 5V

VGATE Gate output voltage in normal operation GATE voltage with respect to ground 17 18.8 20.3 V

OUT Pin

IOUT-EN OUT bias current, enabled OUT = VIN, normal operation 16 µA

IOUT-DIS OUT bias current, disabled (2) Disabled, OUT = 0V, SENSE = VIN -12 µA

Current Limit

VCL Threshold voltage CL = GND 22.5 25 27.5 mV

CL = GND, TJ= 10°C to 85°C 23 25 27

CL = VDD 41 46 52

tCL Response time VIN-SENSE stepped from 0 mV to 80 mV 1.2 µs

ISENSE SENSE input current Enabled, SENSE = OUT 33 µA

Disabled, OUT = 0V 46

Enabled, OUT = 0V 45

Circuit Breaker

VCB Threshold voltage x 1.8 VIN - SENSE, CL = GND, CB = GND 35 45 55 mV

CB:CL Ratio CB = GND 1.6 1.8 2

VCB Threshold voltage x 3.6 VIN - SENSE, CL = GND, CB = VDD 70 90 110 mV

CB:CL Ratio CB = VDD 3.1 3.6 4

tCB Response time VIN - SENSE stepped from 0 mV to 150 0.6 1.2 µs

mV, time to GATE low, no load

Timer (TIMER pin)

VTMRH Upper threshold 1.54 1.7 1.85 V

VTMRL Lower threshold Restart cycles 0.85 1.0 1.07 V

End of 8th cycle 0.3 V

Re-enable threshold 0.3 V

ITIMER Insertion time current TIMER pin = 2V -8 -5.5 -3 µA

Sink current, end of insertion time 1.4 1.9 2.4 mA

Fault detection current -120 -90 -60 µA

Fault sink current 2.8 µA

DCFAULT Fault Restart Duty Cycle 0.67 %

tFAULT_DELAY Fault to GATE low delay TIMER pin reaches the upper threshold 17 µs

(2) OUT bias current (disabled) due to leakage current through an internal 0.9 MΩresistance from SENSE to VOUT.

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SNVS824C –JUNE 2012–REVISED MARCH 2013

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Electrical Characteristics (continued)

Limits in standard type are for TJ= 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C

to +85°C unless otherwise stated. Minimum and Maximum limits are specified through test, design, or statistical correlation.

Typical values represent the most likely parametric norm at TJ= 25°C, and are provided for reference purposes only. Unless

otherwise stated the following conditions apply: VIN = 12V. See (1) and

Symbol Parameter Conditions Min Typ Max Unit

Internal Reference

VREF Reference Voltage 2.703 2.73 2.757 V

ADC and MUX

Resolution 12 Bits

INL Integral Non-Linearity ADC only +/-1 LSB

tAQUIRE Acquisition + Conversion Time Any channel 100 µs

tRR Acquisition Round Robin Time Cycle all channels 1 ms

IINFSR Current input full scale range CL = GND 30.2 mV

CL = VDD 60.4 mV

IINLSB Current input LSB CL = GND 7.32 µV

CL = VDD 14.64 µV

VAUXFSR VAUX input full scale range 1.16 V

VAUXLSB VAUX input LSB 283.2 µV

VINFSR Input voltage full scale range 18.7 V

VINLSB Input voltage LSB 4.54 mV

Product Folder Links: LM25066I LM25066IA

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SNVS824C –JUNE 2012–REVISED MARCH 2013

Electrical Characteristics (continued)

Limits in standard type are for TJ= 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C

to +85°C unless otherwise stated. Minimum and Maximum limits are specified through test, design, or statistical correlation.

Typical values represent the most likely parametric norm at TJ= 25°C, and are provided for reference purposes only. Unless

otherwise stated the following conditions apply: VIN = 12V. See (1) and

Symbol Parameter Conditions Min Typ Max Unit

Telemetry Accuracy LM25066IA

IINACC Input Current Accuracy VIN – SENSE = 25mV, CL = GND -1 +1 %

TJ= 10°C to 85°C

VIN – SENSE = 25mV, CL = GND -1.2 +1

VIN – SENSE = 50mV, CL = VDD -1.8 +1.8

VIN- SENSE= 5mV, CL= GND -5 +5

TJ= 10°C to 85°C

VACC VAUX, VIN, VOUT Accuracy VIN, VOUT = 12V -1 +1 %

VAUX = 1V

TJ= 10°C to 85°C

VIN, VOUT = 12V -1 +1.2

VAUX = 1V

PINACC Input Power Accuracy VIN = 12V, VIN – SENSE = 25mV, -2.0 +2.0 %

CL = GND

Telemetry Accuracy LM25066I

IINACC Input Current Accuracy VIN – SENSE = 25mV, CL = GND -2.7 +2.4 %

VIN – SENSE = 25mV, CL = GND -2.4 +2.4

TJ= 10°C to 85°C

VACC VAUX, VIN, VOUT Accuracy VIN, VOUT = 12V -1.6 +1.4 %

VAUX = 1V

VIN, VOUT = 12V -1.4 +1.4

VAUX = 1V

TJ= 10°C to 85°C

PINACC Input Power Accuracy VIN = 12V, VIN – SENSE = 25mV, -3.0 +3.0 %

CL = GND

Remote Diode Temperature Sensor

TACC Temperature Accuracy Using Local TA= 10°C to 85°C 2 10 °C

Diode

Remote Diode Resolution 9 bits

IDIODE External Diode Current Source High level 250 300 µA

Low level 9.4 µA

Diode Current Ratio 26

PMBus Pin Thresholds (SMBA, SDA, SCL)

VIL Data, Clock Input Low Voltage 0.8 V

VIH Data, Clock Input High Voltage 2.1 5.5 V

VOL Data Output Low Voltage IPULLUP = 4mA 0 0.4 V

ILEAK Input Leakage Current SDA, SMBA, SCL = 5V 1µA

CL Pin Capacitance SDA, SCL 5 pF

Configuration Pin Thresholds (CB, CL, RETRY)

VIH Threshold Voltage 3V

ILEAK Input Leakage Current CL, CB, RETRY = 5V 1mA

Thermal (3)

θJA Junction to Ambient 42.3 °C/W

θJC Junction to Case 9.5 °C/W

(3) Junction-to-ambient thermal resistance is highly application and board layout dependent. Specified thermal resistance values for the

package specified is based on a 4-layer, 4"x3", 2/1/1/2 oz. Cu board as per JEDEC standards is used.

Product Folder Links: LM25066I LM25066IA

-60 -40 -20 0 20 40 60 80 100120140

-18

-16

-14

-12

-10

-8

-6

-4

-2

OUTPUT PIN CURRNET (DISABLED) (A)

TEMPERATURE (°C)

VIN = 17V

VIN = 2.9V

VIN = 12V

-60 -40 -20 0 20 40 60 80 100120140

GATE PIN VOLTAGE (V)

TEMPERATURE (°C)

VIN = 17V

VIN = 9V

VIN = 5V

VIN = 12V

VIN = 2.9V

-40 -20 0 20 40 60 80 100 120

SENSE PIN CURRENT (DISABLED) (A)

TEMPERATURE (°C)

VIN = 17V

VIN = 12V

VIN = 2.9V

-60 -40 -20 0 20 40 60 80 100120140

OUTPUT PIN CURRENT (ENABLED) (A)

TEMPERATURE (°C)

VIN = 17V

VIN = 12V

VIN = 2.9V

-60 -40 -20 0 20 40 60 80 100120140

SENSE PIN CURRENT (ENABLED) (A)

TEMPERATURE (°C)

VIN = 17V

VIN = 12V

VIN = 2.9V

-40 -20 0 20 40 60 80 100 120 140

3.0

3.5

4.0

4.5

5.0

5.5

6.0

VIN INPUT CURRENT (mA)

TEMPERATURE (°C)

VIN = 17V

VIN = 12V

VIN = 3V

LM25066I, LM25066IA

SNVS824C –JUNE 2012–REVISED MARCH 2013

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Typical Performance Characteristics

Unless otherwise specified the following conditions apply: TJ= 25°C, VIN = 12V. All graphs show junction temperature.

VIN Pin Current SENSE Pin Current (Enabled)

Figure 1. Figure 2.

SENSE Pin Current (Disabled) OUT Pin Current (Enabled)

Figure 3. Figure 4.

OUT Pin Current (Disabled) GATE Pin Voltage

Figure 5. Figure 6.

Product Folder Links: LM25066I LM25066IA

-60 -40 -20 0 20 40 60 80 100120140

23.0

23.2

23.4

23.6

23.8

24.0

UVLO HYSTERESIS CURRENT (A)

TEMPERATURE (°C)

-60-40 -20 0 20 40 60 80 100120140

1.162

1.163

1.164

1.165

1.166

1.167

1.168

1.169

1.170

1.171

1.172

FB THRESHOLD (V)

TEMPERATURE (°C)

-60 -40 -20 0 20 40 60 80 100120140

PGD LOW VOLTAGE (mV)

TEMPERATURE (°C)

PGD Sink Current = 2mA

-60 -40 -20 0 20 40 60 80 100120140

1.15

1.16

1.17

UVLO THRESHOLD (V)

TEMPERATURE (°C)

VIN = 2.9 to 12V

VIN = 17V

-40 -20 0 20 40 60 80 100 120 140

GATE PIN SOURCE CURRENT (A)

TEMPERATURE (°C)

VIN = 5V TO 17V

VIN = 2.9V

-40 -20 0 20 40 60 80 100 120 140

POWER LIMIT THRESHOLD (mV)

TEMPERATURE (°C)

RPWR=50K; CL = VDD

RPWR=25K; CL = GND

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SNVS824C –JUNE 2012–REVISED MARCH 2013

Typical Performance Characteristics (continued)

Unless otherwise specified the following conditions apply: TJ= 25°C, VIN = 12V. All graphs show junction temperature.

GATE Pin Source Current Power Limit Threshold

Figure 7. Figure 8.

PGD Low Voltage UVLO Threshold

Figure 9. Figure 10.

UVLO Hysteresis Current FB Threshold

Figure 11. Figure 12.

Product Folder Links: LM25066I LM25066IA

-60 -40 -20 0 20 40 60 80 100120140

100

120

140

160

180

200

CIRCUIT BREAKER THRESHOLD (mV)

TEMPERATURE (°C)

CL = GND, CB = GND

CL = GND, CB = VDD

CL = VDD, CB = VDD

-60 -40 -20 0 20 40 60 80 100120140

CURRENT LIMIT THRESHOLD (mV)

TEMPERATURE (°C)

VIN = 2.9V

VIN = 5V to 17V

-60-40-20 0 20 40 60 80 100120140

-26.0

-25.5

-25.0

-24.5

-24.0

-23.5

-23.0

FB HYSTERESIS (A)

TEMPERATURE (°C)

-60 -40 -20 0 20 40 60 80 100120140

23.0

23.5

24.0

24.5

25.0

25.5

26.0

26.5

27.0

CURRENT LIMIT THRESHOLD (mV)

TEMPERATURE (°C)

VIN = 2.9V

VIN = 5V to 17V

-60 -40 -20 0 20 40 60 80 100120140

1.162

1.163

1.164

1.165

1.166

1.167

OVLO THRESHOLD (V)

TEMPERATURE (°C)

VIN = 2.9V

VIN = 17V

VIN = 12V

-60 -40 -20 0 20 40 60 80 100120140

-30

-28

-26

-24

-22

-20

-18

-16

OVLO HYSTERESIS CURRENT (A)

TEMPERATURE (°C)

VIN = 12V to 17V

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SNVS824C –JUNE 2012–REVISED MARCH 2013

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Typical Performance Characteristics (continued)

Unless otherwise specified the following conditions apply: TJ= 25°C, VIN = 12V. All graphs show junction temperature.

OVLO Threshold OVLO Hysteresis

Figure 13. Figure 14.

FB Pin Hysteresis Current Limit Threshold

Figure 15. Figure 16.

Current Limit Threshold Circuit Breaker Threshold (CL = VDD)

Figure 17. Figure 18.

Product Folder Links: LM25066I LM25066IA

40 ms/DIV

GATE

VIN

UVLO = 2.9V

hyst = 0.2V

OVLO = 15.2V

hyst = 1.2V 5V/DIV

40 ms/DIV

PGOOD

VOUT

10.7V

5V/DIV

VIN

10.25V

400 ms/DIV

TIMER

VIN

GATE

VOUT

RETRY PERIOD = 1.10s

10V/DIV

1V/DIV

1 ms/DIV

TIMER

ILOAD

GATE

VOUT

2.5A/DIV

10V/DIV

1V/DIV

-60 -40 -20 0 20 40 60 80 100120140

2.70

2.71

2.72

2.73

2.74

2.75

VREF (V)

TEMPERATURE (°C)

100 ms/DIV

TIMER

VIN

GATE

VOUT

INSERTION DELAY = 140 ms

10V/DIV

1V/DIV

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SNVS824C –JUNE 2012–REVISED MARCH 2013

Typical Performance Characteristics (continued)

Unless otherwise specified the following conditions apply: TJ= 25°C, VIN = 12V. All graphs show junction temperature.

Reference Voltage Startup (Insertion Delay)

Figure 19. Figure 20.

Startup (Short circuit VOUT) Startup (5A Load)

Figure 21. Figure 22.

Startup (UVLO, OVLO) Startup (PGOOD)

Figure 23. Figure 24.

Product Folder Links: LM25066I LM25066IA

-15 -5 5 15 25 35 45 55 65 75 85

-0.5

-0.4

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

0.4

0.5

IIN ERROR ( % OF FSR)

TEMPERATURE ( °C)

-15 -5 5 15 25 35 45 55 65 75 85

-1.0

-0.8

-0.6

-0.4

-0.2

0.0

0.2

0.4

0.6

0.8

1.0

PIN ERROR (% OF FSR)

TEMPERATURE (°C)

TIMER

ILOAD

VOUT

RETRY PERIOD = 1.1s

25A/DIV

10V/DIV

1V/DIV

400 ms/DIV

TIMER

ILOAD

GATE

VOUT

25A/DIV

10V/DIV

1V/DIV

100 ms/DIV

TIMER

ILOAD

GATE

VOUT

TIMEOUT PERIOD

= 8.3 ms

25A/DIV

10V/DIV

1V/DIV

>50A

4 ms/DIV

TIMER

ILOAD

GATE

VOUT

50A/DIV

10V/DIV

1V/DIV

> 90A Triggers

Circuit Breaker

1 ms/DIV

LM25066I, LM25066IA

SNVS824C –JUNE 2012–REVISED MARCH 2013

www.ti.com

Typical Performance Characteristics (continued)

Unless otherwise specified the following conditions apply: TJ= 25°C, VIN = 12V. All graphs show junction temperature.

Current Limit Event (CL = GND) Circuit Breaker Event (CL = CB = GND)

Figure 25. Figure 26.

Retry Event (Retry = GND) Latch Off (Retry = VDD)

Figure 27. Figure 28.

IIN Measurement Accuracy PIN Measurement Accuracy

(VIN - SENSE = 25 mV) (VIN - SENSE = 25 mV)

Figure 29. Figure 30.

Product Folder Links: LM25066I LM25066IA

VIN

SENSE

OUT

PWR

GATE

22 A

10A

1.16V

OVLO

UVLO/EN

23 A

5.5 A

Insertion

Timer 90 A

Fault

Timer

2.8 A

Fault

Discharge

1.72V

1.0V

TIMER

Current Limit

Threshold

Charge

Pump

VDS

23 A

TIMER AND GATE

LOGIC CONTROL

GND

Power Limit

Threshold

2 mA

Gate

Control 18.8V

1 M

1.9 mA

End

Insertion

Time

0.3V

LM25066I/A

Current Limit/

Power Limit

Control

2.6V

VIN

POR

25 mV

190

1/16

S/H

1/16

VAUX

12bit

ADC

AMUX

SMBUS

INTERFACE

DIODE

ADR0

ADR1

ADR2

SCL

SDA

SMBA

ADDRESS

DECODER

TELEMETRY

STATE

MACHINE

Gain = 2.3V/V

RETRY

Diode

Temp

Sense

SnapShot

VDD

REG

VDD 1.167V UV

VREF

PGD

REF

GEN

24 A

MEASUREMENT/

AVERAGING

FAULT REGISTERS

2.5V

VDD

LM25066I, LM25066IA

www.ti.com

SNVS824C –JUNE 2012–REVISED MARCH 2013

BLOCK DIAGRAM

Product Folder Links: LM25066I LM25066IA

OUT

UVLO/EN

VIN GATE DIODE

ADR2

ADR1

ADR0

VDD

N/C

OVLO

SDA

SCL

PGD

N/C

SENSE

VDD

SMBus

Interface

SMBA

RETRY

VAUX

VDD VREF TIMER PWR

GND

LM25066I/A Auxillary ADC Input

(0V - 1.16V)

UVLO/EN

VOUT

CLOAD

VIN

CVDD CVREF RPWR

CIN DZQ1

RPG

OUT

LM25066I, LM25066IA

SNVS824C –JUNE 2012–REVISED MARCH 2013

www.ti.com

FUNCTIONAL DESCRIPTION

The inline protection functionality of the LM25066I/A is designed to control the in-rush current to the load upon

insertion of a circuit card into a live backplane or other “hot” power source, thereby limiting the voltage sag on the

backplane’s supply voltage and the dV/dt of the voltage applied to the load. Effects on other circuits in the

system are minimized, preventing possible unintended resets. A controlled shutdown when the circuit card is

removed can also be implemented using the LM25066I/A.

In addition to a programmable current limit, the LM25066I/A monitors and limits the maximum power dissipation

in the series pass device to maintain operation within the device Safe Operating Area (SOA). Either current

limiting or power limiting for an extended period of time results in the shutdown of the series pass device. In this

event, the LM25066I/A can latch off or repetitively retry based on the hardware setting of the RETRY pin. Once

started, the number of retries can be set to none, 1, 2, 4, 8, 16, or infinite. The circuit breaker function quickly

switches off the series pass device upon detection of a severe over-current condition. Programmable under-

voltage lockout (UVLO) and over-voltage lockout (OVLO) circuits shut down the LM25066I/A when the system

input voltage is outside the desired operating range.

The telemetry capability of the LM25066I/A provides intelligent monitoring of the input voltage, output voltage,

input current, input power, temperature, and an auxiliary input. The LM25066I/A also provides a peak capture of

the input power and programmable hardware averaging of the input voltage, current, power, and output voltage.

Warning thresholds which trigger the SMBA pin may be programmed for input and output voltage, current, power

and temperature via the PMBus interface. Additionally, the LM25066I/A is capable of detecting damage to the

external MOSFET, Q1.

Figure 31. Typical Application Circuit

Power Up Sequence

The VIN operating range of the LM25066I/A is +2.9V to +17V, with transient capability to +24V. Referring to

Figure 31 and Figure 32, as the voltage at VIN initially increases, the external N-channel MOSFET (Q1) is held

off by an internal 190 mA pulldown current at the GATE pin. The strong pulldown current at the GATE pin

prevents an inadvertent turn-on as the MOSFET’s gate-to-drain (Miller) capacitance is charged. Additionally, the

TIMER pin is initially held at ground. When the VIN voltage reaches the POR threshold, the insertion time begins.

During the insertion time, the capacitor at the TIMER pin (CT) is charged by a 5.5 µA current source and Q1is

held off by a 2 mA pulldown current at the GATE pin regardless of the input voltage. The insertion time delay

allows ringing and transients at VIN to settle before Q1is enabled. The insertion time ends when the TIMER pin

Product Folder Links: LM25066I LM25066IA