MITSUBISHI <INTELLIGENT POWER MODULES>
PM50RSD060
FLAT-BASE TYPE
INSULATED PACKAGE
Sep. 2001
MITSUBISHI <INTELLIGENT POWER MODULES>
PM50RSD060
FLAT-BASE TYPE
INSULATED PACKAGE
PM50RSD060 FEATURE
a) Adopting new 4th generation planar IGBT chip, which per-
formance is improved by 1µm fine rule process.
For example, typical VCE(sat)=1.7V
b) Using new Diode which is designed to get soft reverse
recovery characteristics.
c) Keeping the package compatibility.
The layout/position of both terminal pin and mounting hole
is same as S-series 3rd generation IPM.
•3φ 50A, 600V Current-sense IGBT for 15kHz switching
• 15A, 600V Current-sense regenerative brake IGBT
• Monolithic gate drive & protection logic
• Detection, protection & status indication circuits for over-
current, short-circuit, over-temperature & under-voltage
(P-Fo available from upper leg devices)
• Acoustic noise-less 3.7kW class inverter application
APPLICATION
General purpose inverter, servo drives and other motor controls
PACKAGE OUTLINES Dimensions in mm
PBT
19
18
17
16
15
14
13
12
11
9
10
78654321
BPN
WVU
A
MOUNTING HOLES
Screwing depth
Min9.0
10
12
19- 0.5
31.6
2-φ2.54
32.6
110
±1
95
±0.5
24.5
17.5
0.5
±0.3
3.22
2
±0.5
17
74
±0.5
89
±1
4
19.4
66.44
22
4.5
2626
2020
17.02 10
10
3-2
4-R6
6-M5NUTS
4-φ5.5
6-2
3-23-2
10
LABEL
10.6
11.61.6
3.22 3-2
φ2.54
22
21.2
–0.5
+1.0
0.5
Terminal code
1. VUPC
2. UFO
3. UP
4. VUP1
5. VVPC
6. VFO
7. VP
8. VVP1
9. VWPC
10. WFO
11. WP
12. VWP1
13. VNC
14. VN1
15. Br
16. UN
17. VN
18. WN
19. Fo
A : DETAIL
MITSUBISHI <INTELLIGENT POWER MODULES>
PM50RSD060
FLAT-BASE TYPE
INSULATED PACKAGE
Sep. 2001
VCES
±IC
±ICP
PC
Tj
Collector-Emitter Voltage
Collector Current
Collector Current (Peak)
Collector Dissipation
Junction Temperature
VD = 15V, VCIN = 15V
TC = 25°C
TC = 25°C
TC = 25°C
V
A
A
W
°C
MAXIMUM RATINGS (Tj = 25°C, unless otherwise noted)
INVERTER PART
Symbol Parameter Condition Ratings Unit
600
50
100
125
–20 ~ +150
Rfo=1.5kΩ
W
P
V
WP1
V
WPC
UNBr Fo
BNWVPU
V
P
V
VP1
V
VPC
U
P
V
UP1
V
UPC
WNVN1VNC VN
Gnd In Fo Vcc
Gnd Si Out
U
FO
W
FO
V
FO
RfoRfo RfoRfo
Th
Gnd In Fo Vcc
Gnd Si Out
Gnd In Fo Vcc
Gnd Si Out
Gnd In Fo Vcc
Gnd Si Out
Gnd In Fo Vcc
Gnd Si Out
Gnd In Fo Vcc
Gnd Si Out
Gnd In Fo Vcc
Gnd Si Out
INTERNAL FUNCTIONS BLOCK DIAGRAM
VCES
IC
ICP
PC
VR(DC)
IF
Tj
BRAKE PART
Collector-Emitter Voltage
Collector Current
Collector Current (Peak)
Collector Dissipation
FWDi Rated DC Reverse Voltage
FWDi Forward Current
Junction Temperature
VD = 15V, VCIN = 15V
TC = 25°C
TC = 25°C
TC = 25°C
TC = 25°C
TC = 25°C
V
A
A
W
V
A
°C
Symbol Parameter Condition Ratings Unit
600
15
30
52
600
15
–20 ~ +150
VFO
IFO
CONTROL PART
V
mA
20
20
Supply Voltage
Input Voltage
Fault Output Supply Voltage
Fault Output Current
Symbol Parameter Condition Ratings Unit
Applied between : VUP1-VUPC
VVP1-VVPC, VWP1-VWPC, VN1-VNC
Applied between : UP-VUPC, VP-VVPC
WP-VWPC, UN • VN • WN • Br-VNC
Applied between : UFO-VUPC, VFO-VVPC, WFO-VWPC
FO-VNC
Sink current at UFO, VFO, WFO, FO terminals
20
20
VD
VCIN
V
V
MITSUBISHI <INTELLIGENT POWER MODULES>
PM50RSD060
FLAT-BASE TYPE
INSULATED PACKAGE
Sep. 2001
ParameterSymbol
Supply Voltage Protected by
OC & SC
Supply Voltage (Surge)
Module Case Operating
Temperature
Storage Temperature
Isolation Voltage
Condition
VCC(surge)
TC
Tstg
Viso
Ratings
VCC(PROT) 400
500
–20 ~ +100
–40 ~ +125
2500
Unit
V
°C
°C
Vrms
V
VD = 13.5 ~ 16.5V, Inverter Part,
Tj = 125°C Start
Applied between : P-N, Surge value or without switching
(Note-1)
60Hz, Sinusoidal, Charged part to Base, AC 1 min.
(Note-1) Tc measurement point is as shown below. (Base plate depth 3mm)
TOTAL SYSTEM
PBT
BPN
WVU
Tc
64mm
–IC = 50A, VD = 15V, VCIN = 15V (Fig. 2)
2.3
2.3
3.3
2.4
0.3
1.0
3.3
1.2
1
10
Min. Typ. Max.
Collector-Emitter
Saturation Voltage
Collector-Emitter
Cutoff Current
ELECTRICAL CHARACTERISTICS (Tj = 25°C, unless otherwise noted)
INVERTER PART
Parameter
Symbol Test Condition
VCE(sat)
ICES
VEC
ton
trr
tc(on)
toff
tc(off)
Limits
—
—
—
0.8
—
—
—
—
—
—
1.7
1.7
2.2
1.2
0.15
0.4
2.4
0.6
—
—
Tj = 25°C
Tj = 125°C
FWDi Forward Voltage
Switching Time
VD = 15V, VCIN = 15V↔0V
VCC = 300V, IC = 50A
Tj = 125°C
Inductive Load (upper and lower arm) (Fig. 3)
VCE = VCES, VCIN = 15V (Fig. 4)
VD = 15V, IC = 50A
VCIN = 0V, Pulsed (Fig. 1) V
mA
V
µs
Unit
Tj = 25°C
Tj = 125°C
°C/W
Rth(j-c)Q
Rth(j-c)F
Rth(j-c)Q
Rth(j-c)F
Rth(j-c’)Q
Rth(j-c’)F
Rth(j-c’)Q
Rth(j-c’)F
Rth(c-f)
Symbol Test Condition Unit
Limits
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
THERMAL RESISTANCES
(Note-2) TC measurement point is just under the chips.
If you use this value, Rth(f-a) should be measured just under the chips.
Min. Typ. Max.
Inverter IGBT part (per 1 element), (Note-1)
Inverter FWDi part (per 1 element), (Note-1)
Brake IGBT part, (Note-1)
Brake FWDi part, (Note-1)
Inverter IGBT part (per 1 element), (Note-2)
Inverter FWDi part (per 1 element), (Note-2)
Brake IGBT part, (Note-2)
Brake FWDi part, (Note-2)
Case to fin, Thermal grease applied (per 1 module)
1.00
2.50
2.40
3.86
0.82
1.51
1.72
2.87
0.027
Parameter
Junction to case Thermal
Resistances
Contact Thermal Resistance
MITSUBISHI <INTELLIGENT POWER MODULES>
PM50RSD060
FLAT-BASE TYPE
INSULATED PACKAGE
Sep. 2001
IF = 15A (Fig. 2)
3.5
3.5
—
—
—
—
Main terminal screw : M5
Mounting part screw : M5
—
Symbol Parameter
Mounting torque
Mounting torque
Weight
Test Condition Unit
N • m
N • m
g
Limits
Min. Typ. Max.
2.5
2.5
—
3.0
3.0
560
MECHANICAL RATINGS AND CHARACTERISTICS
—
—
—
—
—
VCE(sat)
ICES
VFM
V
mA
Min. Typ. Max.
V
Collector-Emitter
Saturation Voltage
FWDi Forward Voltage
Collector-Emitter
Cutoff Current
Unit
Parameter
Symbol Test Condition Limits
2.5
2.6
3.0
1
10
1.8
1.9
2.0
—
—
Tj = 25°C
Tj = 125°C
BRAKE PART
VD = 15V, IC = 15A
VCIN = 0V, Pulsed (Fig. 1)
VCE = VCES, VCIN = 15V (Fig. 4) Tj = 25°C
Tj = 125°C
VD = 15V, VCIN = 15V
Applied between : UP-VUPC, VP-VVPC, WP-VWPC
UN • VN • WN • Br-VNC
ID60
18
1.8
2.3
220
180
—
—
—
—
—
125
—
12.5
—
0.01
15
—
mA
Circuit Current
Input ON Threshold Voltage
Input OFF Threshold Voltage
Over Current Trip Level
Short Circuit Trip Level
Over Current Delay Time
Over Temperature Protection
Supply Circuit Under-Voltage
Protection
Fault Output Current
Minimum Fault Output Pulse
Width
Vth(ON)
Vth(OFF)
OC
SC
toff(OC)
OT
OTr
UV
UVr
IFO(H)
IFO(L)
tFO
Trip level
Reset level
Trip level
Reset level
CONTROL PART
—
—
1.2
1.7
—
109
65
18
—
—
—
111
—
11.5
—
—
—
1.0
Parameter
Symbol Test Condition Max.
Min. Typ. Unit
Limits
44
13
1.5
2.0
—
128
—
26
132
39
10
118
100
12.0
12.5
—
10
1.8
(Note-3) Fault output is given only when the internal OC, SC, OT & UV protection.
Fault output of OC, SC and UV protection operate by upper and lower arms.
Fault output of OT protection operate by lower arm.
Fault output of OC, SC protection given pulse.
Fault output of OT, UV protection given pulse while over level.
Base-plate
Temperature detection, VD = 15V
–20 ≤ Tj ≤ 125°C
VD = 15V, VFO = 15V (Note-3)
VD = 15V (Note-3)
V
µs
VN1-VNC
VXP1-VXPC
Tj = –20°C
Tj = 25°C
Tj = 125°C
Inverter part
Brake part
A
A
Inverter part
VD = 15V (Fig. 5,6)
Break part
–20 ≤ Tj ≤ 125°C, VD = 15V (Fig. 5,6)
–20≤ Tj ≤ 125°C, VD = 15V (Fig. 5,6)
VD = 15V (Fig. 5,6)
°C
V
mA
ms
RECOMMENDED CONDITIONS FOR USE
Recommended value Unit
Test Condition
Symbol Parameter
V
Applied across P-N terminals
Applied between : VUP1-VUPC, VVP1-VVPC
VWP1-VWPC, VN1-VNC (Note-4)
Applied between : UP-VUPC, VP-VVPC, WP-VWPC
UN • VN • WN • Br-VNC
Using Application Circuit input signal of IPM, 3φ
sinusoidal PWM VVVF inverter (Fig. 8)
For IPM’s each input signals (Fig. 7)
Supply Voltage
Control Supply Voltage
Input ON Voltage
Input OFF Voltage
PWM Input Frequency
Arm Shoot-through
Blocking Time
≤ 400
15 ±1.5
≤ 0.8
≥ 4.0
≤ 20
≥ 2.5
VCC
VCIN(ON)
VCIN(OFF)
fPWM
tdead
VDV
kHz
µs
V
(Note-4) Allowable Ripple rating of Control Voltage : dv/dt ≤ ±5V/µs, 2Vp-p
MITSUBISHI <INTELLIGENT POWER MODULES>
PM50RSD060
FLAT-BASE TYPE
INSULATED PACKAGE
Sep. 2001
PRECAUTIONS FOR TESTING
1. Before appling any control supply voltage (VD), the input terminals should be pulled up by resistores, etc. to their corre-
sponding supply voltage and each input signal should be kept off state.
After this, the specified ON and OFF level setting for each input signal should be done.
2. When performing “OC” and “SC” tests, the turn-off surge voltage spike at the corresponding protection operation should not
be allowed to rise above VCES rating of the device.
(These test should not be done by using a curve tracer or its equivalent.)
10%
90%
trr
Irr
trtd (on)
tc (on) tc (off)
td (off)
VCIN
Ic
VCE
10%
10% 10%
90%
tf
(ton= td (on) + tr) (toff= td (off) + tf)
VD (all) U,V,W, (N)
P, (U,V,W,B) A
Pulse
VCE
VCIN
(15V)
VD (all) U,V,W, (N)
P, (U,V,W,B)
VCIN
VCC
IC
IC
IC
OC
SC
VCIN
t
off (OC)
U,V,W
N
V
CINN
V
CINP
V
D
V
D
P
Ic
Vcc
V
CINN
0V
0V
V
CINP
t
t
t
dead
t
dead
t
dead
P, (U,V,W,B)
U,V,W, (N) U,V,W,B, (N)
VD (all)
IN
Fo
Fo
Fo
IN
Fo
VD (all)
V
CIN
(0V)
Ic
V V
P, (U,V,W)
V
CIN
(15V)
–Ic
P
N
N
C
S
C
S
U,V,W
Vcc
Vcc
Ic
Ic
VD (all)
VD (all)
P
U,V,W
VCIN
VCIN
VCIN
(15V)
VCIN
(15V)
Fo
Fo
IN
Fo
IN
Fo
Short Circuit Current
Over Current
Constant Current
Constant Current
Fig. 7 Dead time measurement point example
Fig. 3 Switching time Test circuit and waveform
Fig. 1 VCE(sat) Test Fig. 2 VEC, (VFM) Test
a) Lower Arm Switching
b) Upper Arm Switching
Fig. 4 ICES Test
Fig. 5 OC and SC Test Fig. 6 OC and SC Test waveform
Signal input
(Upper Arm)
Signal input
(Lower Arm)
Signal input
(Upper Arm)
Signal input
(Lower Arm)
MITSUBISHI <INTELLIGENT POWER MODULES>
PM50RSD060
FLAT-BASE TYPE
INSULATED PACKAGE
Sep. 2001
NOTES FOR STABLE AND SAFE OPERATION ;
•Design the PCB pattern to minimize wiring length between opto-coupler and IPM’s input terminal, and also to minimize the
stray capacity between the input and output wirings of opto-coupler.
•Quick opto-couplers: TPLH, TPLH ≤ 0.8µs. Use High CMR type. The line between opto-coupler and intelligent module
should be shortened as much as possible to minimize the floating capacitance.
•Slow switching opto-coupler: recommend to use at CTR = 100 ~ 200%, Input current = 8 ~ 10mA, to work in active.
•Use 4 isolated control power supplies (VD). Also, care should be taken to minimize the instantaneous voltage charge of the
power supply.
•Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N
terminal.
•Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line
and improve noise immunity of the system.
OUT
Si
GNDGND
In
Vcc
U
V
W
B
N
P
M
→
IF
+
–
: Interface which is the same as the U-phase
OUT
Si
GNDGND
In
Vcc
OUT
Si
GNDGND
In
Vcc
OUT
Si
GNDGND
In
Fo
Fo
Fo
Fo
Vcc
OUT
Si
GNDGND
In
Fo
TEMP
Vcc
OUT
Si
GND
GND
In
Fo
Vcc
VWP1
WP
VWPC
Th
UN
VN
VN1
WN
VNC
Rfo
Rfo
Rfo
Rfo
Fo
VVP1
VP
VVPC
≥0.1µ
4.7k
1k
≥0.1µ
≥0.1µ
20k
20k
20k
≥10µ
≥10µ
≥10µ
20k ≥10µ
≥0.1µ
VFO
WFO
UFO
VUP1
UP
VUPC
Br
→
→
IF
IF
IF
5V
→
OUT
Si
GND
GND
In
Fo
Vcc
V
D
V
D
V
D
V
D
Fig. 8 Application Example Circuit
