CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD handling procedures.
Copyright © Harris Corporation 1995 3-39
SEMICONDUCTOR
December 1995
Absolute Maximum Ratings TC = +25oCRFG50N06, RFP50N06
RF1S50N06, RF1S50N06SM UNITS
Drain Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS 60 V
Drain Gate Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 60 V
Gate Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±20 V
Drain Current
RMS Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
IDM
50
Refer to Peak Current Curve A
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Refer to UIS Curve
Maximum Avalanche Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IAM 125 A
Power Dissipation
TC = +25oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Derate above +25oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
PT
131
0.877 W
W/oC
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . TSTG,TJ-55 to +175 oC
Packages
JEDEC STYLE TO-247
JEDEC TO-220AB
JEDEC TO-262AA
JEDEC TO-263AB
DRAIN
(BOTTOM
SIDE METAL)
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
SOURCE
DRAIN
GATE
A
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
A
A
M
DRAIN
(FLANGE)
GATE
SOURCE
RFG50N06, RFP50N06,
RF1S50N06, RF1S50N06SM
50A, 60V, Avalanche Rated N-Channel
Enhancement-Mode Power MOSFETs
Features
• 50A, 60V
•r
DS(ON) = 0.022Ω
•
Temperature Compensating
PSPICE Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• +175oC Operating Temperature
Description
The RFG50N06, RFP50N06, RF1S50N06, and
RF1S50N06SM N-Channel power MOSFETs are manufac-
tured using the MegaFET process. This process, which uses
feature sizes approaching those of LSI integrated circuits
gives optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers, and relay drivers. These transistors can be operated
directly from integrated circuits.
Formerly developmental type TA49018.
Symbol
PACKAGE AVAILABILITY
PART NUMBER PACKAGE BRAND
RFG50N06 TO-247 RFG50N06
RFP50N06 TO-220AB RFP50N06
RF1S50N06 TO-262AA F1S50N06
RF1S50N06SM TO-263AB F1S50N06
NOTE: When ordering, use the entire part number. Add the suffix, 9A,
to obtain the TO-263AB variant in tape and reel, i.e.RF1S50N06SM9A.
D
G
S
File Number 3575.2
3-40
Specifications RFG50N06, RFP50N06, RF1S50N06, RF1S50N06SM
Electrical Specifications TC = +25oC, Unless Otherwise Specified.
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain-Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V 60 - - V
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA2-4V
Zero Gate Voltage Drain Current IDSS VDS = 60V,
VGS = 0V TC = +25oC--1µA
T
C
= +150oC- -50µA
Gate-Source Leakage Current IGSS VGS = ±20V - - 100 nA
On Resistance rDS(ON) ID = 50A, VGS = 10V - - 0.022 Ω
Turn-On Time tON VDD = 30V, ID = 50A
RL = 0.6Ω, VGS = +10V
RGS = 3.6Ω
- - 95 ns
Turn-On Delay Time tD(ON) -12- ns
Rise Time tR-55- ns
Turn-Off Delay Time tD(OFF) -37- ns
Fall Time tF-13- ns
Turn-Off Time tOFF - - 75 ns
Total Gate Charge QG(TOT) VGS = 0 to 20V VDD = 48V,
ID = 50A,
RL = 0.96Ω
- 125 150 nC
Gate Charge at 10V QG(10) VGS = 0 to 10V - 67 80 nC
Threshold Gate Charge QG(TH) VGS = 0 to 2V - 3.7 4.5 nC
Input Capacitance CISS VDS = 25V, VGS = 0V
f = 1MHz - 2020 - pF
Output Capacitance COSS - 600 - pF
Reverse Transfer Capacitance CRSS - 200 - pF
Thermal Resistance Junction to Case RθJC - - 1.14 oC/W
Thermal Resistance Junction to Ambient RθJA --80
o
C/W
Source-Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Forward Voltage VSD ISD = 50A - - 1.5 V
Reverse Recovery Time tRR ISD = 50A, dISD/dt = 100A/µs - - 125 ns
3-41
RFG50N06, RFP50N06, RF1S50N06, RF1S50N06SM
Typical Performance Curves
FIGURE 1. SAFE OPERATING AREA CURVE FIGURE 2. NORMALIZED MAXIMUM TRANSIENT THERMAL
IMPEDANCE
FIGURE 3. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE FIGURE 4. PEAK CURRENT CAPABILITY
FIGURE 5. TYPICAL SATURATION CHARACTERISTICS FIGURE 6. TYPICAL TRANSFER CHARACTERISTICS
400
100
10
11 10 100
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
TC = +25oC
OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(ON)
100ms
DC
VDSS MAX = 60V
ID, DRAIN CURRENT (A)
10ms
100µs
1ms
10
1
0.1
0.0110-5 10-4 10-3 10-2 10-1 100101
t, RECTANGULAR PULSE DURATION (s)
PDM
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + TC
SINGLE PULSE
t1
t2
THERMAL RESPONSE
ZθJC, NORMALIZED
0.01
0.02
0.05
0.1
0.2
0.5
50
40
30
20
10
025 50 75 100 125 150 175
ID, DRAIN CURRENT (A)
TC, CASE TEMPERATURE (oC)
60
10-3 10-2 10-1 100101102103104
102
103
t, PULSE WIDTH (ms)
VGS = 20V
VGS = 10V
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
FOR TEMPERATURES ABOVE +25oC
DERATE PEAK CURRENT
CAPABILITY AS FOLLOWS:
II
25
175 TC
–
150
------------------------
=
T
C
= +25oC
IDM, PEAK CURRENT CAPABILITY (A)
40
125
100
75
50
25
00.0 1.5 3.0 4.5 6.0 7.5
ID, DRAIN CURRENT (A)
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
VGS = 10V VGS = 8V
VGS = 7V
VGS = 6V
VGS = 5V
VGS = 4V
PULSE DURATION = 250µs, TC = +25oC
0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0
VGS, GATE-TO-SOURCE VOLTAGE (V)
ID(ON), ON STATE DRAIN CURRENT (A)
125
100
75
50
25
0
PULSE TEST
PULSE DURATION = 250µs
DUTY CYCLE = 0.5% MAX
-55oC
VDD = 15V
+175oC
+25oC
3-42
RFG50N06, RFP50N06, RF1S50N06, RF1S50N06SM
FIGURE 7. NORMALIZED rDS(ON) vs JUNCTION
TEMPERATURE FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs
TEMPERATURE
FIGURE 9. NORMALIZED DRAIN SOURCE BREAKDOWN
VOLTAGE vs TEMPERATURE FIGURE 10. NORMALIZED POWER DISSIPATION vs
TEMPERATURE DERATING CURVE
FIGURE 11. TYPICAL CAPACITANCE vs VOLTAGE FIGURE 12. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT. REFER TO
APPLICATION NOTE AN7254 AND AN7260
Typical Performance Curves
(Continued)
PULSE DURATION = 250µs, VGS = 10V, ID = 50A
2.5
2.0
1.5
1.0
0.5
0.0-80 -40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE (oC)
rDS(ON), NORMALIZED ON RESISTANCE
VGS = VDS, ID = 250µA
2.0
1.5
1.0
0.5
0.0-80 -40 0 40 80 160120 200
THRESHOLD VOLTAGE
TJ, JUNCTION TEMPERATURE (oC)
VGS(TH), NORMALIZED GATE
ID = 250µA
2.0
1.5
1.0
0.5
0.0-80 -40 0 40 80 120 160 200
BVDSS, NORMALIZED DRAIN-TO-SOURCE
BREAKDOWN VOLTAGE
TJ, JUNCTION TEMPERATURE (oC)
1.2
1.0
0.8
0.6
0.4
0.2
0.0 0 25 50 75 100 125 150 175
POWER DISSIPATION MULTIPLIER
TC, CASE TEMPERATURE (oC)
VGS = 0V, f = 1MHz
CISS
COSS
CRSS
4000
3000
2000
1000
00 5 10 15 20 25
C, CAPACITANCE (pF)
VDS, DRAIN-TO-SOURCE VOLTAGE(V)
60
45
30
15
0
10
7.5
5.0
2.5
0
20 IG(REF)
IG(ACT) 80 IG(REF)
IG(ACT)
t, TIME (µs)
VDD = BVDSS VDD = BVDSS
0.75 BVDSS
0.50 BVDSS
0.25 BVDSS
0.75 BVDSS
0.50 BVDSS
0.25 BVDSS
VDS, DRAIN-SOURCE VOLTAGE (V)
VGS, GATE-SOURCE VOLTAGE (V)
RL = 1.2Ω
IG(REF) = 1.45mA
VGS = 10V
3-43
RFG50N06, RFP50N06, RF1S50N06, RF1S50N06SM
FIGURE 13. UNCLAMPED INDUCTIVE SWITCHING
Test Circuits and Waveforms
FIGURE 14. UNCLAMPED ENERGY WAVEFORMS FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. RESISTIVE SWITCHING WAVEFORMS FIGURE 17. RESISTIVE SWITCHING TEST CIRCUIT
Typical Performance Curves
(Continued)
STARTING TJ = +150oC
STARTING TJ = +25oC
300
100
10
10.01 0.1 1 10
tAV, TIME IN AVALANCHE (msec)
If R = 0
tAV = (L) (IAS) / (1.3 RATED BVDSS - VDD)
If R ≠ 0
tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1]
IAS, AVALANCHE CURRENT (A)
VDD
VDS
BVDSS
tP
IAS
tAV tP
VGS
0.01Ω
L
IL
+
-
VDS
VDD
RGDUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
tD(ON)
tR
90%
10%
VDS 90%
10%
tF
tD(OFF)
tOFF
90%
50%50%
10% PULSE WIDTH
VGS
tON VDD
RL
VDS
DUT
RGS
0V
VGS
3-44
Temperature Compensated PSPICE Model for the
RFG50N06, RFP50N06, RF1S50N06, RF1S50N06SM
.SUBCKT RFP50N06213
REV 2/22/93
* NOM TEMP = +25oC
CA 12 8 3.68e-9
CB 15 14 3.625e-9
CIN 6 8 1.98e-9
DBODY 7 5 DBDMOD
DBREAK 5 11 DBKMOD
DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 64.59
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTO 20 6 18 8 1
IT 8 17 1
LDRAIN 2 5 1e-9
LGATE 1 9 5.65e-9
LSOURCE 3 7 4.13e-9
MOS1 16 6 8 8 MOSMOD M=0.99
MOS2 16 21 8 8 MOSMOD M=0.01
RBREAK 17 18 RBKMOD 1
RDRAIN 5 16 RDSMOD 1e-4
RGATE 9 20 0.690
RIN 6 8 1e9
RSOURCE 8 7 RDSMOD 12e-3
RVTO 18 19 RVTOMOD 1
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 8 19 DC 1
VTO 21 6 0.678
.MODEL DBDMOD D (IS=9.851e-13 RS=4.91e-3 TRS1=2.07e-3 TRS2=2.51e-7 CJO=2.05e-9 TT=4.33e-8)
.MODEL DBKMOD D (RS=1.98e-1 TRS1=-2.35e-3 TRS2=-3.83e-6)
.MODEL DPLCAPMOD D (CJO=1.42e-9 IS=1e-30 N=10)
.MODEL MOSMOD NMOS (VTO=3.65 KP=35 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL RBKMOD RES (TC1=1.23e-3 TC2=-2.34e-6)
.MODEL RDSMOD RES (TC1=5.01e-3 TC2=1.49e-5)
.MODEL RVTOMOD RES (TC1=-5.03e-3 TC2=-5.16e-6)
.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-6.75 VOFF=-2.5)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-2.5 VOFF=-6.75)
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-2.7 VOFF=2.3)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=2.3 VOFF=-2.7)
.ENDS
NOTE: For further discussion of the PSPICE model consult A New PSPICE Sub-circuit for the Power MOSFET Featuring Global
Temperature Options; authors, William J. Hepp and C. Frank Wheatley.
10 DPLCAP RDRAIN DBREAK
LDRAIN
DRAIN
SOURCE
LSOURCE
DBODY
RBREAK
RVTO
VBAT
+
-
19IT
RSOURCE
EBREAK
MOS2
EDSEGS
RIN CIN
VTO
ESG
S1A S2A
S2BS1B
CBCA
EVTO
RGATE
GATE
LGATE
52
1817
7
11
21
8
6
16
209
1
12 15
14
13
13
814
13
+
-
+
-
+
-
+
-+
-
+
-
MOS1
3
6
85
8
18
8
6
8
17
18
RFG50N06, RFP50N06, RF1S50N06, RF1S50N06SM
