1
FEATURES
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
1Y
2A
2B
2Y
GND
VCC
4B
4A
4Y
3B
3A
3Y
J OR W PACKAGE
(TOP VIEW)
DESCRIPTION/ORDERING INFORMATION
SN54AC00-SP
www.ti.com
............................................................................................................................................................................................. SCHS367 – OCTOBER 2008
RAD-TOLERANT CLASS V, QUADRUPLE 2-INPUT POSITIVE-NAND GATE
•2-V to 6-V V
CC
Operation•Inputs Accept Voltages to 6 V•Max t
pd
of 7 ns at 5 V•Rad-Tolerant: 50 KRad(Si) TID
(1)
– TID Dose Rate < 2 mRad/sec•QML-V Qualified, SMD 5962-87549(1) Radiation tolerance is a typical value based upon initial device qualification. Radiation Lot Acceptance Testing is available - contactfactory for details.
The SN54AC00 device contains four independent 2-input NAND gates. Each gate performs the Boolean functionof Y = A • B or Y = A + B in positive logic.
ORDERING INFORMATION
T
A
PACKAGE
(1) (2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
CDIP – J Tube 5962-8754903VCA 5962-8754903VCA– 55 ° C to 125 ° C
CFP – W Tube 5962-8754903VDA 5962-8754903VDA
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIwebsite at www.ti.com .
FUNCTION TABLE(Each Gate)
INPUTS
OUTPUT
YA B
H H LL X HX L H
LOGIC DIAGRAM (POSITIVE LOGIC)
1
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PRODUCTION DATA information is current as of publication date.
Copyright © 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the Texas
On products compliant to MIL-PRF-38535, all parameters areInstruments standard warranty. Production processing does not
tested unless otherwise noted. On all other products, productionnecessarily include testing of all parameters.
processing does not necessarily include testing of all parameters.