ICS501 LOCOTM PLL Clock Multiplier Description Features The ICS501 LOCOTM is the most cost effective way to generate a high quality, high frequency clock output from a lower frequency crystal or clock input. The name LOCO stands for LOw Cost Oscillator, as it is designed to replace crystal oscillators in most electronic systems. Using PhaseLocked-Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 160 MHz. * Packaged as 8 pin SOIC or die * ICS' lowest cost PLL clock * Zero ppm multiplication error * Input crystal frequency of 5 - 27 MHz * Input clock frequency of 2 - 50 MHz * Output clock frequencies up to 160 MHz * Extremely low jitter - 25 ps one sigma * Compatible with all popular CPUs * Duty cycle of 45/55 up to 160 MHz * Mask option for 9 selectable frequencies * Operating voltages of 3.0 to 5.5V * Tri-state output for board level testing * 25mA drive capability at TTL levels * Ideal for oscillator replacement * Industrial temperature version available * Advanced, low power CMOS process Stored in the chip's ROM is the ability to generate 9 different multiplication factors, allowing one chip to output many common frequencies (see page 2). The device also has an Output Enable pin that tristates the clock output when the OE pin is taken low. Block Diagram VDD GND S0 S1 Crystal or clock input X1/ICLK Crystal Oscillator PLL Clock Multiplier Circuitry and ROM Output Buffer CLK X2 Output Enable Optional crystal capacitors MDS 501 G 1 Revision 030201 Integrated Circuit Systems, Inc. * 525 Race Street * San Jose *CA*95126*(408) 295-9800 tel * www.icst.com ICS501 LOCOTM PLL Clock Multiplier Pin Assignment Clock Output Table X1/ICLK 1 8 X2 VDD 2 7 OE GND 3 6 S0 S1 4 5 CLK S1 0 0 0 M M M 1 1 1 S0 0 M 1 0 M 1 0 M 1 CLK 4X input 5.3125X input 5X input 6.25X input 2X input 3.125X input 6X input 3X input 8X input Minimum Input per page 3 20MHz per page 3 4MHz per page 3 8MHz per page 3 per page 3 per page 3 0 = connect directly to ground. 1 = connect directly to VDD. M = leave unconnected (floating). Common Output Frequencies Examples (MHz) Output 20 24 30 32 33.33 37.5 40 48 50 60 62.5 Input 10 12 10 16 16.66 12 10 12 16.66 10 20 M, M M, M 1, M M, M M, M M, 1 0, 0 0, 0 1, M 1, 0 M, 1 64 66.66 72 75 80 83.33 90 100 106.25 120 125 Input 16 16.66 12 12 10 16.66 15 20 20 15 20 Selection (S1, S0) 0, 0 0, 0 1, 0 M, 0 1, 1 0, 1 1, 0 0, 1 0, M 1, 1 M, 0 Selection (S1, S0) Output Note that all of the above outputs are achieved by using a common, inexpensive 10MHz to 20MHz crystal. Consult MicroClock/ICS on how to achieve other output frequencies. Pin Descriptions Number 1 2 3 4 5 6 7 8 Name X1/ICLK VDD GND S1 CLK S0 OE X2 Type I P P TI O TI I O Description Crystal connection or clock input. Connect to +3.3V or +5V. Connect to ground. Select 1 for output clock. Connect to GND or VDD or float. Clock output per Table above. Select 0 for output clock. Connect to GND or VDD or float. Output Enable. Tri-states CLK output when low. Internal pull-up. Crystal connection. Leave unconnected for clock input. Key: I = Input, TI = Tri-Level Input, O = output, P = power supply connection MDS 501 G 2 Revision 030201 Integrated Circuit Systems, Inc. * 525 Race Street * San Jose *CA*95126*(408) 295-9800 tel * www.icst.com ICS501 LOCOTM PLL Clock Multiplier Electrical Specifications Parameter Conditions Minimum Typical ABSOLUTE MAXIMUM RATINGS (stresses beyond these can permanently damage the device) Supply Voltage, VDD Referenced to GND Inputs Referenced to GND -0.5 Clock Output Referenced to GND -0.5 Ambient Operating Temperature 0 ICS501MI only -40 Soldering Temperature Max of 10 seconds Storage temperature -65 DC CHARACTERISTICS (VDD = 5.0V unless otherwise noted) Operating Voltage, VDD 3 Input High Voltage, VIH, ICLK only ICLK (Pin 1) (VDD/2)+1 Input Low Voltage, VIL, ICLK only ICLK (Pin 1) Input High Voltage, VIH OE (Pin 7) 2 Input Low Voltage, VIL OE (Pin 7) Input High Voltage, VIH S0, S1 VDD-0.5 Input Low Voltage, VIL S0, S1 Output High Voltage, VOH IOH=-25mA 2.4 Output Low Voltage, VOL IOL=25mA IDD Operating Supply Current, 20 MHz crystal No Load, 100MHz 20 Short Circuit Current CLK output 70 On-Chip Pull-up Resistor Pin 7 270 Input Capacitance, S1, S0 , and OE Pins 4, 6, 7 4 AC CHARACTERISTICS (VDD = 5.0V unless otherwise noted) Input Frequency, crystal input 5 Input Frequency, clock input 2 Output Frequency, VDD = 4.5 to 5.5V 0 C to +70 C 14 -40 C to +85 C 14 Output Frequency, VDD = 3.0 to 3.6V 0 C to +70 C 14 -40 C to +85 C 14 Output Clock Rise Time 0.8 to 2.0V 1 Output Clock Fall Time 2.0 to 0.8V 1 Output Clock Duty Cycle 1.5V, up to 160 MHz 45 49 to 51 PLL Bandwidth 10 Output Enable Time, OE high to output on Output Disable Time, OE low to tri-state Absolute Clock Period Jitter Deviation from mean 70 One Sigma Clock Period Jitter 25 MDS 501 G 3 Maximum Units 7 VDD+0.5 VDD+0.5 70 85 260 150 V V V C C C C 5.5 V V V V V V V V V mA mA k pF (VDD/2)-1 0.8 0.5 0.4 27 50 160 140 100 90 55 50 50 MHz MHz MHz MHz MHz MHz ns ns % kHz ns ns ps ps Revision 030201 Integrated Circuit Systems, Inc. * 525 Race Street * San Jose *CA*95126*(408) 295-9800 tel * www.icst.com ICS501 LOCOTM PLL Clock Multiplier External Components / Crystal Selection The ICS501 requires a 0.01F decoupling capacitor to be connected between VDD and GND. It must be connected close to the ICS501 to minimize lead inductance. No external power supply filtering is required for this device. A 33 terminating resistor can be used next to the CLK pin. The total on-chip capacitance is approximately 12 pF, so a parallel resonant, fundamental mode crystal should be used. For crystals with a specified load capacitance greater than 12 pF, crystal capacitors should be connected from each of the pins X1 and X2 to Ground as shown in the Block Diagram on page 1. The value (in pF) of these crystal caps should be = (CL -12)*2, where CL is the crystal load capacitance in pF. These external capacitors are only required for applications where the exact frequency is critical. For a clock input, connect to X1 and leave X2 unconnected (no capacitors on either). Package Outline and Package Dimensions 8 pin SOIC E H Pin 1 h x 45 D Q A c e b Symbol A b D E H e h Q Inches Min Max 0.055 0.068 0.013 0.019 0.185 0.200 0.150 0.160 0.225 0.245 .050 BSC 0.015 0.004 0.01 Millimeters Min Max 1.397 1.7272 0.330 0.483 4.699 5.080 3.810 4.064 5.715 6.223 1.27 BSC 0.381 0.102 0.254 Ordering Information Part/Order Number ICS501M ICS501MT ICS501MI ICS501MIT ICS501-DWF ICS501-DPK Marking ICS501M ICS501M ICS501I ICS501I - Package 8 pin SOIC 8 pin SOIC on tape and reel 8 pin SOIC 8 pin SOIC on tape and reel Die on uncut, probed wafers Tested die in waffle pack Temperature 0 to 70 C 0 to 70 C -40 to +85 C -40 to +85 C 0 to 70 C 0 to 70 C While the information presented herein has been checked for both accuracy and reliability, ICS/MicroClock assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS/MicroClock. ICS/MicroClock reserves the right to change any circuitry or specifications without notice. ICS/MicroClock does not authorize or warrant any ICS/MicroClock product for use in life support devices or critical medical instruments. LOCO is a trademark of ICS MDS 501 G 4 Revision 030201 Integrated Circuit Systems, Inc. * 525 Race Street * San Jose *CA*95126*(408) 295-9800 tel * www.icst.com