LTC3607 Dual 600mA 15V Monolithic Synchronous Step-Down DC/DC Regulator Description Features n n n n n n n n n n n n n n n n High Efficiency: Up to 96% Very Low Quiescent Current: 55A Total 2.25MHz Constant Frequency Operation Low Dropout Operation: 100% Duty Cycle Low-Ripple (Typical 30mVP-P) Burst Mode(R) Operation Peak Current-Mode Control Architecture for Excellent Line and Load Transient Response Wide Voltage Input Range: 4.5V to 15V 600mA/Channel Rated Output Current 0.6V Reference Allows Low Output Voltages 1.5% Output Voltage Accuracy Ultralow Shutdown Current: IQ < 1A Internal Compensation Power Good Outputs Externally Frequency Synchronization (1MHz to 4MHz) Independent Internal Soft-Start for Each Channel Small 16-Lead Thermally Enhanced Thin QFN (3mm x 3mm) and MSE Packages n n A user selectable mode input is provided to allow the user to trade off ripple noise for light load efficiency; Burst Mode operation provides the highest efficiency at light loads, while pulse-skipping mode provides the lowest ripple noise. To further the maximize battery run time, the P-channel MOSFETs are turned on continuously in dropout (100% duty cycle). In shutdown, the device draws <1A. L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks and Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5481178, 5847554, 6580258, 6304066, 6476589, 6774611. Applications n The LTC(R)3607 is a 15V dual 600mA monolithic synchronous step-down regulator which has only 55A quiescent current. Intended for a variety of applications, including dual lithium-ion battery products, it operates from a wide 4.5V to 15V input voltage range. It features a constant 2.25MHz switching frequency, enabling the use of tiny, low cost capacitors and inductors 1mm or less in height. Each output voltage is adjustable from 0.6V to VIN. The internal synchronous power switches provide high efficiency without the need for external Schottky diodes. Dual Lithium-Ion Battery Supplies Automotive Applications Servers Typical Application 100 10F x2 PVIN1 SVIN PVIN2 RUN2 RUN1 SW1 LTC3607 SW2 22pF 4.7H 22pF 887k 10F 80 VFB2 VFB1 121k GND VOUT2 3.3V AT 600mA 549k 70 0.1 60 50 40 0.01 30 POWER LOSS (W) 4.7H VOUT1 5V AT 600mA 1 VIN = 12V 90 EFFICIENCY (%) VIN 12V Efficiency and Power Loss vs Load Current 20 121k 10F VOUT = 5V VOUT = 3.3V 10 3607 TA01a 0 1 10 100 LOAD CURRENT (mA) 0.001 1000 3607 TA01b 3607fb For more information www.linear.com/LTC3607 1 LTC3607 Absolute Maximum Ratings (Note 1) PVIN, SVIN Voltages..................................... -0.3V to 15V RUN1, RUN2 Voltages.................. -0.3V to (SVIN + 0.3V) VFB1, VFB2 Voltages.................................... -0.3V to 3.6V MODE/SYNC Voltage.................................. -0.3V to 3.6V PGOOD1, PGOOD2 Voltages....................... -0.3V to 15V Operating Junction Temperature Range (Notes 2, 7)............................................. -40C to 125C Storage Temperature Range.................... -65C to 150C Lead Temperature (Soldering, 10 sec) MSOP Package.................................................. 300C Pin Configuration RUN2 VFB2 VFB1 RUN1 TOP VIEW TOP VIEW 16 15 14 13 SVIN PGND1 SW1 PVIN1 PVIN2 SW2 PGND2 SGND 12 SGND MODE/SYNC 1 PGOOD1 2 11 PGOOD2 17 PGND SVIN 3 10 SGND PGND1 4 6 7 8 SW1 PVIN1 PVIN2 SW2 9 5 PGND2 1 2 3 4 5 6 7 8 17 PGND 16 15 14 13 12 11 10 9 PGOOD1 MODE/SYNC RUN1 VFB1 VFB2 RUN2 SGND PGOOD2 MSE PACKAGE 16-LEAD PLASTIC MSOP TJMAX = 125C, JA = 37C/W, JC = 10C/W EXPOSED PAD (PIN 17) IS PGND, MUST BE SOLDERED TO PCB UD PACKAGE 16-LEAD (3mm x 3mm) PLASTIC QFN TJMAX = 125C, JA = 68C/W, JC = 7.5C/W EXPOSED PAD (PIN 17) IS PGND, MUST BE SOLDERED TO PCB Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3607EUD#PBF LTC3607EUD#TRPBF LFNB 16-Lead (3mm x 3mm) Plastic QFN -40C to 125C (Note 2) LTC3607IUD#PBF LTC3607IUD#TRPBF LFNB 16-Lead (3mm x 3mm) Plastic QFN -40C to 125C (Note 2) LTC3607EMSE#PBF LTC3607EMSE#TRPBF 3607 16-Lead Plastic MSOP -40C to 125C (Note 2) LTC3607IMSE#PBF LTC3607IMSE#TRPBF 3607 16-Lead Plastic MSOP -40C to 125C (Note 2) Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 3607fb 2 For more information www.linear.com/LTC3607 LTC3607 Electrical Characteristics The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25C. VIN = 12V, unless otherwise specified. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS SVIN Operating Voltage Range l 4.5 15 V PVIN Operating Voltage Range l 4.5 15 V VOUT Output Voltage Range VFB Feedback Voltage (Note 3) l 0.591 0.588 0.6 PVIN V 0.6 0.6 0.609 0.612 V V 0.15 IFB Feedback Pin Input Current VLINE REG Reference Voltage Line Regulation VIN = 4.5V to 15V (Note 3) 0.1 VLOAD REG Output Voltage Load Regulation MODE/SYNC = 0V (Note 3) 0.5 IS Input DC Supply Current Active Mode Sleep Mode (Both Channels) Sleep Mode (Single Channel) Shutdown (Note 4) VFB1 = VFB2 = 0.5V VFB1 = VFB2 = 0.64V VFB(1 or 2) = 0.64V RUN1 = RUN2 = 0V 3.2 55 35 0.1 90 60 1 mA A A A fOSC Oscillator Frequency VFB1, 2 = 0.6V 2.25 2.7 MHz 4.0 MHz 1 1.25 A 30 l fSYNC Synchronization Frequency ILIM Peak Switch Current Limit VFB1, 2 = 0.5V, Duty Cycle < 35% RDS(ON) Top Switch On-Resistance Bottom Switch On-Resistance (Note 6) (Note 6) 1.8 1.0 0.75 nA %/V % 0.6 0.25 UVLO SVIN Undervoltage Lockout Threshold SVIN Rising 3.4 4.3 V PGOOD PGOOD1/2 Overvoltage Threshold VFB1, 2 Rising VFB1, 2 Hysteresis 8.5 -3 11 % % PGOOD1/2 Undervoltage Threshold VFB1, 2 Ramping Down VFB1, 2 Hysteresis PGOOD1/2 On-Resistance Channel 1 or Channel 2 Active RUN1 = RUN2 = 0V -11 tPGOOD Power Good Blanking Time IPGOOD PGOOD Leakage VRUN RUN1/2 VIL RUN1/2 VIH l l IRUN RUN1/2 Leakage Current l VMODE/SYNC MODE/SYNC VIL MODE/SYNC VIH l l tSOFTSTART Internal Soft-Start Time -8.5 3 % % 70 700 64 VFB from 10% to 90% Full Scale PVIN1 = PVIN2 = SVIN = 4.5V Note 1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2. The LTC3607 is tested under pulsed load conditions such that TJ TA. The LTC3607E is guaranteed to meet specifications from 0C to 85C junction temperature. Specifications over the -40C to 125C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3607I is guaranteed over the full -40C to 125C operating junction temperature range. The junction temperature (TJ) is calculated from the ambient temperature (TA) and power dissipation (PD) according to the formula: TJ = TA + (PD * JAC/W) where JA is the package thermal impedance. Note that the maximum ambient temperature is consistent with these specifications determined by 0.55 0.01 0.3 Cycles 1 A 3.0 V V 1 A 1.0 V V 0.35 ms specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. Note 3. The LTC3607 is tested in a proprietary test mode that connects VFB to the output of the error amplifier to an external servo loop. Note 4. Dynamic supply current is higher due to the internal gate charge being delivered at the switching frequency. Note 5. TJ is calculated from the ambient TA and power dissipation PD according to the following formula: TJ = TA + (PD * JA). Note 6. The QFN switch on-resistance is guaranteed by correlation to wafer level measurements. Note 7. This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125C when overtemperature protection is active Continuous operation above the specified maximum operating junction temperature may impair device reliability. For more information www.linear.com/LTC3607 3607fb 3 LTC3607 Typical Performance Characteristics Efficiency vs Load Current Burst Mode Operation 100 100 90 VOUT = 3.3V 90 80 70 70 60 50 40 30 0 0.1 1 10 100 LOAD CURRENT (mA) 60 50 40 30 20 VIN = 5V VIN = 8.4V VIN = 12V 10 EFFICIENCY (%) 80 70 20 VIN = 5V VIN = 8.4V VIN = 12V 10 1000 0 0.1 1 10 100 LOAD CURRENT (mA) 3607 G01 100 1000 VIN = 8.4V VOUT = 5V 60 50 40 30 20 Burst Mode OPERATION PULSE SKIP 10 0 0.1 1 10 100 LOAD CURRENT (mA) 1000 3607 G03 3607 G02 Efficiency vs Input Voltage Burst Mode Operation Burst Mode Operation Pulse-Skipping Mode VOUT = 3.3V 95 90 EFFICIENCY (%) Efficiency vs Load Current 100 80 EFFICIENCY (%) EFFICIENCY (%) Efficiency vs Load Current Burst Mode Operation VOUT = 2.5V 90 TA = 25C, unless otherwise noted. 85 80 SW 5V/DIV SW 5V/DIV VOUT 50mV/DIV VOUT 50mV/DIV IL 200mA/DIV IL 200mA/DIV 75 70 65 ILOAD = 1mA ILOAD = 10mA ILOAD = 100mA ILOAD = 600mA 60 55 50 4 6 8 10 12 INPUT VOLTAGE (V) 2s/DIV 14 16 3607 G05 2s/DIV 3607 G06 VIN = 8.4V VOUT = 2.5V ILOAD = 100mA VIN = 8.4V VOUT = 2.5V ILOAD = 20mA Start-Up (Burst Mode Operation) VOUT Short to GND (Burst Mode Operation) 3607 G04 Load Step in Burst Mode Operation PGOOD 2V/DIV RUN 2V/DIV VOUT 100mV/DIV VOUT 1V/DIV PGOOD 2V/DIV VOUT 2V/DIV IL 200mA/DIV IL 0.5A/DIV 20s/DIV VIN = 8.4V VOUT = 2.5V ILOAD = 30mA TO 600mA IL 1A/DIV 3607 G07 200s/DIV 3607 G08 VIN = 8.4V VOUT = 2.5V ILOAD = 20mA 100s/DIV 3607 G09 VIN = 8.4V VOUT = 2.5V ILOAD = 0A 3607fb 4 For more information www.linear.com/LTC3607 LTC3607 Typical Performance Characteristics Oscillator Frequency vs Temperature Reference Voltage vs Temperature 0.605 2 RDS(ON) vs Input Voltage 1.0 VIN = 12V 0.9 -2 -6 RDS(ON) () 0.7 -4 0.601 0.599 0.5 0.4 BOTTOM SWITCH 0.2 0.597 -10 0.1 -12 -50 -25 0 25 50 75 TEMPERATURE (C) 100 0.595 -50 125 -25 0 25 50 75 TEMPERATURE (C) 100 Switch Leakage vs Temperature 7000 VIN = 12V 6000 LEAKAGE CURRENT (nA) TOP SWITCH 0.7 0.6 0.5 0.4 BOTTOM SWITCH 0.3 0.2 -25 0 50 75 TEMPERATURE (C) 100 5000 4000 3000 2000 10 VIN (V) 125 12 14 16 3607 G12 0.2 0.1 0 -0.1 -0.2 -0.3 0 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C) -0.4 4 6 8 10 VIN (V) 3607 G14 Peak Current Limit vs Temperature 12 14 16 3607 G15 Load Regulation 3.5 VIN = 12V 1150 1100 VOUT/VOUT (%) PEAK CURRENT LIMIT (mA) 8 0.3 VIN = 12V 3607 G13 1200 6 Line Regulation TOP SWITCH BOTTOM SWITCH 1000 0.1 0 -50 4 0.4 VOUT/VOUT ERROR (%) RDS(ON) vs Temperature 0.8 0 125 3607 G11 3607 G10 0.9 0.6 0.3 -8 1.0 TOP SWITCH 0.8 0.603 VFB (V) FREQUENCY VARIATION (%) 0 RDS(ON) () TA = 25C, unless otherwise noted. 1050 1000 3.0 PULSE SKIP Burst Mode OPERATION 2.5 VOUT = 3.3V 2.0 1.5 1.0 0.5 950 900 -50 0 -25 0 25 50 75 TEMPERATURE (C) 100 125 -0.5 0 100 3607 G16 200 300 400 LOAD CURRENT (mA) 500 600 3607 G17 3607fb For more information www.linear.com/LTC3607 5 LTC3607 Pin Functions (QFN/MSE) PVIN1, PVIN2, SVIN (Pins 6, 7, 3/Pins 4, 5, 1): Main Power Supply. Must be closely decoupled to GND. These inputs may each be powered from different supply voltages. Connect SVIN to either PVIN1 or PVIN2, whichever one is higher. For applications where it's not known which PVIN(1 or 2) is higher, connect external diodes between SVIN to both PVIN1 and PVIN2 to ensure that SVIN is less than a diode drop from the higher of PVIN1 or PVIN2. PGND1, PGND2, SGND, PGND (Pins 4, 9, 10, 12, Exposed Pad Pin 17/Pins 2, 7, 8, 10, Exposed Pad Pin 17): Main Ground. Connect to the (-) terminals of COUT1, COUT2, and CIN. The exposed pad must be soldered to PCB ground for electrical contact and rated thermal performance. All SGND and PGND pins must be externally connected to ground. VFB1 (Pin 15/Pin 13): Regulator 1 Output Feedback. Receives the feedback voltage from the external resistor divider across the regulator 1 output. Nominal voltage for this pin is 0.6V. SW1 (Pin 5/Pin 3): Regulator 1 Switch Node Connection to the Inductor. This pin switches from PVIN1 to PGND1. RUN1 (Pin 16/Pin 14): Regulator 1 Enable. Forcing this pin high (above 3V) enables regulator 1, while forcing it to SGND causes regulator 1 to shut down. It is possible to use a 3.3V source to drive this pin, or tie it to SVIN. An internal soft-start limits the rise time to a minimum of 0.35ms. PGOOD1 (Pin 2/Pin 16): Regulator 1 Power Good. This common-drain logic output is pulled to SGND when the channel 1 output voltage is not within 8.5% of regulation. VFB2 (Pin 14/Pin 12): Regulator 2 Output Feedback. Receives the feedback voltage from the external resistor divider across the regulator 2 output. Nominal voltage for this pin is 0.6V. SW2 (Pin 8/Pin 6): Regulator 2 Switch Node Connection to the Inductor. This pin switches from PVIN2 to PGND2. RUN2 (Pin 13/Pin 11): Regulator 2 Enable. Forcing this pin high (above 3.0V) enables regulator 2, while forcing it to SGND causes regulator 2 to shut down. It is possible to use a 3.3V source to drive this pin, or tie it to SVIN. An internal soft-start limits the rise time to a minimum of 0.35ms. PGOOD2 (Pin 11/Pin 9): Regulator 2 Power Good. This common-drain logic output is pulled to SGND when the channel 2 output voltage is not within 8.5% of regulation. MODE/SYNC (Pin 1/Pin 15): Combination Mode Selection and Oscillator Synchronization. This pin controls the light-load behavior of the device. Forcing this pin to SGND selects pulse-skipping mode. Floating this pin or forcing it above 1V selects Burst Mode operation. The internal oscillation frequency can be synchronized to an external oscillator applied to this pin and pulse-skipping mode is automatically selected. 3607fb 6 For more information www.linear.com/LTC3607 LTC3607 Block Diagram REGULATOR 1 PVIN1 RUN1 + VFB1 LEVEL SHIFT OVCOMP 0.65V - 0.6V + ITH EA ICMP HV CONTROL LOGIC SW1 - 0.55V + - RCMP HV LEVEL SHIFT UVCOMP PGND1 PGOOD1 PGOOD1 SVIN MODE 3.3V 0.65V BANDGAP REFERENCE 0.6V 3M LDO 3.3V CLK MODE/SYNC OSC 0.55V SGND PVIN2 REGULATOR 2 (IDENTICAL TO REGULATOR 1) SW2 RUN2 PGND2 VFB2 PGOOD2 3607 BD 3607fb For more information www.linear.com/LTC3607 7 LTC3607 Operation The LTC3607 uses a constant-frequency, peak current mode architecture. The operating frequency is set at 2.25MHz and can be synchronized to an external oscillator between 1MHz and 4MHz. Both channels share the same clock and run in-phase. To suit a variety of applications, the selectable MODE/SYNC pin allows the user to tradeoff ripple for efficiency. The output voltage is set by an external divider returned to the VFB pins. An error amplifier compares the divided output voltage with a reference voltage of 0.6V and adjusts the peak inductor current accordingly. Overvoltage and undervoltage comparators will pull the independent PGOOD outputs low if the output voltage is not within 8.5%. The PGOOD outputs will go high 64 clock cycles after achieving regulation and will go low 64 cycles after falling out of regulation. Whether in Burst Mode or pulse-skipping operation, the overvoltage protection circuit is still enabled when the rest of the regulator is asleep. Hence, if VOUT rises above the overvoltage threshold, the regulator is forced out of sleep. Main Control Loop During normal operation, the top power switch (P-channel MOSFET) is turned on at the beginning of a clock cycle when the VFB voltage is below the reference voltage. The current into the inductor and the load increases until the current limit is reached. The switch turns off and energy stored in the inductor flows through the bottom switch (N-channel MOSFET) into the load until the next clock cycle. The peak inductor current is controlled by the internally compensated ITH voltage, which is the output of the error amplifier. This amplifier compares the VFB pin to the 0.6V internal reference. When the load current increases, the VFB voltage decreases slightly below the reference. This decrease causes the error amplifier to increase the ITH voltage until the average inductor current matches the new load current. Low Current Operation Two discontinuous-conduction modes (DCMs) are available to control the operation of the LTC3607 at low output currents. Both modes, Burst Mode operation and pulseskipping, automatically switch from continuous operation to the selected mode when the load current is low. To optimize efficiency, Burst Mode operation can be selected by floating the MODE/SYNC pin or setting it to 1V or greater. When the load is relatively light, the LTC3607 automatically switches into Burst Mode operation in which the PMOS switch operates intermittently based on load demand with a fixed peak inductor current. By running cycles periodically, the switching losses, which are dominated by the gate charge losses of the power MOSFETs, are minimized. The main control loop is interrupted when the output voltage reaches the desired regulated value. A voltage comparator trips when the ITH voltage drops below an internal clamp voltage, shutting off the switch and reducing the power. The output capacitor and the inductor supply the power to the load until ITH exceeds an internal clamp voltage, turning on the switch and the main control loop, which starts another cycle. To optimize ripple, pulse-skipping mode can be selected by grounding the MODE/SYNC pin. In the LTC3607, pulseskipping mode is implemented similarly to Burst Mode operation with the ITH clamp set to a lower internal clamp voltage. This results in lower ripple than in Burst Mode operation with the trade-off being slightly lower efficiency. Dropout Operation When the input supply voltage decreases toward the output voltage, the duty cycle increases to 100% which is the dropout condition. In dropout, the PMOS switch is turned on continuously with the output voltage being equal to the input voltage minus the voltage drops across the internal P-channel MOSFET and the inductor. The main control loop is shut down by pulling the RUN pin to ground. 3607fb 8 For more information www.linear.com/LTC3607 LTC3607 Applications Information An important design consideration is that the RDS(ON) of the P-channel switch increases with decreasing input supply voltage (see Typical Performance Characteristics). Therefore, the user should calculate the power dissipation when the LTC3607 is used at 100% duty cycle with low input voltage (see Thermal Considerations in the Applications Information section). Low/High Supply Operation The LTC3607 incorporates an undervoltage lockout circuit which shuts down the part when the input voltage drops below about 3.7V to prevent unstable operation. A general LTC3607 application circuit is shown in Figure 1. External component selection is driven by the load requirement, and begins with the selection of the inductor L. Once the inductor is chosen, CIN and COUT can be selected. Inductor Selection The operating frequency directly effects both the inductor value, and the ripple current. The inductor ripple current IL decreases with higher frequency and/or inductance and increases with higher VIN: IL = VOUT VOUT * 1- fO * L VIN L= VOUT V * 1- OUT fO * I L VIN(MAX) The inductor value will also have an effect on Burst Mode operation. The transition from low current operation begins when the peak inductor current falls below a level set by the burst clamp. Lower inductor values result in higher ripple current which causes this transition to occur at lower load currents. This causes a dip in efficiency in the upper range of low current operation. In Burst Mode operation, lower inductance values will cause the burst frequency to increase. Inductor Core Selection Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don't radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. The choice of which style inductor to use often depends more on the price vs size requirements and any radiated field/EMI requirements than on what the LTC3607 requires to operate. Table 1 shows the websites of several surface mount inductor manufacturers. Table 1. Inductor Manufacturer Accepting larger values of IL allows the use of low inductances, but results in higher output voltage ripple, greater core losses, and lower output current capability. A reasonable starting point for setting ripple current is IL = 0.4 * IO(MAX), where IO(MAX) is the maximum rated output current. The largest ripple current IL occurs at the maximum input voltage. To guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation: Coilcraft http://www.coilcraft.com/powersel_lowl.html Cooper Bussmann http://www.cooperindustries.com/content/public/ en/bussmann/electronics/products/coiltronics_ inductorandtransformermagnetics.html Wurth Electronic http://katalog.we-online.com/en/pbs/browse/ Power-Magnetics/Speicherdrosseln Murata http://www.murata.com/products/inductor/index. html TDK http://www.tdk.co.jp/tefe02/coil.htm Vishay http://www.vishay.com/inductors/powerinductors/ Sumida http://www.sumida.com/en/products/ power_main.php 3607fb For more information www.linear.com/LTC3607 9 LTC3607 Applications Information Input Capacitor (CIN) Selection In continuous mode, the input current of the converter is a square wave with a duty cycle of approximately VOUT/VIN. To prevent large voltage transients, a low equivalent series resistance (ESR) input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: IRMS IOUT(MAX) VOUT(VIN - VOUT ) VIN where the maximum average output current IMAX equals the peak current minus half the peak-to-peak ripple current, IMAX = ILIM - IL /2. This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case is commonly used to design because even significant deviations do not offer much relief. Note that capacitor manufacturer's ripple current ratings are often based on only 2000 hours lifetime. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet the size or height requirements of the design. An additional 0.1F to 1F ceramic capacitor is also recommended on VIN for high frequency decoupling, when not using an all ceramic capacitor solution. be less than 100mV at maximum VIN and fO = 2.25MHz with: ESRCOUT < 150m. Once the ESR requirements for COUT have been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement, except for an all ceramic solution. Since the ESR of a ceramic capacitor is so low, the input and output capacitor must instead fulfill a charge storage requirement. During a load step, the output capacitor must instantaneously supply the current to support the load until the feedback loop raises the switch current enough to support the load. The time required for the feedback loop to respond is dependent on the compensation and the output capacitor size. Typically, 3 to 4 cycles are required to respond to a load step, but only in the first cycle does the output drop linearly. The output droop, VDROOP, is usually about five times the linear drop of the first cycle. Thus, a good place to start is with the output capacitor size of approximately: COUT 5 IOUT fO * VDROOP Though this equation provides a good approximation, more capacitance may be required depending on the duty cycle and load step requirements. Ceramic Input and Output Capacitors Output Capacitor (COUT) Selection The selection of COUT is driven by the required ESR to minimize voltage ripple and load step transients. Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering. The output ripple (VOUT ) is determined by: 1 VOUT I L ESR+ 8fO COUT where fO = operating frequency, COUT = output capacitance and IL = ripple current in the inductor. The output ripple is highest at maximum input voltage since IL increases with input voltage. With IL = 240mA the output ripple will High value, low cost ceramic capacitors are available in small case sizes. Their high ripple current, high voltage rating, and low ESR make them ideal for switching regulator applications. However, due to the self-resonant and high-Q characteristics of some types of ceramic capacitors, care must be taken when these capacitors are used at the input. When a ceramic capacitor is used at the input and the power is being supplied through long wires, such as from a wall adapter, a load step at the output can induce ringing at the VIN pin. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, the ringing at the input can be large enough to damage the part. For a more detailed discussion, refer to Application Note 88. 3607fb 10 For more information www.linear.com/LTC3607 LTC3607 Applications Information Setting the Output Voltage The LTC3607 develops a 0.6V reference voltage between the feedback pins, VFB1 and VFB2, and ground as shown in Figure 1. The output voltage is set by a resistive divider according to the following formula: R1 VOUT =0.6V 1+ R2 Keeping the current small (<5A) in these resistors maximizes efficiency, but making them too small may allow stray capacitance to cause noise problems and reduce the phase margin of the error amp loop. To improve the frequency response, a feed-forward capacitor CFF may also be used. Great care should be taken to route the VFB traces away from noise sources, such as the inductor or the SW traces. For continuous mode operation with a fixed maximum input voltage, the minimum value that the output voltage can be reduced to is set by the minimum on-time, which is approximately 65ns. For fixed frequency (2.25MHz) applications, the relation between minimum output voltage and maximum input voltage is: VOUT(MIN) = 0.14625 * VIN(MAX) If the output voltage drops below that limit, the output will still regulate, but the part will skip cycles. Power Good Outputs The PGOOD1 and PGOOD2 are open-drain outputs which pull low when a regulator is out of regulation. When the output voltage is within 8.5% of regulation, a timer is started which releases the relevant PGOOD pin after 64 clock cycles. Mode Selection & Frequency Synchronization The MODE/SYNC pin is a multipurpose pin which provides mode selection and frequency synchronization. Floating this pin or connecting it to a 3.3V source enables Burst Mode operation, which provides optimal light load efficiency at the cost of a slightly higher output voltage ripple. When this pin is connected to ground, pulse-skipping operation is selected. This mode provides the lowest output ripple, at the cost of slightly lower light load efficiency. The LTC3607 can also be synchronized to another LTC3607 by the MODE/SYNC pin. During synchronization, the mode is set to pulse-skipping and the top switch turn-on is synchronized to the rising edge of the external clock. Pulse-skipping mode is also the default mode during start-up. Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ILOAD * ESR, where ESR is the effective series resistance of COUT. ILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The initial output voltage step may not be within the bandwidth of the feedback loop, so the standard second order overshoot/DC ratio cannot be used to determine phase margin. In addition, a feed-forward capacitor can be added to improve the high frequency response, as shown in Figure 1. Capacitors C1 and C2 provide phase lead by creating high frequency zeros with R1 and R3 respectively, which improve the phase margin. The output voltage settling behavior is related to the stability of the closed-loop system and will demonstrate the actual overall supply performance. In some applications, a more severe transient can be caused by switching in loads with large (>1F) input capacitors. The discharged input capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the switch connecting the load has low resistance and is driven quickly. The solution is to limit the turn-on speed of the load switch driver. A Hot SwapTM controller is designed specifically for this purpose and usually incorporates current limiting, short-circuit protection, and soft-starting. 3607fb For more information www.linear.com/LTC3607 11 LTC3607 Applications Information Efficiency Considerations The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Percent efficiency can be expressed as: %Efficiency = 100% - (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, four main sources usually account for most of the losses in LTC3607 circuits: 1) VIN quiescent current, 2) switching losses, 3) I2R losses, 4) other losses. 1) The VIN current is the DC supply current given in the Electrical Characteristics which excludes MOSFET driver and control currents. VIN current results in a small loss that increases with VIN, even at no load. 2) The switching current is the sum of the MOSFET driver and control currents. The MOSFET driver current results from switching the gate capacitance of the power MOSFETs. Each time a MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is a current out of VIN that is typically much larger than the DC bias current. In continuous mode, IGATECHG = fO(QT + QB), where QT and QB are the gate charges of the internal top and bottom MOSFET switches. The gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. 3) I2R losses are calculated from the DC resistances of the internal switches, RSW, and external inductor, RL. In continuous mode, the average output current flows through inductor L, but is chopped between the internal top and bottom switches. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (D) as follows: RSW = (RDS(ON)TOP)(D) + (RDS(ON)BOT )(1 - D) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses: I2R losses = IOUT2(RSW + RL) 4) Other hidden losses such as copper trace and internal battery resistances can account for additional efficiency degradations in portable systems. It is very important to include these system level losses in the design of a system. The internal battery and fuse resistance losses can be minimized by making sure that CIN has adequate charge storage and very low ESR at the switching frequency. Other losses including diode conduction losses during dead-time and inductor core losses generally account for less than 2% total additional loss. Thermal Considerations In a majority of applications, the LTC3607 does not dissipate much heat due to its high efficiency. However, in applications where the LTC3607 is running at high ambient temperature with low supply voltage and high duty cycles, such as in dropout, the heat dissipated may exceed the maximum junction temperature of the part. If the junction temperature reaches approximately 150C, both power switches for each channel will be turned off and the SW nodes will become high impedance. To prevent the LTC3607 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise is given by: TRISE = PD * JA where PD is the power dissipated by the regulator and JA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, TJ, is given by: TJ = TRISE + TAMBIENT 3607fb 12 For more information www.linear.com/LTC3607 LTC3607 Applications Information As an example, consider the case when the LTC3607 is in dropout on both channels at an input voltage of 5V with a load current of 600mA and an ambient temperature of 25C. From the Typical Performance Characteristics graph of Switch Resistance, the RDS(ON) resistance of the main switch is 0.9. Therefore, power dissipated by each channel is: PD = I2 * RDS(ON) = 324mW Running the two regulator channels under the same conditions will result in a total power dissipation of 0.648W. The MSE package junction-to-ambient thermal resistance, JA, is 37C/W. Therefore, the junction temperature of the regulator operating in a 25C ambient temperature is approximately: TJ = 0.648W * 37C/W + 25C = 49C Design Example As a design example, consider using the LTC3607 in a portable application with a dual lithium-ion battery. The battery provides a VIN = 5.6V to 8.4V. The loads require a maximum of 600mA in active mode and 2mA in standby mode. The output voltages are VOUT1 = 3.3V and VOUT2 = 2.5V. Since the load still needs power in standby, Burst Mode operation is selected for good light load efficiency. First, calculate the inductor values for about 240mA ripple current at maximum VIN: L1= 3.3V 3.3V = 3.7H * 1- 2.25MHz * 240mA 8.4V Choosing the closest standardized inductor value of 3.3H results in a maximum ripple current of: IL1 = 3.3V 3.3V * 1- =270mA 2.25MHz * 3.3H 8.4V The same calculations for L2 result in a standard inductor value of 3.3H and a maximum current ripple of 236mA. For cost reasons, a ceramic capacitor will be used. COUT selection is then based on load step droop instead of ESR requirements. For a 5% output droop: COUT1 5 * 600mA = 8.1 F 2.25MHz *(5% * 3.3V) COUT2 5 * 600mA =10.7 F 2.25MHz *(5% * 2.5V) For both outputs, a close standard value is 10F. Since the output impedance of a lithium-ion battery is very low, each CIN is chosen to be 10F also. The output voltages can now be programmed by choosing the values of R1 thru R4. To maintain high efficiency, the current in these resistors should be kept small. Choosing 5A with the 0.6V feedback voltage makes R2 and R4 ~ 120k. Close standard 1% resistor values is 121k and then R1 and R3 are 549k and 383k, respectively. The PGOOD pins are common drain outputs, thus requiring pull-up resistors. Two 100k resistors are used for adequate speed. Figure 1 shows the complete schematic for this design example. The specific passive components chosen allow for a 1mm height power supply that maintains a high efficiency across load. Board Layout Considerations When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3607. These items are also illustrated graphically in the layout diagram of Figure 2. Check the following in your layout: 1. Do the input capacitors CIN connect to PVIN1, PVIN2, PGND1, and PGND2 as closely as possible? These capacitors provides the AC current to the internal power MOSFETs and their drivers. 2. Are COUT and L closely connected? The (-) plate of COUT returns current to GND and the (-) plate of CIN. 3607fb For more information www.linear.com/LTC3607 13 LTC3607 Applications Information 5. A ground plane is preferred, but if not available keep the signal and power grounds segregated with small signal components returning to the GND pin at one point. Additionally, the two grounds should not share the high current paths of CIN or COUT. 3. The resistor divider formed by R1 and R2 must be connected between the (+) plate of COUT and a ground sense line terminated near GND (exposed pad). The feedback signals VFB1 and VFB2 should be routed away from noisy components and traces (such as the SW lines) and their traces should be minimized. 6. Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of power components. These copper areas should be connected to VIN or GND. Refer to Figures 2 and 3 for board layout examples. 4. Keep sensitive components away from the SW pins. The feedback resistors R1 to R4 should be routed away from the SW traces and the inductors. VIN 8.4V CIN1 10F PVIN1 SVIN MODE/SYNC CIN2 10F PVIN2 RUN2 L1 3.3H VOUT1 3.3V AT 600mA RUN2 L2 3.3H RUN1 RUN1 LTC3607 VOUT2 2.5V AT 600mA SW2 100k SW1 PGOOD2 100k PGOOD1 C1, 22pF VFB2 COUT1 10F R1, 549k 1% R2 121k 1% C2, 22pF VFB1 R3, 383k 1% PGND1 GND SGND PGND2 R4 121k 1% COUT2 10F 3607 F01 C1: TDK C2012X5R1C106K/1.25 COUT1, COUT2: C2012X5R0J106K/1.25 L1, L2: WURTH ELEKTRONIK 744025003 Figure 1. Design Example Circuit VIAS TO GROUND PLANE VOUT1 COUT1 VIAS TO GROUND PLANE 16 15 14 13 1 12 2 VIA TO VIN 4 6 7 CIN 8 VIN GND CIN CIN L COUT2 L 17 VIAS TO GROUND PLANE COUT1 VOUT1 VIA TO VIN PIN 1 9 5 GND CIN 10 3 VIAS TO GROUND PLANE L 11 17 L VIN VOUT2 VOUT2 COUT2 VIAS TO GROUND PLANE 3607 F02 3607 F03 Figure 2. Example of Power Component Layout for QFN Package Figure 3. Example of Power Component Layout for MSE Package 3607fb 14 For more information www.linear.com/LTC3607 LTC3607 Typical Applications 5V/2.5V 2.25MHz Buck Regulator VIN 6V TO 15V CIN1 10F PVIN1 SVIN MODE/SYNC RUN1 RUN1 L1, 4.7H VOUT1 5V AT 600mA SW1 CIN2 10F PVIN2 RUN2 RUN2 L2, 3.3H LTC3607 100k 100k PGOOD2 PGOOD1 C2, 22pF C1, 22pF COUT1 10F R1 887k 1% R2 121k 1% VOUT2 2.5V AT 600mA SW2 VFB2 VFB1 PGND1 GND SGND PGND2 R4 121k 1% R3 383k 1% COUT2 10F L1: SUMIDA CDRH3D16/HPNP-4R7NC L2: SUMIDA CDRH3D16/HPNP-3R3NC 3607 TA02 Low Output Voltage and Main Supply VIN 12V VOUT1 5V AT 400mA CIN 10F PVIN1 SVIN MODE/SYNC RUN1 RUN1 L1 4.7H PVIN2 RUN2 L2 1.5H SW2 C2, 22pF C1, 22pF COUT1 10F R1 887k 1% 1000pF PGOOD1 LTC3607 PGOOD2 SW1 100k R2 121k 1% VFB1 VFB2 R4 121k 1% R3 80.6k 1% VOUT2 1V AT 600mA COUT2 22F PGND1 GND SGND PGND2 L1: VISHAY IHLP1616BZER4R7M11 L2: VISHAY IHLP1616ABER1R5M11 3607 TA03 3607fb For more information www.linear.com/LTC3607 15 LTC3607 Typical Applications Sequenced Power Supplies VIN 4.5V TO 15V CIN1 10F VOUT1 1000pF PVIN1 SVIN RUN1 100k MODE/SYNC PGOOD1 L1, 3.3H VOUT1 3.3V AT 600mA RUN2 CIN2 10F PVIN2 PGOOD2 LTC3607 SW1 L2, 3.3H SW2 C2, 22pF C1, 22pF COUT1 10F R1 549k 1% R2 121k 1% VFB1 VFB2 PGND1 GND SGND PGND2 R4 121k 1% L1, L2: TDK VLCF4018T-3R3N1R2-2 R3 383k 1% VOUT2 2.5V AT 600mA COUT2 10F 3607 TA04 3607fb 16 For more information www.linear.com/LTC3607 LTC3607 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. UD Package 16-Lead Plastic QFN (3mm x 3mm) (Reference LTC DWG # 05-08-1691 Rev O) 0.70 0.05 3.50 0.05 1.45 0.05 2.10 0.05 (4 SIDES) PACKAGE OUTLINE 0.25 0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 3.00 0.10 (4 SIDES) BOTTOM VIEW--EXPOSED PAD PIN 1 NOTCH R = 0.20 TYP OR 0.25 x 45 CHAMFER R = 0.115 TYP 0.75 0.05 15 PIN 1 TOP MARK (NOTE 6) 16 0.40 0.10 1 1.45 0.10 (4-SIDES) 2 (UD16) QFN 0904 0.200 REF 0.00 - 0.05 NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.25 0.05 0.50 BSC 3607fb For more information www.linear.com/LTC3607 17 LTC3607 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MSE Package 16-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1667 Rev F) BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 0.102 (.112 .004) 5.10 (.201) MIN 2.845 0.102 (.112 .004) 0.889 0.127 (.035 .005) 8 1 1.651 0.102 (.065 .004) 1.651 0.102 3.20 - 3.45 (.065 .004) (.126 - .136) 0.305 0.038 (.0120 .0015) TYP 16 0.50 (.0197) BSC 4.039 0.102 (.159 .004) (NOTE 3) RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 0.35 REF 0.12 REF DETAIL "B" CORNER TAIL IS PART OF DETAIL "B" THE LEADFRAME FEATURE. FOR REFERENCE ONLY 9 NO MEASUREMENT PURPOSE 0.280 0.076 (.011 .003) REF 16151413121110 9 DETAIL "A" 0 - 6 TYP 3.00 0.102 (.118 .004) (NOTE 4) 4.90 0.152 (.193 .006) GAUGE PLANE 0.53 0.152 (.021 .006) DETAIL "A" 1.10 (.043) MAX 0.18 (.007) SEATING PLANE 0.17 - 0.27 (.007 - .011) TYP 1234567 8 0.50 (.0197) BSC NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 0.86 (.034) REF 0.1016 0.0508 (.004 .002) MSOP (MSE16) 0213 REV F 3607fb 18 For more information www.linear.com/LTC3607 LTC3607 Revision History REV DATE DESCRIPTION A 11/13 Clarified RUN 1/2 voltages 2 Clarified Electrical table 3 Clarified Pin Function descriptions 6 Clarified ripple feature 1 Clarified Electrical Characteristics table 3 Clarified Output Voltage formula 11 B 8/14 PAGE NUMBER 3607fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representaFor more information www.linear.com/LTC3607 tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC3607 Typical Application 1mm Height, 1.8V/3.3V Buck Regulator Using Chip Inductors VIN 5.6V TO 8.4V R2 CIN 10F x2 PVIN1 SVIN PVIN2 L1, 2.2H VOUT1 1.8V AT 600mA RUN1 RUN2 SW1 SW2 L2, 3.3H LTC3607 C1, 22pF R1 243k VIA TO VOUT1 VFB1 R2 121k COUT1 10F C2, 22pF R4 121k R3 549k C2 R1 R3 VIA TO VOUT2 16 15 14 13 11mm VFB2 GND VOUT2 3.3V AT 600mA R4 C1 COUT2 10F VIA TO VIN GND 1 2 3 4 12 11 10 9 17 5 6 GND 7 8 CIN CIN COUT1 COUT2 VOUT1 CIN: TDK C2012X5R1C106K/0.85 COUT1, COUT2: TDK C2012X5R0JI06K/0.85 L1: MURATA LQM2HPN2R2MGS L2: MURATA LQM2HPN3R3MGS L1 VOUT2 VIN L2 3607 TA05 10mm 3607 TA06 Related Parts PART NUMBER DESCRIPTION COMMENTS LTC3601 15V, 1.5A (IOUT ), 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 4.5V to 15V, 3mm x 3mm QFN-16, MSOP-16E LTC3603 15V, 2.5A (IOUT ), 3MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 4.5V to 15V, 4mm x 4mm QFN-20, MSOP-16E LTC3633 15V, Dual 3A (IOUT ), 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 3.6V to 15V, 4mm x 5mm QFN-28, TSSOP-28E LTC3605 15V, 5A (IOUT ), 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 4V to 15V, 4mm x 4mm QFN-24 LTC3604 15V, 2.5A (IOUT ), 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 3.6V to 15V, 3mm x 3mm QFN-16, MSOP-16E LTC3417A-2 5.5V, Dual 1.5A/1A, 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN = 2.3V, 3mm x 5mm DFN-16, TSSOP-16E LTC3407A/-2 5.5V, Dual 600mA/600mA 1.5MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN = 2.5V, 3mm x 3mm DFN-10, MS-10E LTC3419/-1 5.5V, Dual 600mA/600mA 2.25MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN = 2.5V, 3mm x 3mm DFN-10, MS-10 LTC3548A-1/-2 5.5V, Dual 400mA and 800mA IOUT, 2.25MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN = 2.5V, 3mm x 3mm DFN-10, MS-10E LTC3547/ LTC3547B 5.5V, Dual Monolithic 300mA, 2.25MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN = 2.5V, IQ = 40A, ISD < 1A, 3mm x 2mm DFN-8 LTC3621 17V, 1A (IOUT ), 2.25MHz Synchronous Step-Down DC/DC 95% Efficiency, VIN = 2.7V to 17V, 3mm x 2mm DFN-6, MS-8E Converter with 3.5A IQ 3607fb 20 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTC3607 (408) 432-1900 FAX: (408) 434-0507 www.linear.com/LTC3607 LT 0814 REV B * PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2013