S3C9404/P9404/C9414/P9414 PRODUCT OVERVIEW
1-1
1PRODUCT OVERVIEW
SAM87RI PRODUCT FAMILY
Samsung's SAM87Ri family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide
range of integrated peripherals, and various mask-programmable ROM sizes.
A address/data bus architecture and a large number of bit-configurable I/O ports provide a flexible programming
environment for applications with varied memory and I/O requirements. Timer/counters with selectable operating
modes are included to support real-time operations.
S3C9404/C9414 MICROCONTROLLER
The S3C9404/C9414 single-chip 8-bit microcontroller is fabricated using an advanced CMOS process. It is built
around the powerful SAM87Ri CPU core. The S3C9404/C9414 is a versatile microcontroller, with its A/D
converter and a zero-crossing detection capability it can be used in a wide range of general purpose applications.
Stop and Idle power-down modes were implemented to reduce power consumption. To increase on-chip register
space, the size of the internal register file was logically expanded. The S3C9404/C9414 has 4-Kbytes of program
memory on-chip (ROM) and 208-bytes of general purpose register area RAM.
Using the SAM87Ri design approach, the following peripherals were integrated with the SAM87Ri core:
—Four configurable I/O ports (S3C9404: 22 pins, S3C9414: 16 pins)
—Six interrupt sources with one vector and one interrupt level
—Two 8-bit timer/counter with various operating modes
—Analog to digital converter (S3C9404: 8-bit, 8-channel, S3C9414: 10-bit, 5-channel)
—One zero cross detection module
The S3C9404/C9414 microcontroller is ideal for use in a wide range of electronic applications requiring simple
timer/counter, PWM, ADC, ZCD and capture functions. S3C9404 is available in a 30-pin SDIP and a 32-pin SOP
package. S3C9414 is available in a 24-pin SDIP and a 24-pin SOP package.
OTP
The S3P9404/P9414 is an OTP (one time programmable) version of the S3C9404/C9414 microcontroller. The
S3P9404/P9414 has on-chip 4-Kbyte one-time programmable EEPROM instead of masked ROM. The
S3P9404/P9414 is fully compatible with the S3C9404/C9414, in function, in D.C. electrical characteristics and in
pin configuration.
PRODUCT OVERVIEW S3C9404/P9404/C9414/P9414
1-2
FEATURES
CPU
•SAM87Ri CPU core
Memory
•4-Kbyte internal program memory (ROM)
•208-byte general purpose register area (RAM)
Instruction Set
•41 instructions
•IDLE and STOP instructions added for
power-down modes.
Instruction Execution Time
•600 ns at 10 MHz fOSC (minimum)
Interrupts
•6 interrupt sources with one vector and one level
interrupt structure
Oscillation Frequency
•1 MHz to 10 MHz external crystal oscillator
•Maximum 10 MHz CPU clock
•4 MHz RC oscillator
General I/O
•Four I/O ports (22 pins for S3C9404,
16 pins for S3C9414)
•Bit programmable ports
A/D Converter
•Eight analog input pins
•8-bit conversion resolution (S3C9404)
•10-bit conversion resolution (S3C9414)
Timer/Counter
•One 8-bit basic timer for watchdog function
•One 8-bit timer/counter with three operating
modes (10-bit PWM 1ch)
•One 8-bit timer/counter for the zero-crossing
detection circuit
Zero-Crossing Detection Circuit
•Zero-crossing detection circuit that generates a
digital signal in synchronism with an AC signal
input
Buzzer Frequency Range
•200 Hz to 20 kHz signal can be generated
Operating Temperature Range
•– 40°C to + 85°C
Operating Voltage Range
•2.7 V to 5.5 V
OTP Interface Protocol Spec
•Serial OTP
Package Types
•30-pin SDIP, 32-pin SOP for S3C9404/P9404
•24-pin SDIP, 24-pin SOP for S3C9414/P9414
S3C9404/P9404/C9414/P9414 PRODUCT OVERVIEW
1-3
BLOCK DIAGRAM
PORT 0
PORT 2
SAM87RI CPU
P0.0-P0.7
4-KB ROM 208-BYTE
REGISTER FILE
PORT 3 P3.0-P3.5
/ADC0-ADC5
PORT 1
P1.0-P1.3
/ZCD,BUZ,T0,CLO
P1.0/
ZCD
I/O PORT I/O and
INTERRUPT CONTROL P2.0-P2.3
/INT0-INT1
/ADC6-ADC7
TIMER 0
TIMER 1
ZCD
ADC
OSC
BASIC
TIMER
ADC0
-ADC7
P1.1/BUZ
T0(PWM)
XIN
XOUT
Figure 1-1. Block Diagram
PRODUCT OVERVIEW S3C9404/P9404/C9414/P9414
1-4
PIN ASSIGNMENTS
VSS
XIN
XOUT
TEST
P0.1
P0.0
RESET
P3.5/ADC5
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0
AVSS
AVref
VDD
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.0 / ZCD
P1.1 / BUZ
P1.2 / T0(PWM)
P1.3 / CLO
P2.0 / INT0
P2.1 / INT1
P2.2 / ADC6
P2.3 / ADC7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
S3C9404
30-SDIP
(Top View)
Figure 1-2. Pin Assignment Diagram (30-Pin SDIP Package)
VSS
XIN
XOUT
TEST
P0.1
P0.0
RESET
NC
P3.5/ADC5
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0
AVSS
AVref
VDD
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
NC
P1.0 / ZCD
P1.1 / BUZ
P1.2 / T0(PWM)
P1.3 / CLO
P2.0 / INT0
P2.1 / INT1
P2.2 / ADC6
P2.3 / ADC7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
S3C9404
32-SOP
(Top View)
Figure 1-3. Pin Assignment Diagram (32-Pin SOP Package)
S3C9404/P9404/C9414/P9414 PRODUCT OVERVIEW
1-5
VSS
XIN
XOUT
TEST
P0.1
P0.0
RESET
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0
VDD
P0.2
P0.3
P0.4
P0.5
P0.6
P1.0 / ZCD
P1.1 / BUZ
P1.2 / T0(PWM)
P2.0 / INT0
AVref
AVSS
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
S3C9414
24-SDIP
(Top View)
Figure 1-4. Pin Assignment Diagram (24-Pin SDIP Package)
VSS
XIN
XOUT
TEST
P0.1
P0.0
RESET
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0
VDD
P0.2
P0.3
P0.4
P0.5
P0.6
P1.0 / ZCD
P1.1 / BUZ
P1.2 / T0(PWM)
P2.0 / INT0
AVref
AVSS
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
KS86C4104
24-SOP
(Top View)
Figure 1-5. Pin Assignment Diagram (24-Pin SOP Package)
PRODUCT OVERVIEW S3C9404/P9404/C9414/P9414
1-6
PIN DESCRIPTIONS
Table 1-1. S3C9404/C9414 Pin Descriptions
Pin
Names Pin
Type Pin
Description Circuit
Type Share
Pins
P0.0-P0.7 I/O Bit-programmable I/O port for normal input or
push-pull, open-drain output. Pull-up resistors are
assignable by software.
E-2
P1.0-P1.3 I/O Bit-programmable I/O port for Schmitt trigger
input or push-pull output. Pull-up resistors are
assignable by software. Port 1 pins can also be
used as alternative functions.
F
D
D
D
ZCD
BUZ
T0(PWM)
CLO
P2.0-P2.3 I/O Bit-programmable I/O port for Schmitt trigger
input or push-pull, open drain output. Pull up
resistors are assignable by software. Port 2 can
also be used as external interrupt, A/D input.
E
E-1 INT0–INT1
ADC6–ADC7
P3.0-P3.5 I/O Bit-programmable I/O port for Schmitt trigger
input or push-pull output. Pull-up resistors are
assignable by software. Port 3 pins can also be
used as A/D converter input.
FADC0–ADC5
XIN, XOUT –Crystal/ceramic, or RC oscillator signal for system
clock. – –
INT0–INT1 IExternal interrupt input. EP2.0–P2.1
RESET ISystem RESET signal input pin. B–
TEST ITest signal input pin (for factory use only: must be
connected to VSS)– –
VDD, VSS –Voltage input pin and ground – –
AVREF, AVSS –A/D converter reference voltage input and ground – –
ZCD IZero crossing detector input FP1.0
BUZ O200 Hz–20 kHz frequency output for buzzer
sound DP1.1
T0 I/O Timer 0 capture input or 10-bit PWM output DP1.2
CLO OSystem clock output port DP1.3
ADC0–ADC7 IA/D converter input F
E-1 P3.0–P3.5
P2.2–P2.3
NOTE: Port 0.7, P1.3, P2.1–P2.3 and P3.5 is not available in S3C9414/P4104 .
S3C9404/P9404/C9414/P9414 PRODUCT OVERVIEW
1-7
PIN CIRCUITS
P-CHANNEL
IN
N-CHANNEL
VDD
Figure 1-6. Pin Circuit Type A
PULL-UP
RESISTOR
VDD
IN
Figure 1-7. Pin Circuit Type B
VDD
P-CHANNEL
DATA
OUTPUT
DISABLE
N-CHANNEL
OUT
Figure 1-8. Pin Circuit Type C
P-CHANNEL
PULL-UP
RESISTOR
RESISTOR
ENABLE
DATA
OUTPUT
DISABLE
IN/OUT
VDD
CIRCUIT
TYPE C
DATA
Figure 1-9. Pin Circuit Type D
PRODUCT OVERVIEW S3C9404/P9404/C9414/P9414
1-8
INPUT
VDD
PULL-UP
ENABLE
N-CH
P-CH
VDD
PULL-UP
RESISTOR
DATA
OUTPUT
DISABLE
IN/OUT
PNE
Figure 1-10. Pin Circuit Type E
VDD
PULL-UP
ENABLE
N-CH
P-CH
VDD
PULL-UP
RESISTOR
DATA
OUTPUT
DISABLE
IN/OUT
PNE
DIGITAL INPUT
ANALOG INPUT
Figure 1-11. Pin Circuit Type E-1
INPUT
VDD
PULL-UP
ENABLE
N-CH
P-CH
VDD
PULL-UP
RESISTOR
DATA
OUTPUT
DISABLE
IN/OUT
PNE
Figure 1-10. Pin Circuit Type E-2
IN/OUT
VDD
PULL-UP
RESISTOR
VDD
CIRCUIT
TYPE C
DIGITAL
INPUT
DATA
OUTPUT
DISABLE
PULL-UP
ENABLE
ANALOG
INPUT
Figure 1-12. Pin Circuit Type F
S3C9404/P9404/C9414/P9414 ELECTRICAL DATA
13-1
13 ELECTRICAL DATA
OVERVIEW
In this section, the following S3C9404/C9414 electrical characteristics are presented in tables and graphs:
—Absolute maximum ratings
—D.C. electrical characteristics
—A.C. electrical characteristics
—Oscillator characteristics
—Oscillation stabilization time
—Operating Voltage Range
—Schmitt trigger input characteristics
—Data retention supply voltage in Stop mode
—Stop mode release timing when initiated by a RESET
—A/D converter electrical characteristics
—Zero-crossing detector
—Zero Crossing Waveform Diagram
ELECTRICAL DATA S3C9404/P9404/C9414/P9414
13-2
Table 13-1. Absolute Maximum Ratings
(TA = 25°C)
Parameter Symbol Conditions Rating Unit
Supply voltage VDD –– 0.3 to + 6.5 V
Input voltage VIAll input ports – 0.3 to VDD + 0.3 V
Output voltage VOAll output ports – 0.3 to VDD + 0.3 V
Output current IOH One I/O pin active – 18 mA
high All I/O pins active – 60
Output current IOL One I/O pin active + 30 mA
low Total pin current for ports 1, 2, 3+ 100
Total pin current for ports 0 + 200
Operating
temperature TA– – 40 to + 85 °C
Storage
temperature TSTG –– 65 to + 150 °C
Table 13-2. DC Electrical Characteristics
(TA = – 40°C to + 85°C, VDD = 2.7 V to 5.5 V)
Parameter Symbol Conditions Min Typ Max Unit
Input high
voltage VIH1 Ports 1,2,3, and
RESET VDD= 2.7 to 5.5 V 0.8 VDD –VDD V
VIH2 Port 0 0.7 VDD
VIH3 XIN and XOUT VDD –0.1
Input low
voltage VIL1 Ports 1,2,3, and
RESET VDD= 2.7 to 5.5 V – – 0.2 VDD V
VIL2 Port 0 0.3 VDD
VIL3 XIN and XOUT 0.1
Output high
voltage VOH IOH = – 1 mA
ports 0, 1, 2, 3 VDD= 4.5 to 5.5 V VDD – 1.0 – – V
Output low
voltage VOL1 IOL = 15 mA
port 0 VDD= 4.5 to 5.5 V –0.4 2.0 V
VOL2 IOL = 4 mA
port 1,2,3 VDD= 4.5 to 5.5 V 0.4 2.0
S3C9404/P9404/C9414/P9414 ELECTRICAL DATA
13-3
Table 13-2. DC Electrical Characteristics (Continued)
(TA = – 40°C to + 85°C, VDD = 2.7 V to 5.5 V)
Parameter Symbol Conditions Min Typ Max Unit
Input high leakage
current ILIH1 All inputs except ILIH2 VIN = VDD – – 1 µA
ILIH2 XIN, XOUT VIN = VDD 20
Input low leakage
current ILIL1 All inputs except
ILIL2 and RESET VIN = 0 V – – – 1 µA
ILIL2 XIN, XOUT VIN = 0 V – 20
Output high
leakage current ILOH All outputs VOUT = VDD – – 2 µA
Output low
leakage current ILOL All outputs VOUT = 0 V – – – 2 µA
Pull-up resistors RPVIN = 0 V
Ports 0–3 and VDD = 5 V 30 47 70 kΩ
RESET VDD = 3 V 30 280 350
Supply currentIDD1 Run mode
10 MHz CPU clock VDD = 5 V ± 10% –7.5 15 mA
8 MHz CPU clock VDD = 3 V ± 10% 3 6
IDD2 Idle mode
10 MHz CPU clock VDD = 5 V ± 10% 2 5
8 MHz CPU clock VDD = 3 V ± 10% 0.7 2.5
IDD3 Stop mode VDD = 5 V ± 10% 0.1 5µA
VDD = 3 V ± 10%
NOTE: D.C. electrical values for Supply current (IDD1 to IDD3) do not include current drawn through internal pull-up
resisters, output port drive current, ZCD and ADC.
ELECTRICAL DATA S3C9404/P9404/C9414/P9414
13-4
Table 13-3. AC Electrical Characteristics
(TA = –20°C to + 85°C, VDD = 2.7 V to 5.5 V)
Parameter Symbol Conditions Min Typ Max Unit
Interrupt input
high, low width tINTH,
tINTL Port 2
VDD = 5V ± 10% – 200 – ns
RESET input
low width
ZCD noise filter
tRSL
–Input
VDD = 5V ± 10% –1–µs
tNF1L tNF1H
0.8 VDD
tRSL tNF2
0.2 VDD
1 tCPU
NOTE: The unit tCPU means one CPU clock period.
Figure 13-1. Input Timing Measurement Points
S3C9404/P9404/C9414/P9414 ELECTRICAL DATA
13-5
Table 13-4. Oscillator Characteristics
(TA = – 40°C to + 85°C)
Oscillator Clock Circuit Test Condition Min Typ Max Unit
Main crystal or
ceramic
C2
XIN
XOUT
C1
VDD = 4.5 to 5.5 V
VDD = 2.7 to 4.5 V 1
1–
–10
8MHz
External clock XIN
XOUT
VDD = 4.5 to 5.5 V
VDD = 2.7 to 4.5 V 1
1–
–10
8
RC oscillator
RXIN
XOUT
VDD = 4.75 to 5.25 V
R = 8.2K
– 4
(P1.3/
CLO)
–
Table 13-5. Oscillation Stabilization Time
(TA = – 40°C to + 85°C, VDD = 2.7 V to 5.5 V)
Oscillator Test Condition Min Typ Max Unit
Main crystal fOSC > 1.0 MHz – – 20 ms
Main ceramic Oscillation stabilization occurs when VDD is equal
to the minimum oscillator voltage range. – – 10
External clock
(main system) XIN input high and low width (tXH, tXL)25 – 500 ns
Oscillator
stabilization tWAIT when released by a reset (1) –216/fOSC –ms
wait time tWAIT when released by an interrupt (2) –––
NOTES:
1. fOSC is the oscillator frequency.
2.The duration of the oscillator stabilization wait time, tWAIT, when it is released by an interrupt is determined by the
settings in the basic timer control register, BTCON.
ELECTRICAL DATA S3C9404/P9404/C9414/P9414
13-6
CPU CLOCK
1 MHz
SUPPLY VOLTAGE (V)
2 MHz
3 MHz
4 MHz
8 MHz
10 MHz
2 3 4 5 6 71 2.7 5.5
Figure 13-2. Operating Voltage Range
VDD
VSS
Vout
ABC D Vin
A = 0.2 VDD
B = 0.4 VDD
C = 0.6 VDD
D = 0.8 VDD
0.3 VDD 0.7 VDD
Figure 13-3. Schmitt Trigger Input Characteristics Diagram
S3C9404/P9404/C9414/P9414 ELECTRICAL DATA
13-7
Table 13-6. Data Retention Supply Voltage in Stop Mode
(TA = – 40°C to + 85°C, VDD = 2.7 V to 5.5V)
Parameter Symbol Conditions Min Typ Max Unit
Data retention
supply voltage VDDDR Stop mode 2.0 –5.5 V
Data retention
supply current IDDDR Stop mode; VDDDR = 2.0 V –0.1 5µA
NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads.
tWAIT
VDD
RESET
EXECUTION OF
STOP
VDDDR
DATA RETENTION
MODE
STOP MODE
INTERNAL
RESET IDLE MODE
(BASIC TIMER
ACTIVE)
0.8 VDD
0.2 VDD
NORMAL
OPERATING
MODE
∼
∼
∼
∼
∼
∼
∼
∼
NOTE: tWAIT is the same as 4096 x 16 x 1/fOSC
Figure 13-4. Stop Mode Release Timing When Initiated by a RESETRESET
ELECTRICAL DATA S3C9404/P9404/C9414/P9414
13-8
Table 13-7. A/D Converter Electrical Characteristics (S3C9404)
(TA = – 40°C to + 85°C, VDD = 2.7 V to 5.5 V, VSS = 0 V) S3C9404: 8-bit ADC
Parameter Symbol Test Conditions Min Typ Max Unit
Total accuracy VDD = 5.12 V – – ± 2 LSB
Integral linearity
error ILE CPU clock = 10 MHz
AVREF = 5.12 V –± 1.5
Differential
linearity error DLE AVSS = 0 V –± 1
Offset error of
top EOT – 1 ± 2
Offset error of
bottom EOB – 1 ± 2
Conversion
time(1) tCON fcpu = 10 MHz 5 – – µs
Analog input
voltage VIAN –AVSS –AVREF V
Analog input
impedance RAN – 2 – – MΩ
ADC reference
voltage AVREF –2.5 –VDD V
ADC reference
ground AVSS –VSS –VSS + 0.3 V
Analog input
current IADIN AVREF = VDD = 5 V
conversion time = 5 µs– – 10 µA
ADC block
current (2) IADC AVREF = VDD = 5 V
conversion time = 5 µs– 1 3 mA
AVREF = VDD = 3 V
conversion time = 5 µs0.5 1.5
AVREF = VDD = 5 V
Power down mode – 100 500 nA
NOTES:
1. “Conversion time” is the time required from the moment a conversion operation starts until it ends.
2. IADC is operating current during A/D conversion.
S3C9404/P9404/C9414/P9414 ELECTRICAL DATA
13-9
Table 13-8. A/D Converter Electrical Characteristics (S3C9414)
(TA = – 40°C to + 85°C, VDD = 2.7 V to 5.5 V, VSS = 0 V) S3C9414: 10-bit ADC
Parameter Symbol Test Conditions Min Typ Max Unit
Resolution – 10 – bit
Total accuracy VDD = 5.12 V – – ± 3 LSB
Integral linearity
error ILE CPU clock = 10 MHz
AVREF = 5.12 V –± 2
Differential
linearity error DLE AVSS = 0 V –± 1
Offset error of
top EOT ± 1 ± 3
Offset error of
bottom EOB ± 0.5 ± 2
Conversion time
(1) tCON 10-bit conversion
50 x 4/ fOSC (3) 20 – – µs
Analog input
voltage VIAN –AVSS –AVREF V
Analog input
impedance RAN – 2 – – MΩ
Analog
reference
voltage
AVREF –2.5 –VDD V
Analog ground AVSS –VSS –VSS + 0.3 V
Analog input
current IADIN AVREF = VDD = 5 V
conversion time = 20 µs– – 10 µA
Analog block
current (2) IADC AVREF = VDD = 5 V
conversion time = 20 µs1 3 mA
AVREF = VDD = 3 V
conversion time = 20 µs0.5 1.5 mA
AVREF = VDD = 5 V
when power down mode 100 500 nA
NOTES:
1. "Conversion time" is the time required from the moment a conversion operation starts until it ends.
2. IADC is operating current during A/D conversion.
3. fOSC is the main oscillator clock.
ELECTRICAL DATA S3C9404/P9404/C9414/P9414
13-10
Table 13-9. Zero Crossing Detector
(TA = – 40°C to + 85°C, VDD = 4.5 V to 5.5 V, VSS = 0 V)
Parameter Symbol Test Conditions Min Typ Max Unit
Zero-crossing
detection input
voltage
VZC AC connection
c = 0.1 µF1.0 –3.0 Vp-p
Zero-crossing
detection accuracy VAZC fZC = 60 Hz
(sine wave)
VDD = 5 V
fOSC = 10 MHz
– – ± 150 mV
Zero-crossing
detection input
frequency
fZC – 40 – 200 Hz
AC Input
ZCINT
1/fZC
VAZC VAZ(P-P)
Figure 13-5. Zero Crossing Waveform Diagram
S3C9404/P9404/C9414/P9414 ELECTRICAL DATA
13-11
10
30
50
60
70
20
00.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
VOL (V)
IOL (mA)
VDD = 4.5 V
VDD = 5.0 V
VDD = 5.5 V
40
Figure 13-6. IOL vs. VOL (P0, TA = 25 °°C)
ELECTRICAL DATA S3C9404/P9404/C9414/P9414
13-12
10
30
50
20
00.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
VOL (V)
IOL (mA) VDD = 4.5 V
VDD = 5.0 V
VDD = 5.5 V
40
Figure 13-7. IOL vs. VOL (P1–P3, TA = 25 °°C)
S3C9404/P9404/C9414/P9414 ELECTRICAL DATA
13-13
− 8
− 36
− 20
− 32
− 28
00.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
VOH (V)
IOH
(mA)
− 4
− 16
− 24
− 12
VDD = 4.5 V
VDD = 5.0 V
VDD = 5.5 V
Figure 13-8. IOH vs. VOH (P0, TA = 25 °°C)
ELECTRICAL DATA S3C9404/P9404/C9414/P9414
13-14
− 8
− 20
00.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
VOH (V)
IOH
(mA)
− 4
− 16
− 24
− 12
VDD = 4.5 V
VDD = 5.0 V
VDD = 5.5 V
Figure 13-9. IOH vs. VOH (P1–P3, TA = 25 °°C)
S3C9404/P9404/C9414/P9414 MECHANICAL DATA
14-1
14 MECHANICAL DATA
OVERVIEW
The S3C9404/C9414 is available in a 30-pin SDIP package (Samsung: 30-SDIP-400) and a 32-pin SOP package
(32-SOP-450A), a 24-pin SDIP package (24-SDIP-300) and a 24-pin SOP package (24-SOP-375). Package
dimensions are shown in Figures 14-1, 14-2, 14-3, and 14-4.
NOTE: Dimensions are in millimeters.
30-SDIP-400
8.94 ± 0.2
#1 #15
#30 #16 0-15 °
0.25 +0.1
– 0.05
10.16
1.12 ± 0.1
0.51MIN 3.81 ± 0.2
3.30 ± 0.3 5.08MAX
(1.30) 0.56 ± 0.1
27.48 ± 0.2
27.88 MAX
1.778
Figure 14-1. 30-Pin SDIP Package Dimensions
MECHANICAL DATA S3C9404/P9404/C9414/P9414
14-2
0~8°
0.20 +0.10
- 0.05
8.34 ± 0.2
0.78 ± 0.2
11.43
#1 #16
#32 #17
32-SOP-450A
12.00 ± 0.3
NOTE: Dimensions are in millimeters.
19.90 ± 0.2
0.10 MAX
0.0MIN 2.00 ± 0.2
2.40MAX
(0.43) 0.40 ± 0.1 1.27
Figure 14-2. 32-SOP-450A Package Dimensions
S3C9404/P9404/C9414/P9414 MECHANICAL DATA
14-3
NOTE: Dimensions are in millimeters.
7.62
0-15 °
0.25 +0.1
– 0.05
24-SDIP-300
6.40 ± 0.2
#1 #12
#24 #13
0.51MIN 3.25 ± 0.2
3.30 ± 0.3 5.08MAX
22.95 ± 0.2
23.35 MAX
(1.69) 0.89 ± 0.1
0.46 ± 0.1 1.778
Figure 14-3. 24-SDIP-300 Package Dimensions
MECHANICAL DATA S3C9404/P9404/C9414/P9414
14-4
NOTE: Dimensions are in millimeters.
7.50 ± 0.2
0-8°
0.85±0.20
9.53
0.15 +0.10
- 0.05
0.10 MAX
0.05MIN 2.30 ± 0.2
2.70MAX
15.34 ± 0.2
15.74 MAX
(0.69) 0.38 ± 0.1
24-SOP-375
10.30 ± 0.3
#1 #12
#24 #13
1.27
Figure 14-4. 24-SOP-375 Package Dimensions
S3C9404/P9404/C9414/P9414 S3P9404/P9414 OTP
15-1
15 S3P9404/P9414 OTP
OVERVIEW
The S3P9404/P9414 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the
S3C9404/C9414 microcontroller. It has an on-chip OTP ROM instead of masked ROM. The EPROM is accessed
by serial data format.
The S3P9404/P9414 is fully compatible with the S3C9404/C9414 , both in function and in pin configuration.
Because of its simple programming requirements, the S3P9404/P9414 is ideal for use as an evaluation chip for
the S3C9404/C9414 .
VSS/VSS
XIN
XOUT
VPP/TEST
P0.1
P0.0
P3.5/ADC5
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0
AVSS
AVref
VDD/VDD
P0.2/SCLK
P0.3/SDAT
P0.4
P0.5
P0.6
P0.7
P1.0/ZCD
P1.1/BUZ
P1.2/T0(PWM)
P1.3/CLO
P2.0/INT0
P2.1/INT1
P2.2/ADC6
P2.3/ADC7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
S3P9404
30-SDIP
(Top View)
NOTE:The bolds indicate an OTP pin name.
RESETRESET/RESET/
Figure 15-1. Pin Assignment Diagram (30-Pin SDIP Package)
S3P9404/P9414 OTP S3C9404/P9404/C9414/P9414
15-2
VSS/VSS
XIN
XOUT
VPP/TEST
P0.1
P0.0
NC
P3.5/ADC5
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0
AVSS
AVref
VDD/VDD
P0.2/SCLK
P0.3/SDAT
P0.4
P0.5
P0.6
P0.7
NC
P1.0/ZCD
P1.1/BUZ
P1.2/T0(PWM)
P1.3/CLO
P2.0/INT0
P2.1/INT1
P2.2/ADC6
P2.3/ADC7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
S3P9404
32-SOP
(Top View)
NOTE:The bolds indicate an OTP pin name.
RESETRESET/RESET/
Figure 15-2. Pin Assignment Diagram (32-Pin SOP Package)
S3C9404/P9404/C9414/P9414 S3P9404/P9414 OTP
15-3
VSS/VSS
XIN
XOUT
VPP/TEST
P0.1
P0.0
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0
VDD/VDD
P0.2/SCLK
P0.3/SDAT
P0.4
P0.5
P0.6
P1.0/ZCD
P1.1/BUZ
P1.2/T0(PWM)
P2.0/INT0
AVref
AVSS
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
S3P9414
24-SDIP
(Top View)
NOTE:The bolds indicate an OTP pin name.
RESETRESET/RESET/
Figure 15-3. Pin Assignment Diagram (24-Pin SDIP Package)
S3P9404/P9414 OTP S3C9404/P9404/C9414/P9414
15-4
VSS/VSS
XIN
XOUT
VPP/TEST
P0.1
P0.0
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0
VDD/VDD
P0.2/SCLK
P0.3/SDAT
P0.4
P0.5
P0.6
P1.0/ZCD
P1.1/BUZ
P1.2/T0(PWM)
P2.0/INT0
AVref
AVSS
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
S3P9414
24-SOP
(Top View)
NOTE:The bolds indicate an OTP pin name.
RESETRESET/RESET/
Figure 15-4. Pin Assignment Diagram (24-Pin SOP Package)
S3C9404/P9404/C9414/P9414 S3P9404/P9414 OTP
15-5
Table 15-1. Descriptions of Pins Used to Read/Write the EPROM
Main Chip During Programming
Pin Name Pin Name Pin No. I/O Function
P0.3 SDAT S3P9404: 28 (30)
S3P9414: 22 (22) I/O Serial data pin (output when reading, Input
when writing) Input and push-pull output
port can be assigned
P0.2 SCLK S3P9404: 29 (31)
S3P9414: 23 (23) I/O Serial clock pin (input only pin)
TEST VPP (TEST) 4IPower supply pin for EPROM cell writing
(indicates that OTP enters into the writing mode).
When 12.5 V is applied, OTP is in writing mode
and when 5 V is applied, OTP is in reading
mode. (Option)
RESET RESET 7IChip Initialization
VDD/VSS VDD/VSS S3P9404: 30 (32) / 1
S3P9414: 24 (24) / 1 ILogic power supply pin.
NOTE: ( ) means the SOP OTP pin number.
Table 15-2. Comparison of S3P9404/P9414and S3C9404/C9414 Features
Characteristic S3P9404/P9414 S3C9404/C9414
Program Memory 4-Kbyte EPROM 4-Kbyte mask ROM
Operating Voltage (VDD)2.7 V to 5.5 V 2.7 V to 5.5 V
OTP Programming Mode VDD = 5 V, VPP (TEST) = 12.5 V
Pin Configuration 30 SDIP/32 SOP/24 SDIP/24 SOP
EPROM Programmability User Program 1 time Programmed at the factory
OPERATING MODE CHARACTERISTICS
When 12.5 V is supplied to the VPP (TEST) pin of the S3P9404/P9414, the EPROM programming mode is
entered. The operating mode (read, write, or read protection) is selected according to the input signals to the pins
listed in Table 15-3 below.
Table 15-3. Operating Mode Selection Criteria
VDD VPP
(TEST) REG/MEMMEM ADDRESS
(A15-A0) R/WMODE
5 V 5 V 00000H 1EPROM read
12.5 V 00000H 0EPROM program
12.5 V 00000H 1EPROM verify
12.5 V 10E3FH 0EPROM read protection
NOTE: "0" means Low level; "1" means High level.
S3P9404/P9414 OTP S3C9404/P9404/C9414/P9414
15-6
NOTES
