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FDMS86263P P-Channel PowerTrench(R) MOSFET -150 V, -22 A, 53 m Features General Description Max rDS(on) = 53 m at VGS = -10 V, ID = -4.4 A Max rDS(on) = 64 m at VGS = -6 V, ID = -4 A Very low Rds-on in Mid-Voltage P-Channel silicon technology optimized for low Qg This P-Channel MOSFET is produced using Fairchild Semiconductor`s advanced PowerTrench(R) technology. This very high density process is especially tailored to minimize on-state resistance and optimized for superior switching performance. This product is optimised for fast switching applications as well as load switch applications Applications 100% UIL tested Active Clamp Switch RoHS Compliant Load Switch Bottom Top Pin 1 S D D D S S G D S D S D S D G D Power 56 MOSFET Maximum Ratings TA = 25 C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current -Continuous TC = 25 C -Continuous TA = 25 C ID TJ, TSTG 25 V (Note 1a) -4.4 A -70 Single Pulse Avalanche Energy PD Units V -22 -Pulsed EAS Ratings -150 (Note 3) Power Dissipation TC = 25 C Power Dissipation TA = 25 C 384 104 (Note 1a) Operating and Storage Junction Temperature Range 2.5 -55 to +150 mJ W C Thermal Characteristics RJC Thermal Resistance, Junction to Case RJA Thermal Resistance, Junction to Ambient 1.2 (Note 1a) 50 C/W Package Marking and Ordering Information Device Marking FDMS86263P Device FDMS86263P (c)2014 Fairchild Semiconductor Corporation FDMS86263P Rev.C2 Package Power 56 1 Reel Size 13 '' Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMS86263P P-Channel PowerTrench(R) MOSFET October 2014 Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = -250 A, VGS = 0 V BVDSS TJ Breakdown Voltage Temperature Coefficient ID = -250 A, referenced to 25 C IDSS Zero Gate Voltage Drain Current VDS = -120 V, VGS = 0 V -1 A IGSS Gate to Source Leakage Current VGS = 25 V, VDS = 0 V 100 nA -4 V -150 V -116 mV/C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = -250 A VGS(th) TJ Gate to Source Threshold Voltage Temperature Coefficient ID = -250 A, referenced to 25 C rDS(on) Static Drain to Source On Resistance gFS Forward Transconductance -2 -2.9 7 mV/C VGS = -10 V, ID = -4.4 A 42 53 VGS = -6 V, ID = -4 A 45 64 VGS = -10 V, ID = -4.4 A,TJ = 125 C 71 94 VDS = -10 V, ID = -4.4 A 19 m S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = -75 V, VGS = 0 V, f = 1 MHz 0.1 2935 3905 pF 238 315 pF 11 20 pF 2.7 5.4 Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg Total Gate Charge VGS = 0 V to -10 V Qg Total Gate Charge VGS = 0 V to -6 V Qgs Gate to Source Charge Qgd Gate to Drain "Miller" Charge VDD = -75 V, ID = -4.4 A, VGS = -10 V, RGEN = 6 VDD = -75 V, ID = -4.4 A 17 31 ns 10 21 ns 37 59 ns 14 25 ns 45 63 nC 29 40 nC 11.3 nC 8.9 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = -4.4 A (Note 2) -0.79 -1.3 VGS = 0 V, IS = -2 A (Note 2) -0.75 -1.2 IF = -4.4 A, di/dt = 100 A/s V 91 146 ns 287 460 nC Notes: 1. RJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RJC is guaranteed by design while RCA is determined by the user's board design. a) 50 C/W when mounted on a 1 in2 pad of 2 oz copper b) 125 C/W when mounted on a minimum pad of 2 oz copper. SS SF DS DF G SS SF DS DF G 2. Pulse Test: Pulse Width < 300 s, Duty cycle < 2.0%. 3. Starting TJ = 25 C; P-ch: L = 3 mH, IAS = -16 A, VDD = -150 V, VGS = -10 V. 100% test at L = 0.1 mH, IAS = -52 A. (c)2014 Fairchild Semiconductor Corporation FDMS86263P Rev.C2 2 www.fairchildsemi.com FDMS86263P P-Channel PowerTrench(R) MOSFET Electrical Characteristics TJ = 25 C unless otherwise noted 4 -ID, DRAIN CURRENT (A) VGS = -10 V NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 70 VGS = -6 V 56 VGS = -5.5 V 42 VGS = -5 V 28 14 0 VGS = -4.5 V 0 1 PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX 2 3 4 5 VGS = -4.5 V 3 VGS = -5 V 2 VGS = -5.5 V 1 0 0 14 Figure 1. On Region Characteristics 140 rDS(on), DRAIN TO 1.8 1.6 1.4 1.2 1.0 0.8 0.6 SOURCE ON-RESISTANCE (m) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE ID = -4.4 A VGS = -10 V 0.4 -75 -25 0 25 50 75 70 ID = -4.4 A 100 TJ = 125 oC 80 60 TJ = 25 oC 40 100 125 150 3 4 5 6 7 8 9 10 -VGS, GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE (oC) Figure 4. On-Resistance vs Gate to Source Voltage Figure 3. Normalized On Resistance vs Junction Temperature 100 -IS, REVERSE DRAIN CURRENT (A) 70 PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX -ID, DRAIN CURRENT (A) 56 PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX 120 20 -50 42 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 2.2 56 VDS = -10 V 42 TJ = 150 oC 28 TJ = 25 oC 14 TJ = -55 oC 0 28 VGS = -10 V -ID, DRAIN CURRENT (A) -VDS, DRAIN TO SOURCE VOLTAGE (V) 2.0 VGS = -6 V PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX 2 3 4 5 VGS = 0 V 10 TJ = 150 oC 1 TJ = 25 oC 0.1 0.01 TJ = -55 oC 0.001 0.0 6 0.2 0.4 0.6 0.8 1.0 -VGS, GATE TO SOURCE VOLTAGE (V) -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current (c)2014 Fairchild Semiconductor Corporation FDMS86263P Rev.C2 3 1.2 www.fairchildsemi.com FDMS86263P P-Channel PowerTrench(R) MOSFET c Typical Characteristics TJ = 25 C unless otherwise noted 10000 Ciss VDD = -50 V ID = -4.4 A 8 VDD = -75 V CAPACITANCE (pF) -VGS, GATE TO SOURCE VOLTAGE (V) 10 6 VDD = -100 V 4 1000 Coss 100 Crss 10 2 f = 1 MHz VGS = 0 V 0 0 10 20 30 40 1 0.1 50 1 Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics 40 o RJC = 1.2 C/W -ID, DRAIN CURRENT (A) -IAS, AVALANCHE CURRENT (A) 100 Figure 8. Capacitance vs Drain to Source Voltage 100 TJ = 25 oC TJ = 100 oC 10 TJ = 125 oC 1 0.001 0.01 0.1 1 10 30 20 VGS = -10 V Limited by Package VGS = -6 V 10 0 25 100 50 75 100 125 150 o TC, CASE TEMPERATURE ( C) tAV, TIME IN AVALANCHE (ms) Figure 9. Unclamped Inductive Switching Capability Figure 10. Maximum Continuous Drain Current vs Case Temperature 200 30000 P(PK), PEAK TRANSIENT POWER (W) 10 s 100 -ID, DRAIN CURRENT (A) 10 -VDS, DRAIN TO SOURCE VOLTAGE (V) SINGLE PULSE RJC = 1.2 oC/W 10000 100 s 10 THIS AREA IS LIMITED BY rDS(on) 1 ms SINGLE PULSE TJ = MAX RATED 1 RJC = 1.2 oC/W o TC = 25 C 10 ms CURVE BENT TO MEASURED DATA DC 0.1 1 10 100 400 -VDS, DRAIN to SOURCE VOLTAGE (V) 1000 100 50 -5 10 -4 10 -3 10 -2 10 -1 10 1 t, PULSE WIDTH (sec) Figure 12. Single Pulse Maximum Power Dissipation Figure 11. Forward Bias Safe Operating Area (c)2014 Fairchild Semiconductor Corporation FDMS86263P Rev.C2 TC = 25 oC 4 www.fairchildsemi.com FDMS86263P P-Channel PowerTrench(R) MOSFET Typical Characteristics TJ = 25 C unless otherwise noted r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 2 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 NOTES: ZJC(t) = r(t) x RJC RJC = 1.2 oC/W Peak TJ = PDM x ZJC(t) + TC Duty Cycle, D = t1 / t2 SINGLE PULSE 0.01 0.005 -5 10 -4 10 -3 -2 10 10 -1 10 1 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Case Transient Thermal Response Curve (c)2014 Fairchild Semiconductor Corporation FDMS86263P Rev.C2 5 www.fairchildsemi.com FDMS86263P P-Channel PowerTrench(R) MOSFET Typical Characteristics TJ = 25 C unless otherwise noted PQFN8 5X6, 1.27P CASE 483AE ISSUE A 5.10 PKG CL 8 5.10 3.91 A SEE DETAIL B B 5 1.27 8 7 6 5 0.77 4.52 PKG CL 5.85 5.65 6.15 3.75 6.61 KEEP OUT AREA 1.27 1 4 1 TOP VIEW 2 3 4 0.61 1.27 3.81 OPTIONAL DRAFT ANGLE MAY APPEAR ON FOUR SIDES OF THE PACKAGE SEE DETAIL C 5.00 4.80 LAND PATTERN RECOMMENDATION 0.35 0.15 0.10 C 0.05 0.00 SIDE VIEW 8X 0.08 C 5.20 4.80 1.10 0.90 3.81 0.35 0.15 DETAIL C SCALE: 2:1 1.27 0.51 (8X) 0.31 (0.34) 0.10 1 2 3 C A B 4 0.76 0.51 (0.52) 6.25 5.90 3.48+0.30 -0.10 (0.50) (0.30) (2X) 8 0.20+0.10 -0.15 (8X) 7 6 3.96 3.61 BOTTOM VIEW 0.30 0.05 5 C SEATING PLANE DETAIL B SCALE: 2:1 NOTES: UNLESS OTHERWISE SPECIFIED A. PACKAGE STANDARD REFERENCE: JEDEC MO-240, ISSUE A, VAR. AA,. B. DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH. MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM. C. ALL DIMENSIONS ARE IN MILLIMETERS. D. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-2009. E. IT IS RECOMMENDED TO HAVE NO TRACES OR VIAS WITHIN THE KEEP OUT AREA. ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor's product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. "Typical" parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. 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