IRFR2405PbF
IRFU2405PbF
HEXFET® Power MOSFET
Seventh Generation HEXFET® Power MOSFETs from
International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance per
silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that
HEXFET power MOSFETs are well known for, provides
the designer with an extremely efficient and reliable
device for use in a wide variety of applications.
The D-Pak is designed for surface mounting using
vapor phase, infrared, or wave soldering techniques.
The straight lead version (IRFU series) is for through-
hole mounting applications. Power dissipation levels
up to 1.5 watts are possible in typical surface mount
applications.
S
D
G
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 56
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 40A
IDM Pulsed Drain Current 220
PD @TC = 25°C Power Dissipation 110 W
Linear Derating Factor 0.71 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy130 mJ
IAR Avalanche Current34 A
EAR Repetitive Avalanche Energy11 mJ
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case ) °C
Absolute Maximum Ratings
VDSS = 55V
RDS(on) = 0.016Ω
ID = 56A
Description
12/03/04
www.irf.com 1
lSurface Mount (IRFR2405)
lStraight Lead (IRFU2405)
lAdvanced Process Technology
lDynamic dv/dt Rating
lFast Switching
lFully Avalanche Rated
lLead-Free
PD - 95369A
D-Pak I-Pak
IRFR2405 IRFU2405
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.4
RθJA Junction-to-Ambient (PCB mount)* –– – 50 °C/W
RθJA Junction-to-Ambient ––– 110
Thermal Resistance
* When mounted on 1" square PCB (FR-4 or G-10 Material) .
For recommended footprint and soldering techniques refer to application note #AN-994
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IRFR/U2405OPbF
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 55 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient ––– 0.052 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– 0.0118 0.016 ΩVGS = 10V, ID = 34A
VGS(th) Gate Threshold Voltage 2. 0 – –– 4. 0 V VDS = 10V, ID = 250µA
gfs Forward Transconductance 30 ––– ––– S VDS = 25V, ID = 34A
––– ––– 20 µA VDS = 55V, VGS = 0V
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 200 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -200 nA VGS = -20V
QgTotal Gate Charge ––– 70 1 1 0 ID = 34A
Qgs Gate-to-Source Charge ––– 16 23 nC VDS = 44V
Qgd Gate-to-Drain ("Miller") Charge ––– 19 29 VGS = 10V
td(on) Turn-On Delay Time ––– 15 ––– VDD = 28V
trRise Time ––– 130 – –– ID = 34A
td(off) Turn-Off Delay Time ––– 55 ––– RG = 6.8 Ω
tfFall Time ––– 78 ––– VGS = 10V
Between lead,
––– ––– 6mm (0.25in.)
from package
and center of die contact
Ciss Input Capacitance ––– 2430 ––– VGS = 0V
Coss Output Capacitance ––– 470 ––– pF VDS = 25V
Crss Reverse Transfer Capacitance –– – 100 ––– ƒ = 1.0MHz, See Fig. 5
Coss Output Capacitance ––– 2040 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance ––– 350 ––– VGS = 0V, VDS = 44V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 350 ––– VGS = 0V, VDS = 0V to 44V
nH
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
LDInternal Drain Inductance
LSInternal Source Inductance ––– –––
S
D
G
IGSS
ns
4.5
7.5
IDSS Drain-to-Source Leakage Current
Repetitive rating; pulse width limited by
max. junction temperature.
ISD ≤ 34A, di/dt ≤ 190A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Notes:
Starting TJ = 25°C, L = 0.22mH
RG = 25 Ω, IAS = 34A.
Pulse width ≤ 300µs; duty cycle ≤ 2%.
S
D
G
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode) ––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V T J = 25°C, IS = 34A, VGS = 0V
trr Reverse Recovery Time ––– 62 93 n s T J = 25°C, IF = 34A
Qrr Reverse RecoveryCharge ––– 17 0 260 nC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Source-Drain Ratings and Characteristics
56
220
A
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 30A
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IRFR/U2405PbF
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
10
100
1000
0.1 1 10 100
20µs PU LSE WIDTH
T = 25 C
J°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
10
100
1000
0.1 1 10 100
20µs PU LSE WIDTH
T = 175 C
J°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
10
100
1000
4.0 5.0 6.0 7.0 8.0 9.0 10.0
V = 2 5 V
20µs PULSE WIDTH
DS
V , Gate-to-Sou rce Voltage (V)
I , Drain-to-Source Current (A)
GS
D
T = 25 C
J°
T = 175 C
J°
-60 -40 -20 020 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
10V
56A
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IRFR/U2405OPbF
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
020 40 60 80 100
0
4
8
12
16
20
Q , Total Gate Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
34A
V = 11V
DS
V = 27V
DS
V = 44V
DS
1
10
100
1000
0.4 0.8 1.2 1.6 2.0 2.4
V ,Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 25 C
J°
T = 175 C
J°
1
10
100
1000
1 10 100
OPERATION IN THIS AREA LIMITED
BY RDS(on)
Single Pulse
T
T = 175 C
= 25 C
°°
J
C
V , Drain-to-Source Voltage (V)
I , Drain Current (A)I , Drain Current (A)
DS
D
10us
100us
1ms
10ms
1 10 100
0
800
1600
2400
3200
4000
V , Drain-to-Source Voltage (V)
C, Capacitance (pF)
DS
V
C
C
C
=
=
=
=
0V,
C
C
C
f = 1M Hz
+ C
+ C
C SHORTED
GS
iss gs gd , ds
rss gd
oss ds gd
Ciss
Coss
Crss
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IRFR/U2405PbF
Fig 10a. Switching Time Test Circuit
V
DS
9
0%
1
0%
V
GS t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
VGS
+
-
VDD
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1
Notes:
1. D u ty fa c to r D = t / t
2. Peak T =P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Durati on (sec)
Thermal R esponse (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
25 50 75 100 125 150 175
0
10
20
30
40
50
60
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
LIMITED BY PACKAGE
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IRFR/U2405OPbF
QG
QGS QGD
V
G
Charge
D.U.T. VD
S
ID
IG
3mA
VGS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
15V
20V
25 50 75 100 125 150 175
0
40
80
120
160
200
240
Starting T , Junction Tempera ture ( C)
E , Single Puls e Avalanche Energy (m J)
J
AS
°
ID
TOP
BOTTOM
14A
24A
34A
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IRFR/U2405PbF
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
R
e-Applied
V
oltage
Reverse
Recovery
Current Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P.W.
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFET® Power MOSFETs
* VGS = 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
RG
VDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
*
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IRFR/U2405OPbF
D-Pak (TO-252AA) Part Marking Information
D-Pak (TO-252AA) Package Outline
12
IN THE AS SE MBLY LINE "A"
ASSEM BLED ON WW 16, 1999
EXAMPLE: WITH ASSEMBLY
THIS IS AN IRFR120
LOT COD E 1234 YEAR 9 = 199
9
DATE CODE
WEEK 16
PART NUMBER
LOGO
INTERNATIONAL
RECTIFIER
ASSEMBLY
LOT CODE
916A
IRFU120
34
YEAR 9 = 1999
DATE CODE
OR
P = DESIGN ATES LEAD -FREE
PROD UCT (OPTIONAL)
Note: "P" in assembly line position
indicates "L ead-F ree"
12 34
WEEK 16
A = ASSEMBLY SI T E CODE
PART NUMBER
IRFU120
LINE A
LOGO
LOT CODE
ASSEMBLY
INTERNATIONAL
RECTIFIER
www.irf.com 9
IRFR/U2405PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
ASSEMBLY
EXAMPLE: WITH ASSEMB LY
THIS IS AN IRFU120
YEAR 9 = 199
9
DATE C ODE
LINE A
WEEK 1 9
I N THE ASSEMBLY LINE "A"
ASSEMBLED ON WW 19, 1999
LOT CODE 5678
PART NUMB ER
56
IRFU120
INTERNATIONAL
LOGO
RECTIFIER
LOT CODE
919A
78
Note: "P" in as sembly line
position indicates "Lead-Free"
OR
56 78
AS S E MB L Y
LOT CODE
RECTIFIER
LOGO
INTERNATIONAL
IRFU120
PART NUMBER
WE EK 19
DATE CO DE
YEAR 9 = 1999
A = AS S EMB LY S IT E CODE
P = DESIGNATES LEAD-F REE
PRODUCT (OPTI ONAL)
10 www.irf.com
IRFR/U2405OPbF
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 12/04
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
12.1 ( .476 )
11.9 ( .469 ) FEED DIRE CTION FEED DIRE CTION
16.3 ( .641
)
15.7 ( .619
)
TRR TRL
N
OTES :
1
. CONTROLLING DIMENSION : MILLIMETER.
2
. ALL DIMENSIONS ARE SHOWN IN MILLIME TERS ( INCHES ).
3
. OUTLINE CONFORMS TO EIA-481 & EIA-541.
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
16 mm
13 INCH
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/