REJ03F0261-0100 Rev. 1.00 Jan.10. 2008 R8A66160DD/SP 16-BIT LED DRIVER WITH SHIFT REGISTER AND LATCH DESCRIPTION R8A66160 is a LED array driver having a 16-bit serial input and parallel output shift register function with direct coupled reset input and output latch function. This product guarantees the output current of 24mA (Vcc =5V case) which is sufficient for cathode common LED drive, capable of following 16-bits continuously at the same time. Parallel output is open drain output. In addition, as this product has been designed in complete CMOS, power consumption can be greatly reduced when compared with conventional BIPOLAR or Bi-CMOS products. Furthermore, pin layout ensures the realization of an easy printed circuit. R8A66160 is the succession product of M66310. FEATURES Cathode common LED drive VCC 5V or 3.3V single power supply High output current: all parallel outputs QA~QP IOH=-24mA (at VCC =5.0V) IOH=-12mA (at VCC =3.3V) simultaneous lighting available Low power dissipation: 100uW/package (max) (Vcc=5.0V, Ta=25oC, quiescent state) High noise margin: Schmitt input circuit provides responsiveness to a long line length Equipped with direct-coupled reset Open drain output: (except serial data output SQP) Wide operating temperature range: Ta=-40oC~+85oC Pin layout facilitates printed circuit wiring. (This layout facilitates cascade connection and LED connection) APPLICATION LED array drive, The various LED display modules PPC, Printer, VCR, Mini-compo, Button-Telephone etc. All of LED display equipment BLOCK DIAGRAM LOGIC DIAGRAM QC QD QE QF QG QH QI QJ QK QL QM QN QO QP SQP 2 24 23 22 21 20 19 18 17 16 15 14 13 11 12 10 Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R Q CK D R A ENABLE SERIAL INPUT DATA INPUT PARALLEL DATA OUTPUTS QAQP SERIAL DATA OUTPUT SQP OUTPUT FORMAT REJ03F0261-0100 Rev.1.00 Jan.10.2008 page 1 of 7 . S DATA signal OE signal S 4 Vcc 3 S S QB 1 S QA 5 OE SERIAL DATA OUTPUT PARALLEL DATA OUTPUTS 8 7 6 9 CKS R CKL GND SHIFT DIRECT LATCH CLOCK RESET CLOCK INPUT INPUT INPUT R8A66160DD/SP PIN CONFIGURATION ( TOP VIEW ) QA 1 QA QC 24 QC QB 2 QB QD 23 QD VCC 3 QE 22 QE SERIAL DATA INPUT A 4 A QF 21 QF ENABLE INPUT OE 5 OE QG 20 QG LATCH CLOCK INPUT CKL 6 CKL QH 19 QH DIRECT RESET INPUT R 7 R QI 18 QI SHIFT CLOCK INPUT CKS 8 CKS QJ 17 QJ GND 9 QK 16 QK SERIAL DATA OUTPUT SQP 10 SQP QL 15 QL PARALLEL DATA OUTPUTS QO 11 QO QM 14 QM QP 12 QP QN 13 QN PARALLEL DATA OUTPUTS PARALLEL DATA OUTPUTS FUNCTIONAL DESCRIPTION As R8A66160 uses silicon gate CMOS process. It realizes high-speed and high-output currents sufficient for LED drive while maintaining low power consumption and allowance for high noises. Each bit of a shift register consists of two flip-flop having independent clocks for shifting and latching. As for clock input, shift clock input CKS and latch clock input CKL are independent from each other, shift and latch operations being made when "L" changes to "H". Serial data input A is the data input of the first-step shift register and the signal of A shifts shifting registers one by one when a pulse is impressed to CKS. When A is "L", the signal of "L" shifts. When the pulse is impressed to CKL, the contents of the shifting register at that time are stored in a latching register, and they appear in the parallel data outputs from QA ~ QP. Outputs QA ~ QP are open drain outputs. To extend the number of bits, use the serial data output SQP which shows the output of the shifting register of the 16th bit. When reset input R is changed to "L", QA ~ QP and SQP are reset. In this case, shifting and latching register are reset. If "H" is impressed to output enable input OE, QA ~ QP reaches the high impedance state, but SQP does not reach the high impedance state. Furthermore, change in OE does not affect shift operation. FUNCTION TABLE (Note: 1) Input Operation mode Reset Shift t1 Shift Latch t2 Latch operation Shift t1 Latch t2 Output disable R CKS CKL L X X Parallel data output A X OE X QA Z QB QC QD Z Z Z QE Z QF Z QG QH Z Z L 0 QA 0 QB qA0 0 QE qD0 0 QF qE0 0 QG qF0 H X X L H H X L L H X X L QA Z X X X X H Z H X H 0 0 QC qB0 0 QD qC0 0 QH qG0 0 QI qH0 QJ Z QK QL QM Z Z Z QN QO Z Z 0 QJ qI 0 0 QK qJ 0 0 QN qM0 0 QL qK0 0 QM qL 0 0 QO 0 qN Z L 0 QP qO0 qO0 qO0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 QB QC QD QE QF QG QH QI QJ QK QL QM QN QO QP qO0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 qA qB qC qD qE qF qG qH qI qJ qK qL qM qN qO0 qO0 Z Z Z Z Z Z Z Note1: Change from low-level to high-level 0 Q Output state Q before CKL changed X Irrelevant q 0 Contents of shift register before CKS changed q Contents of shift register t1, t2 t2 is set after t1 is set Z High Impedance REJ03F0261-0100 Rev.1.00 Jan.10.2008 page 2 of 7 QI Z Serial data Remarks output QP SQP . Z Z Z Z Z Z Z Z qP Output lighting "H" Output lights-out "L" R8A66160DD/SP o ABSOLUTE MAXIMUM RATINGS (Ta=-40~+85 C, unless otherwise noted) Symbol VCC VI VO IO Parameter Conditions Ratings -0.5 ~ +7.0 -0.5 ~ VCC+0.5 -0.5 ~ VCC+0.5 -50 25 -410, +20 500 -65 ~+150 Supply voltage Input voltage Output voltage Output current per output pin QA ~ QP SQP ICC Supply / GND current VCC, GND Pd Power dissipation (Note 2) Tstg Storage temperature range Note 2: R8A66160SP; Ta=-40~+70oC, Ta=+70~+85oC are derated at -6mW/oC. Unit V V V mA mA mW o C o RECOMMENDED OPERATING CONDITIONS (Ta=-40~+85 C, unless otherwise noted) Symbol Parameter VCC Supply voltage VI VO Topr Input voltage Output voltage Operating temperature range REJ03F0261-0100 Rev.1.00 Jan.10.2008 page 3 of 7 Min. 4.5 3.0 0 0 -40 5.0V support 3.3V support . Limits Typ. 5.0 3.3 Max. 5.5 3.6 VCC VCC +85 Unit V V V V o C R8A66160DD/SP ELECTRICAL CHARACTERISTICS 5.0V version support specifications (Ta=-40~+85 C,Vcc=4.5V~5.5V, unless otherwise noted) o Symbol VT+ VT- VOH Parameter Test conditions Positive-going threshold voltage Negative-going threshold voltage High-level output voltage QA ~ QP Min. VO=0.1V, VCC-0.1V |IO|=20uA VO=0.1V, VCC-0.1V |IO|=20uA IOH= -20uA VI=VT+,VTVCC=4.5V IOH= -24mA (Note3) Limits Typ. Unit Max. 0.35xVCC 0.70xVCC V 0.20xVCC 0.55xVCC V VCC-0.1 V 3.66 IOH= -40mA 3.25 VOH High-level output voltage SQP VI=VT+,VTVCC=4.5V IOH= -20uA VCC-0.1 IOH= -4mA 3.66 VOL Low-level output voltage SQP VI=VT+,VTVCC=4.5V IOL= 20uA 0.10 IOL= 4mA 0.53 IIH High-level input current VI=VCC, VCC=5.5V IIL Low-level input current VI=GND, VCC=5.5V IO Maximum output leakage current VI=VT+,VTVCC=5.5V QA ~ QP V V 5 uA -5 uA VO=VCC 10 VO=GND -10 uA ICC Quiescent supply current VI=VCC,GND, VCC=5.5V 200 uA Note 3: R8A66160 is used under the condition of an output current IOH=-40mA, the number of simultaneous drive outputs is restricted as shown in the Duty Cycle - IOH of TYPICAL CHARACTERISTICS. 3.3V version support specifications (Ta=-40~+85 C,Vcc=3.0V~3.6V, unless otherwise noted) o Symbol VT+ VT- VOH Parameter Test conditions Positive-going threshold voltage Negative-going threshold voltage High-level output voltage QA ~ QP Min. VO=0.1V, VCC-0.1V |IO|=20uA VO=0.1V, VCC-0.1V |IO|=20uA IOH= -20uA VI=VT+,VTIOH= -12mA VCC=3.0V IOH= -20mA Limits Typ. Unit Max. 0.35xVCC 0.70xVCC V 0.20xVCC 0.55xVCC V VCC-0.1 V 2.34 2.08 VOH High-level output voltage SQP VI=VT+,VTVCC=3.0V IOH= -20uA VCC-0.1 IOH= -2mA 2.60 VOL Low-level output voltage SQP VI=VT+,VTVCC=3.0V IOL= 20uA 0.10 IOL= 2mA 0.40 IIH High-level input current VI=VCC, VCC=3.6V 5 uA IIL Low-level input current VI=GND, VCC=3.6V -5 uA IO Maximum output leakage current ICC Quiescent supply current QA ~ QP VI=VT+,VTVCC=3.6V VO=VCC 10 VO=GND -10 VI=VCC,GND, VCC=3.6V REJ03F0261-0100 Rev.1.00 Jan.10.2008 page 4 of 7 V 200 . V uA uA R8A66160DD/SP o SWITCHING CHARACTERISTICS (Ta=-40~+85 C,Vcc=5.0V or 3.3V) Symbol fmax tPLH tPHL tPHL tPHZ tPZH tPHZ tPZH tPHZ CI Test conditions Parameter Maximum clock frequency Output "L"-"H" and "H"-"L" propagation time Output "H"-"L" propagation time Output "H"-"Z" propagation time Output "Z"-"H" propagation time Output "H"-"Z" propagation time Output "Z"-"H" propagation time Output "H"-"Z" propagation time Input capacitance CKS - SQP 5.0V specification Min. Typ. Max. 4 125 125 3.3V specification Min. Typ. Max. 3.3 150 150 125 150 ns 200 220 ns 125 150 ns 200 220 ns 125 150 ns 200 220 ns 10 10 pF 5.0V specification Min. Typ. Max. 3.3V specification Min. Typ. Max. Unit R - SQP R - QA ~ QP (turned off) CKL - QA ~ QP (turned on) CKL - QA ~ QP (turned off) OE - QA ~ QP (turned on) OE - QA ~ QP (turned off) CL=50pF RL=1K (Note 4) Unit MHz ns ns o TIMING REQUIREMENTS (Ta=-40~+85 C,Vcc=5.0V or 3.3V) Symbol Test conditions Parameter tw CKS, CKL, R pulse width tsu A setup time with respect to CKS tsu CKS setup time with respect to CKL th A hold time with respect to CKS R recovery time with respect to CKS, CKL trec (Note 4) 125 150 ns 125 150 ns 125 150 ns 15 20 ns 70 80 ns Note4 : Test Circuit INPUT VCC QAQP DUT PG 50 SQP GND CL RL CL (1) The pulse generator (PG) has the following characteristics (10%~90%) : tr=6ns,tf=6ns (2) The capacitance CL includes stray wiring capacitance and the probe input capacitance. REJ03F0261-0100 Rev.1.00 Jan.10.2008 page 5 of 7 . R8A66160DD/SP TYPICAL CHARACTERISTICS Repetition frequency 10Hz Numbers in indicate the number of output circuits that operate simultaneously. Current values are per circuit. Duty Cycle-IOH Characteristics Duty Cycle-IOH Characteristics From top () to bottom IOH(mA) IOH(mA) Vcc=4.5V, Ta25 Vcc=4.5V, Ta85 020406080100 0 20 Duty Cycle (%) 40 60 80 100 Duty Cycle (%) TIMING DIAGRAM tw VCC VCC CKS 50% 50% CKL 50% tPLH tPHL 50% 50% 50% GND GND tPZH VOH SQP VOL VOH QA QP 50% tPHZ tw VCC 50% R 50% trec GND VCC CKS 50% VCC GND tPHL 50% A tsu VOH VOL tPHZ GND th VCC 50% 50% tPZH 50% GND VCC CKS 50% GND GND tPHZ 50% VCC CKS VOH 90% QA QP QA QP 50% 50% SQP OE VOH 90% QA QP 90% tsu VOH VCC 50% CKL REJ03F0261-0100 Rev.1.00 Jan.10.2008 page 6 of 7 tw 50% GND . R8A66160DD/SP PACKAGE OUTLINE Product name R8A66160DD R8A66160SP Package 24pin DIP 24pin SOP RENESAS Code PRDP0024AF-A PRSP0024DF-A All trademarks and registered trademarks are the property of their respective owners. REJ03F0261-0100 Rev.1.00 Jan.10.2008 page 7 of 7 . Previous Code 24P4X-A 24P2X-B