below. Any Data Sheet Clarification issues related to

the PIC18F1230/1330 will be reported in a separate

for any existing issues.

Insert a NOP instruction between reading/writing

CMCON and clearing the CMPxIF flag.

All engineering and production devices.

0xFF.

time that firmware writes to TXREG.

In rare situations when interrupts are enabled,

• The EUSART is disabled (the SPEN bit,

RCSTA <7> = 0)

• The EUSART is re-enabled (RCSTA <7> = 1)

• A two-cycle instruction is executed

Add a 2 TCY delay after re-enabling the EUSART.

1. Disable receive interrupts (RCIE bit,

All engineering and production devices.

OTHERWISE, RELATED TO THE INFORMATION,

The Microchip name and logo, the Microchip logo, Accuron,

dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICm icro,

PICSTA RT, rfPIC, SmartShunt and UNI/O are registered

trademarks of Microchip Technology Incorporated in the

U.S.A. and other countries.

Endurance, WiperLock and ZENA are trademarks of

Microchip Technology Incorporated in the U.S.A. and other

in the U.S.A.

• Microchip believes that it s family of products is one of the most secure families of its kind on the market today, when used in the

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

Code protection is c onstantly evolving. We a t Microc hip are co m mitted to continuously improving the code prot ect ion featur es of our

products. Attempts to break Microchip’ s code protection feature may be a violation of the Digital Millennium Copyright Act. If such act s