IRFF9130 - Intersil Corporation - Datasheet.Directory

4-101

File Number 2216.3

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

IRFF9130

-6.5A, -100V, 0.300 Ohm, P-Channel Power

MOSFET

This P-Channel enhancement mode silicon gate power ﬁeld

effect transistor is an advanced power MOSFET designed,

tested, and guaranteed to withstand a speciﬁed level of

energy in the breakdown avalanche mode of operation. All of

these power MOSFETs are designed for applications such

as switching regulators, switching convertors, motor drivers,

relay drivers, and drivers for high power bipolar switching

transistors requiring high speed and low gate drive power.

These types can be operated directly from integrated

circuits.

Formerly developmental type TA17511.

Features

• -6.5A, -100V

•r

DS(ON) = 0.300Ω

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

Symbol

Packaging

JEDEC TO-205AF

Ordering Information

PART NUMBER PACKAGE BRAND

IRFF9130 TO-205AF IRFF9130

NOTE: When ordering, include the entire part number.

SOURCE

DRAIN

(CASE)

GATE

Data Sheet February 1999

4-102

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Speciﬁed IRFF9130 UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS -100 V

Drain to Gate Voltage (RGS = 20MΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR -100 V

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID-6.5 A

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM -26 A

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±20 V

Maximum Power Dissipation (Figure 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD25 W

Linear Derating Factor (Figure 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2 W/oC

Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 500 mJ

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL300 oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTE:

1. TJ = 25oC to 125oC.

Electrical Speciﬁcations TC = 25oC, Unless Otherwise Speciﬁed

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BVDSS VGS = 0V, ID = -250µA, (Figure 10) -100 - - V

Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = -250µA -2.0 - -4.0 V

Zero-Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - -25 µA

VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC - - -250 µA

On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = -10V -6.5 - - A

Gate to Source Leakage IGSS VGS = ±20V - - ±100 nA

Drain to Source On Resistance (Note 2) rDS(ON) VGS = -10V, ID = -3A, (Figures 8, 9) - 0.25 0.300 Ω

Forward Transconductance (Note 2) gfs VDS ≥ ID(ON) x rDS(ON)MAX, ID = -3A,

(Figure 12) 2.5 3.5 - S

Turn-On Delay Time td(ON) VDD = 0.5 x Rated BVDSS, ID≈ -6.5A, RG = 9.1Ω,

RL = 7.4Ω for BVDSS = -100V

RL =5.8Ω for BVDSS = -80V

(Figures 17, 18) MOSFET Switching Times are Es-

sentially Independent of Operating Temperature

-3060ns

Rise Time tr- 70 140 ns

Turn-Off Delay Time td(OFF) - 70 140 ns

Fall Time tf- 70 140 ns

Total Gate Charge

(Gate to Source + Gate to Drain) Qg(TOT) VGS = -10V, ID = -6.5A, VDS = 0.8 x Rated BVDSS,

IG(REF) = -1.5mA, (Figures 14, 19, 20)

Gate Charge is Essentially Independent of

Operating Temperature

-2545nC

Gate to Source Charge Qgs -13-nC

Gate to Drain “Miller” Charge Qgd -12-nC

Input Capacitance CISS VGS = 0V, VDS = -25V, f = 1.0MHz, (Figure 11) - 500 - pF

Output Capacitance COSS - 300 - pF

Reverse-Transfer Capacitance CRSS - 100 - pF

Internal Drain Inductance LDMeasured From the

Drain Lead, 5mm (0.2in)

From Package to Center

of Die

Modified MOSFET Sym-

bol Showing the Internal

Devices

Inductances

- 5.0 - nH

Internal Source Inductance LSMeasured From The

Source Lead, 5mm

(0.2in) From Header to

Source Bonding Pad

-15-nH

Junction to Case RθJC - - 5.0 oC/W

Junction to Ambient RθJA Typical Socket Mount - - 175 oC/W

IRFF9130

4-103

Source to Drain Diode Speciﬁcations

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current ISD Modified MOSFET

Symbol Showing the In-

tegral Reverse

P-N Junction Diode

- - -6.5 A

Pulse Source to Drain Current

(Note 3) ISDM - - -26 A

Source to Drain Diode Voltage (Note 2) VSD TC = 25oC, ISD = 6.5A, VGS = 0V (Figure 13) - - -1.5 V

Reverse Recovery Time trr TJ = 150oC, ISD = 6.5A, dISD/dt = 100A/µs - 300 - ns

Reverse Recovered Charge QRR TJ = 150oC, ISD = 6.5A, dISD/dt = 100A/µs - 1.8 - µC

NOTES:

2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.

3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. VDD = 25V, starting TJ = 25oC, L = 17.75mH, RG = 25Ω, peak IAS = 6.5A. (Figures 15, 16).

Typical Performance Curves Unless Otherwise Speciﬁed

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

TC, CASE TEMPERATURE (oC)

POWER DISSIPATION MULTIPLIER

00 25 50 75 100 150

0.2

0.4

0.6

0.8

1.0

1.2

125 TC, CASE TEMPERATURE (oC)

50 75 10025 150

-7.0

-5.6

-4.2

-2.8

ID, DRAIN CURRENT (A)

-1.4

125

t1, RECTANGULAR PULSE DURATION (s)

ZθJC, NORMALIZED

THERMAL IMPEDANCE

10-3 10-2

10-5 10-4

0.01

0.1

10-1 1

PDM

NOTES:

DUTY FACTOR: D = t1/t2

PEAK TJ = PDM x ZθJC x RθJC + TC

t1t2

SINGLE PULSE

0.1

0.02

0.2

0.5

0.01

0.05

IRFF9130

4-104

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

Typical Performance Curves Unless Otherwise Speciﬁed (Continued)

102

110

100

OPERATION IN THIS REGION

IS LIMITED BY rDS(ON)

0.1

ID, DRAIN CURRENT (A)

VDS, DRAIN TO SOURCE VOLTAGE (V)

TJ = MAX RATED

10µs

100µs

1ms

RJC = 5.0oC/W

SINGLE PULSE

TC = 25oC10ms

100ms

VDS, DRAIN TO SOURCE VOLTAGE (V)

-10 -20 -30 -400 -50

-20

-16

-12

-8

ID, DRAIN CURRENT (A)

VGS = -10V VGS = -8V

VGS = -6V

VGS = -7V

VGS = -5V

VGS = -4V

PULSE DURATION = 80µs

-4

VGS = -9V

VDS, DRAIN TO SOURCE VOLTAGE (V)

-1 -2 -3 -40-5

-10

-8

-6

-4

ID, DRAIN CURRENT (A)

VGS = -10V

VGS = -8V

VGS = -6V

VGS = -5V

VGS = -4V

PULSE DURATION = 80µs

-2

VGS = -9V VGS = -7V

-20

ID(ON), ON-STATE DRAIN CURRENT (A)

VGS, GATE TO SOURCE VOLTAGE (V)

-16

-12

-8

0-8-6-4-20 -10

TJ = 25oC

TJ = -55oC

-4

PULSE DURATION = 80µs

VDS >ID(ON) x rDS(ON) MAX

TJ = 125oC

-40

ID, DRAIN CURRENT (A)

-10 -20 -300 -50

1.0

0.8

0.6

0.4

rDS(ON), DRAIN TO SOURCE

VGS = -20V

0.2

VGS = -10V

ON RESISTANCE

PULSE DURATION = 2µs2.2

1.4

0.6

80-40 TJ, JUNCTION TEMPERATURE (oC)

NORMALIZED DRAIN TO SOURCE

1.8

1.0

0.2 0 40 120 160

ON RESISTANCE VOLTAGE

VGS = -10V

ID = -3A

IRFF9130

4-105

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

Typical Performance Curves Unless Otherwise Speciﬁed (Continued)

1.25

1.05

0.85

80-40 TJ, JUNCTION TEMPERATURE (oC)

NORMALIZED DRAIN TO SOURCE

1.15

0.95

0.75 0 40 120 160

BREAKDOWN VOLTAGE

ID = 250µA

0 -10 -20 -30 -40 -50

C, CAPACITANCE (pF)

VDS, DRAIN TO SOURCE VOLTAGE (V)

1000

800

600

400

200

CRSS

CISS

COSS

VGS = 0V, f = 1MHz

CISS = CGS + CGD

CRSS = CGD

COSS ≈ CDS + CGD

ID, DRAIN CURRENT (A)

-4 -8 -12 -160 -20

gfs, TRANSCONDUCTANCE (S)

PULSE DURATION = 80µs

TJ = 125oC

TJ = 25oC

TJ = -55oC

TJ = 150oC

TJ = 25oC

ISD, SOURCE TO DRAIN CURRENT (A)

VSD, SOURCE TO DRAIN VOLTAGE (V)

-100

-10

-1

-0.1

-0.4 -0.6 -0.8 -1.0 -1.2 -1.8

-1.4 -1.6

Qg(TOT), TOTAL GATE CHARGE (nC)

8162432040

-25

-20

-15

-10

VGS, GATE TO SOURCE VOLTAGE (V)

-5

VDS = -20V

ID = -6.5A

VDS = -50V

VDS = -80V

IRFF9130

4-106

Test Circuits and Waveforms

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

0.01Ω

IAS

VDS

VDD

DUT

VARY tP TO OBTAIN

REQUIRED PEAK IAS

VGS

VDD

VDS

BVDSS

IAS

tAV

VGS

DUT

-VDD

td(ON)

90%

10%

VDS 90%

td(OFF)

tOFF

90%

50%

10%

PULSE WIDTH

VGS

tON

10%

0.3µF

12V

BATTERY 50kΩ

+VDS

DUT

IG(REF)

(ISOLATED

-VDS

0.2µF

CURRENT

REGULATOR

ID CURRENT

SAMPLING

IG CURRENT

SAMPLING

SUPPLY)

RESISTOR RESISTOR

DUT

Qg(TOT)

Qgd

Qgs

VDS

VGS

VDD

IG(REF)

IRFF9130

4-107

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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-

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IRFF9130