2SK3453
2011-05-06
1
TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (π-MOSIV)
2SK3453
Switching Regulator Applications
• Low drain-source ON-resistance: RDS (ON) = 0.72 Ω (typ.)
• High forward transfer admittance: |Yfs| = 7.0 S (typ.)
• Low leakage current: IDSS = 100 μA (max) (VDS = 700 V)
• Enhancement model: Vth = 2.0 to 4.0 V (VDS = 10 V, ID = 1 mA)
Absolute Maximum Ratings (Ta = 25°C)
Characteristics Symbol Rating Unit
Drain-source voltage VDSS 700 V
Drain-gate voltage (RGS = 20 kΩ) VDGR 700 V
Gate-source voltage VGSS ±30 V
DC (Note 1) ID 10
Drain current
Pulse (Note 1) IDP 30
A
Drain power dissipation (Tc = 25°C) PD 80 W
Single pulse avalanche energy
(Note 2)
EAS 420 mJ
Avalanche current IAR 10 A
Repetitive avalanche energy (Note 3) EAR 8 mJ
Channel temperature Tch 150 °C
Storage temperature range Tstg −55 to 150 °C
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e.
operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate
reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and
Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).
Thermal Characteristics
Characteristics Symbol Max Unit
Thermal resistance, channel to case Rth (ch-c) 1.56 °C/W
Thermal resistance, channel to ambient Rth (ch-a) 41.6 °C/W
Note 1: Ensure that the channel temperature does not exceed 150°C.
Note 2: VDD = 90 V, Tch = 25°C (initial), L = 7.5 mH, RG = 25 Ω, IAR = 10 A
Note 3: Repetitive rating: pulse width limited by maximum channel temperature
This transistor is an electrostatic-sensitive device. Please handle with caution.
Unit: mm
JEDEC ―
JEITA ―
TOSHIBA 2-16F1B
Weight: 5.8 g (typ.)
2SK3453
2011-05-06
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Electrical Characteristics (Ta = 25°C)
Characteristics Symbol Test Condition Min Typ. Max Unit
Gate leakage current IGSS V
GS = ±25 V, VDS = 0 V ⎯ ⎯ ±10 μA
Gate-source breakdown voltage V (BR) GSS IG = ±10 μA, VDS = 0 V ±30 ⎯ ⎯ V
Drain cut-OFF current IDSS V
DS = 700 V, VGS = 0 V ⎯ ⎯ 100 μA
Drain-source breakdown voltage V (BR) DSS ID = 10 mA, VGS = 0 V 700 ⎯ ⎯ V
Gate threshold voltage Vth V
DS = 10 V, ID = 1 mA 2.0 ⎯ 4.0 V
Drain-source ON resistance RDS (ON) V
GS = 10 V, ID = 5 A ⎯ 0.72 1.0 Ω
Forward transfer admittance ⎪Yfs⎪ V
DS = 10 V, ID = 5 A 4.0 7.0 ⎯ S
Input capacitance Ciss ⎯ 1700 ⎯
Reverse transfer capacitance Crss ⎯ 40 ⎯
Output capacitance Coss
VDS = 25 V, VGS = 0 V, f = 1 MHz
⎯ 200 ⎯
pF
Rise time tr ⎯ 40 ⎯
Turn-ON time ton ⎯ 72 ⎯
Fall time tf ⎯ 42 ⎯
Switching time
Turn-OFF time toff
⎯ 145 ⎯
ns
Total gate charge
(gate-source plus gate-drain) Qg ⎯ 53 ⎯
Gate-source charge Qgs ⎯ 25 ⎯
Gate-drain (“miller”) charge Qgd
VDD ≈ 400 V, VGS = 10 V, ID = 10 A
⎯ 28 ⎯
nC
Source-Drain Ratings and Characteristics (Ta = 25°C)
Characteristics Symbol Test Condition Min Typ. Max Unit
Continuous drain reverse current (Note 1) IDR ⎯ ⎯ ⎯ 10 A
Pulse drain reverse current (Note 1) IDRP ⎯ ⎯ ⎯ 30 A
Forward voltage (diode) VDSF I
DR = 10 A, VGS = 0 V ⎯ ⎯ −1.9
V
Reverse recovery time trr ⎯ 1400 ⎯ ns
Reverse recovery charge Qrr
IDR = 10 A, VGS = 0 V,
dIDR/dt = 100 A/μs ⎯ 17.5 ⎯ μC
Marking
Duty ≤ 1%, tw = 10 μs
0 V
10 V
VGS
RL = 40 Ω
VDD ≈ 200 V
ID = 5 A VOUT
4.7 Ω
K3453
TOSHIBA
Lot No.
Note 4
Part No. (or abbreviation code)
Note 4: A line under a Lot No. identifies the indication of product
Labels.
Not underlined: [[Pb]]/INCLUDES > MCV
Underlined: [[G]]/RoHS COMPATIBLE or [[G]]/RoHS [[Pb]]
Please contact your TOSHIBA sales representative for details as to
environmental matters such as the RoHS compatibility of Product.
The RoHS is the Directive 2002/95/EC of the European Parliament
and of the Council of 27 January 2003 on the restriction of the use of
certain hazardous substances in electrical and electronic equipment.
2SK3453
2011-05-06
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ID − VDS
ID − VDS
ID − VGS
VDS − VGS
⎪Yfs⎪ − ID
RDS (ON) − ID
Drain-source voltage VDS (V)
Drain-source voltage VDS (V)
Gate-source voltage VGS (V)
Gate-source voltage VGS (V)
Drain current ID (A)
Drain current ID (A)
Drain current ID (A)
Drain current ID (A)
Drain-source voltage VDS (V)
Drain current ID (A)
Drain-source ON-resistance
RDS (ON) (Ω)
Forward transfer admittance ⎪Yfs⎪ (S)
0 2 4 8 6 10
0
4
8
12
16
20
100
Tc = −55°C
25
Common source
VDS = 20 V
Pulse test 16
0
4
8
12
20
2.5
5
048 16 12 20
Common source
Tc = 25°C
Pulse test
ID = 10 A
50
0.1
3
0.1 3100
100
Tc = −55°C
0.3
25
Common source
VDS = 20 V
Pulse test
0.5 1 5
10 30 50
0.3
0.5
1
5
10
30
0.1
1
0.1 50
1
VGS = 10, 15 V
0.3 0.5 3 5 10 30
0.3
0.5
3
5
Common source
Tc = 25°C
Pulse test
10
30
50
8
0
0
2
4
6
10
2 4 8 6 10
Common source
Tc = 25°C
Pulse test
VGS = 4 V
4.6
4.8
5
5.2
6
8
10
16
0
0
4
8
12
20
10 20 40 30 50
VGS = 4 V
5.2
5.6
6
10
8
4.6
Common source
Tc = 25°C
Pulse test
2SK3453
2011-05-06
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40
80
10
0 40 80 120 200
120
160
160
200
RDS (ON) − Tc
IDR − VDS
Capacitance – VDS
Vth − Tc
PD − Tc
Dynamic input/output characteristics
Case temperature Tc (°C)
Drain-source voltage VDS (V)
Drain-source voltage VDS (V)
Case temperature Tc (°C)
Case temperature Tc (°C)
Total gate charge Qg (nC)
Drain reverse current IDR (A)
Drain-source ON-resistance RDS (ON) (Ω)
Gate threshold voltage Vth (V)
Capacitance C (pF)
Drain-source voltage VDS (V)
Drain power dissipation PD (W)
Gate-source voltage VGS (V)
0
1
2
3
4
5
−80 −40 0 40 120 160
Common source
VGS = 10 V
Pulse test
5
2.5
ID = 10 A
80
0
1
2
3
4
5
0
1
2
3
4
5
−80 −40 0 40 80 160
Common source
VDS = 10 V
ID = 1 mA
Pulse test
120
80
100
200
0
0 10 30 50
300
400
60
500
4
8
0
12
16
20
VDD = 100 V
VGS
400
200
VDS
20 40 70
Common source
ID = 10 A
Tc = 25°C
Pulse test
50
500
3000
10
0.1 0.3 3 10 100
100
300
1000
5000
1 30
30
Ciss
50 5 0.5
Common source
VGS = 0 V
f = 1 MHz
Tc = 25°C
Crss
Coss
3
1
1
0.01
0−0.2 −1.2
100
−0.6 −0.8
10
0.1
10
−0.4 −1.0
0.03
0.05
0.3
0.5
3
5
30
50 Common source
Tc = 25°C
Pulse test
VGS = 0, −1 V
2SK3453
2011-05-06
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Pulse width tw (s)
rth − tw
EAS – Tch
Channel temperature (initial) Tch (°C)
Normalized transient thermal impedance rth (t)/Rth (ch-c)
Avalanche energy EAS (mJ)
−15 V
15 V
Test circuit Waveform
IAR
BVDSS
VDD V
DS
RG = 25 Ω
VDD = 90 V, L = 7.5 mH ⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
−
⋅⋅⋅= VDD
BVDSS
BVDSS
2
IL
2
1
ΕAS
Safe operating area
Drain-source voltage VDS (V)
Drain current ID (A)
0.001
1
0.1
10 μ 100 μ
10
1 m 10 m 100 m 1 10
Single pulse
0.2
0.1
0.05
0.02
0.01
T
PDM
t
Duty = t/T
Rth (ch-c) = 1.56°C/W
Duty = 0.5
0.01
0
25
100
200
300
500
400
50 75 100 125 150
DC operation
Tc = 25°C
1 10 100
1000
100 μs *
1 ms *
ID max (pulsed) *
* Single nonrepetitive pulse
Tc = 25°C
Curves must be derated linearly
with increase in temperature.
0.01
0.03
0.1
0.3
1
3
30
100
10 ID max (continuous)
2SK3453
2011-05-06
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in this document, and related hardware, software and systems (collectively “Product”) without notice.
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responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily
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all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes
for Product and the precautions and conditions set forth in the “TOSHIBA Semiconductor Reliability Handbook” and (b) the
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• Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product.
Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances,
including without limitation, the EU RoHS Directive. TOSHIBA assumes no liability for damages or losses occurring as a result of
noncompliance with applicable laws and regulations.
